ccrf3  2.0.0.0
ccrf3.h
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22 
28 #ifndef CCRF3_H
29 #define CCRF3_H
30 
31 #ifdef __cplusplus
32 extern "C"{
33 #endif
34 
39 #ifdef PREINIT_SUPPORTED
40 #include "preinit.h"
41 #endif
42 
43 #ifdef MikroCCoreVersion
44  #if MikroCCoreVersion >= 1
45  #include "delays.h"
46  #endif
47 #endif
48 
49 #include "drv_digital_out.h"
50 #include "drv_digital_in.h"
51 #include "drv_spi_master.h"
52 #include "spi_specifics.h"
53 
79 #define CCRF3_IOCFG3 0x0000
80 #define CCRF3_IOCFG2 0x0001
81 #define CCRF3_IOCFG1 0x0002
82 #define CCRF3_IOCFG0 0x0003
83 #define CCRF3_SYNC3 0x0004
84 #define CCRF3_SYNC2 0x0005
85 #define CCRF3_SYNC1 0x0006
86 #define CCRF3_SYNC0 0x0007
87 #define CCRF3_SYNC_CFG1 0x0008
88 #define CCRF3_SYNC_CFG0 0x0009
89 #define CCRF3_DEVIATION_M 0x000A
90 #define CCRF3_MODCFG_DEV_E 0x000B
91 #define CCRF3_DCFILT_CFG 0x000C
92 #define CCRF3_PREAMBLE_CFG1 0x000D
93 #define CCRF3_PREAMBLE_CFG0 0x000E
94 #define CCRF3_FREQ_IF_CFG 0x000F
95 #define CCRF3_IQIC 0x0010
96 #define CCRF3_CHAN_BW 0x0011
97 #define CCRF3_MDMCFG1 0x0012
98 #define CCRF3_MDMCFG0 0x0013
99 #define CCRF3_SYMBOL_RATE2 0x0014
100 #define CCRF3_SYMBOL_RATE1 0x0015
101 #define CCRF3_SYMBOL_RATE0 0x0016
102 #define CCRF3_AGC_REF 0x0017
103 #define CCRF3_AGC_CS_THR 0x0018
104 #define CCRF3_AGC_GAIN_ADJUST 0x0019
105 #define CCRF3_AGC_CFG3 0x001A
106 #define CCRF3_AGC_CFG2 0x001B
107 #define CCRF3_AGC_CFG1 0x001C
108 #define CCRF3_AGC_CFG0 0x001D
109 #define CCRF3_FIFO_CFG 0x001E
110 #define CCRF3_DEV_ADDR 0x001F
111 #define CCRF3_SETTLING_CFG 0x0020
112 #define CCRF3_FS_CFG 0x0021
113 #define CCRF3_WOR_CFG1 0x0022
114 #define CCRF3_WOR_CFG0 0x0023
115 #define CCRF3_WOR_EVENT0_MSB 0x0024
116 #define CCRF3_WOR_EVENT0_LSB 0x0025
117 #define CCRF3_PKT_CFG2 0x0026
118 #define CCRF3_PKT_CFG1 0x0027
119 #define CCRF3_PKT_CFG0 0x0028
120 #define CCRF3_RFEND_CFG1 0x0029
121 #define CCRF3_RFEND_CFG0 0x002A
122 #define CCRF3_PA_CFG2 0x002B
123 #define CCRF3_PA_CFG1 0x002C
124 #define CCRF3_PA_CFG0 0x002D
125 #define CCRF3_PKT_LEN 0x002E
126 
131 #define CCRF3_IF_MIX_CFG 0x2F00
132 #define CCRF3_FREQOFF_CFG 0x2F01
133 #define CCRF3_TOC_CFG 0x2F02
134 #define CCRF3_MARC_SPARE 0x2F03
135 #define CCRF3_ECG_CFG 0x2F04
136 #define CCRF3_CFM_DATA_CFG 0x2F05
137 #define CCRF3_EXT_CTRL 0x2F06
138 #define CCRF3_RCCAL_FINE 0x2F07
139 #define CCRF3_RCCAL_COARSE 0x2F08
140 #define CCRF3_RCCAL_OFFSET 0x2F09
141 #define CCRF3_FREQOFF1 0x2F0A
142 #define CCRF3_FREQOFF0 0x2F0B
143 #define CCRF3_FREQ2 0x2F0C
144 #define CCRF3_FREQ1 0x2F0D
145 #define CCRF3_FREQ0 0x2F0E
146 #define CCRF3_IF_ADC2 0x2F0F
147 #define CCRF3_IF_ADC1 0x2F10
148 #define CCRF3_IF_ADC0 0x2F11
149 #define CCRF3_FS_DIG1 0x2F12
150 #define CCRF3_FS_DIG0 0x2F13
151 #define CCRF3_FS_CAL3 0x2F14
152 #define CCRF3_FS_CAL2 0x2F15
153 #define CCRF3_FS_CAL1 0x2F16
154 #define CCRF3_FS_CAL0 0x2F17
155 #define CCRF3_FS_CHP 0x2F18
156 #define CCRF3_FS_DIVTWO 0x2F19
157 #define CCRF3_FS_DSM1 0x2F1A
158 #define CCRF3_FS_DSM0 0x2F1B
159 #define CCRF3_FS_DVC1 0x2F1C
160 #define CCRF3_FS_DVC0 0x2F1D
161 #define CCRF3_FS_LBI 0x2F1E
162 #define CCRF3_FS_PFD 0x2F1F
163 #define CCRF3_FS_PRE 0x2F20
164 #define CCRF3_FS_REG_DIV_CML 0x2F21
165 #define CCRF3_FS_SPARE 0x2F22
166 #define CCRF3_FS_VCO4 0x2F23
167 #define CCRF3_FS_VCO3 0x2F24
168 #define CCRF3_FS_VCO2 0x2F25
169 #define CCRF3_FS_VCO1 0x2F26
170 #define CCRF3_FS_VCO0 0x2F27
171 #define CCRF3_GBIAS6 0x2F28
172 #define CCRF3_GBIAS5 0x2F29
173 #define CCRF3_GBIAS4 0x2F2A
174 #define CCRF3_GBIAS3 0x2F2B
175 #define CCRF3_GBIAS2 0x2F2C
176 #define CCRF3_GBIAS1 0x2F2D
177 #define CCRF3_GBIAS0 0x2F2E
178 #define CCRF3_IFAMP 0x2F2F
179 #define CCRF3_LNA 0x2F30
180 #define CCRF3_RXMIX 0x2F31
181 #define CCRF3_XOSC5 0x2F32
182 #define CCRF3_XOSC4 0x2F33
183 #define CCRF3_XOSC3 0x2F34
184 #define CCRF3_XOSC2 0x2F35
185 #define CCRF3_XOSC1 0x2F36
186 #define CCRF3_XOSC0 0x2F37
187 #define CCRF3_ANALOG_SPARE 0x2F38
188 #define CCRF3_PA_CFG3 0x2F39
189 #define CCRF3_IRQ0M 0x2F3F
190 #define CCRF3_IRQ0F 0x2F40
191 
196 #define CCRF3_WOR_TIME1 0x2F64
197 #define CCRF3_WOR_TIME0 0x2F65
198 #define CCRF3_WOR_CAPTURE1 0x2F66
199 #define CCRF3_WOR_CAPTURE0 0x2F67
200 #define CCRF3_BIST 0x2F68
201 #define CCRF3_DCFILTOFFSET_I1 0x2F69
202 #define CCRF3_DCFILTOFFSET_I0 0x2F6A
203 #define CCRF3_DCFILTOFFSET_Q1 0x2F6B
204 #define CCRF3_DCFILTOFFSET_Q0 0x2F6C
205 #define CCRF3_IQIE_I1 0x2F6D
206 #define CCRF3_IQIE_I0 0x2F6E
207 #define CCRF3_IQIE_Q1 0x2F6F
208 #define CCRF3_IQIE_Q0 0x2F70
209 #define CCRF3_RSSI1 0x2F71
210 #define CCRF3_RSSI0 0x2F72
211 #define CCRF3_MARCSTATE 0x2F73
212 #define CCRF3_LQI_VAL 0x2F74
213 #define CCRF3_PQT_SYNC_ERR 0x2F75
214 #define CCRF3_DEM_STATUS 0x2F76
215 #define CCRF3_FREQOFF_EST1 0x2F77
216 #define CCRF3_FREQOFF_EST0 0x2F78
217 #define CCRF3_AGC_GAIN3 0x2F79
218 #define CCRF3_AGC_GAIN2 0x2F7A
219 #define CCRF3_AGC_GAIN1 0x2F7B
220 #define CCRF3_AGC_GAIN0 0x2F7C
221 #define CCRF3_CFM_RX_DATA_OUT 0x2F7D
222 #define CCRF3_CFM_TX_DATA_IN 0x2F7E
223 #define CCRF3_ASK_SOFT_RX_DATA 0x2F7F
224 #define CCRF3_RNDGEN 0x2F80
225 #define CCRF3_MAGN2 0x2F81
226 #define CCRF3_MAGN1 0x2F82
227 #define CCRF3_MAGN0 0x2F83
228 #define CCRF3_ANG1 0x2F84
229 #define CCRF3_ANG0 0x2F85
230 #define CCRF3_CHFILT_I2 0x2F86
231 #define CCRF3_CHFILT_I1 0x2F87
232 #define CCRF3_CHFILT_I0 0x2F88
233 #define CCRF3_CHFILT_Q2 0x2F89
234 #define CCRF3_CHFILT_Q1 0x2F8A
235 #define CCRF3_CHFILT_Q0 0x2F8B
236 #define CCRF3_GPIO_STATUS 0x2F8C
237 #define CCRF3_FSCAL_CTRL 0x2F8D
238 #define CCRF3_PHASE_ADJUST 0x2F8E
239 #define CCRF3_PARTNUMBER 0x2F8F
240 #define CCRF3_PARTVERSION 0x2F90
241 #define CCRF3_SERIAL_STATUS 0x2F91
242 #define CCRF3_MODEM_STATUS1 0x2F92
243 #define CCRF3_MODEM_STATUS0 0x2F93
244 #define CCRF3_MARC_STATUS1 0x2F94
245 #define CCRF3_MARC_STATUS0 0x2F95
246 #define CCRF3_PA_IFAMP_TEST 0x2F96
247 #define CCRF3_FSRF_TEST 0x2F97
248 #define CCRF3_PRE_TEST 0x2F98
249 #define CCRF3_PRE_OVR 0x2F99
250 #define CCRF3_ADC_TEST 0x2F9A
251 #define CCRF3_DVC_TEST 0x2F9B
252 #define CCRF3_ATEST 0x2F9C
253 #define CCRF3_ATEST_LVDS 0x2F9D
254 #define CCRF3_ATEST_MODE 0x2F9E
255 #define CCRF3_XOSC_TEST1 0x2F9F
256 #define CCRF3_XOSC_TEST0 0x2FA0
257 
258 #define CCRF3_RXFIRST 0x2FD2
259 #define CCRF3_TXFIRST 0x2FD3
260 #define CCRF3_RXLAST 0x2FD4
261 #define CCRF3_TXLAST 0x2FD5
262 #define CCRF3_NUM_TXBYTES 0x2FD6
263 #define CCRF3_NUM_RXBYTES 0x2FD7
264 #define CCRF3_FIFO_NUM_TXBYTES 0x2FD8
265 #define CCRF3_FIFO_NUM_RXBYTES 0x2FD9
266  // ccrf3_reg
268 
283 #define CCRF3_STATUS_CHIP_RDYN_BM 0x80
284 #define CCRF3_STATUS_STATE_BM 0x70
285 #define CCRF3_STATUS_FIFO_BYTES_AVA_BM 0x0F
286 
287 #define CCRF3_STATUS_ERROR 0x00
288 #define CCRF3_STATUS_OK 0x01
289 
290 #define CCRF3_IDLE_MODE 0x01
291 #define CCRF3_TX_MODE 0x02
292 #define CCRF3_RX_MODE 0x03
293 
298 #define CCRF3_SINGLE_TXFIFO 0x003F
299 #define CCRF3_BURST_TXFIFO 0x007F
300 #define CCRF3_SINGLE_RXFIFO 0x00BF
301 #define CCRF3_BURST_RXFIFO 0x00FF
302 
303 #define CCRF3_LQI_CRC_OK_BM 0x80
304 #define CCRF3_LQI_EST_BM 0x7F
305 
310 #define CCRF3_SRES 0x30
311 #define CCRF3_SFSTXON 0x31
312 #define CCRF3_SXOFF 0x32
313 #define CCRF3_SCAL 0x33
314 #define CCRF3_SRX 0x34
315 #define CCRF3_STX 0x35
316 #define CCRF3_SIDLE 0x36
317 #define CCRF3_SWOR 0x38
318 #define CCRF3_SPWD 0x39
319 #define CCRF3_SFRX 0x3A
320 #define CCRF3_SFTX 0x3B
321 #define CCRF3_SWORRST 0x3C
322 #define CCRF3_SNOP 0x3D
323 #define CCRF3_AFC 0x37
324 
329 #define CCRF3_STATE_IDLE 0x00
330 #define CCRF3_STATE_RX 0x10
331 #define CCRF3_STATE_TX 0x20
332 #define CCRF3_STATE_FSTXON 0x30
333 #define CCRF3_STATE_CALIBRATE 0x40
334 #define CCRF3_STATE_SETTLING 0x50
335 #define CCRF3_STATE_RXFIFO_ERROR 0x60
336 #define CCRF3_STATE_TXFIFO_ERROR 0x70
337 
338 #define CCRF3_RADIO_BURST_ACCESS 0x40
339 #define CCRF3_RADIO_SINGLE_ACCESS 0x00
340 #define CCRF3_RADIO_READ_ACCESS 0x80
341 #define CCRF3_RADIO_WRITE_ACCESS 0x00
342 
343 
352 #define CCRF3_SET_DATA_SAMPLE_EDGE SET_SPI_DATA_SAMPLE_EDGE
353 #define CCRF3_SET_DATA_SAMPLE_MIDDLE SET_SPI_DATA_SAMPLE_MIDDLE
354  // ccrf3_set
356 
371 #define CCRF3_MAP_MIKROBUS( cfg, mikrobus ) \
372  cfg.miso = MIKROBUS( mikrobus, MIKROBUS_MISO ); \
373  cfg.mosi = MIKROBUS( mikrobus, MIKROBUS_MOSI ); \
374  cfg.sck = MIKROBUS( mikrobus, MIKROBUS_SCK ); \
375  cfg.cs = MIKROBUS( mikrobus, MIKROBUS_CS ); \
376  cfg.gp0 = MIKROBUS( mikrobus, MIKROBUS_AN ); \
377  cfg.rst = MIKROBUS( mikrobus, MIKROBUS_RST ); \
378  cfg.gp2 = MIKROBUS( mikrobus, MIKROBUS_PWM ); \
379  cfg.gp3 = MIKROBUS( mikrobus, MIKROBUS_INT )
380  // ccrf3_map // ccrf3
383 
388 typedef struct
389 {
390  // Output pins
391  digital_out_t cs;
392  digital_out_t rst;
394  // Input pins
395  digital_in_t gp0;
396  digital_in_t gp2;
397  digital_in_t gp3;
398  digital_in_t miso;
400  // Modules
401  spi_master_t spi;
403  pin_name_t chip_select;
405  uint16_t packet_counter;
406 } ccrf3_t;
407 
412 typedef struct
413 {
414  // Communication gpio pins
415  pin_name_t miso;
416  pin_name_t mosi;
417  pin_name_t sck;
418  pin_name_t cs;
420  // Additional gpio pins
421  pin_name_t gp0;
422  pin_name_t rst;
423  pin_name_t gp2;
424  pin_name_t gp3;
426  // static variable
427  uint32_t spi_speed;
428  spi_master_mode_t spi_mode;
429  spi_master_chip_select_polarity_t cs_polarity;
431 } ccrf3_cfg_t;
432 
437 typedef enum
438 {
439  CCRF3_OK = 0,
440  CCRF3_ERROR = -1
441 
443 
460 
475 err_t ccrf3_init ( ccrf3_t *ctx, ccrf3_cfg_t *cfg );
476 
490 err_t ccrf3_default_cfg ( ccrf3_t *ctx );
491 
501 void ccrf3_hw_reset ( ccrf3_t *ctx );
502 
512 uint8_t ccrf3_cmd_strobe ( ccrf3_t *ctx, uint8_t cmd );
513 
525 void ccrf3_read_write_burst_single ( ccrf3_t *ctx, uint8_t reg_address, uint8_t *rw_data, uint16_t n_bytes );
526 
539 uint8_t ccrf3_8bit_reg_access ( ccrf3_t *ctx, char access_type, uint8_t reg_address, uint8_t *rw_data,
540  uint16_t n_bytes );
541 
555 uint8_t ccrf3_16bit_reg_access ( ccrf3_t *ctx, uint8_t access_type, uint8_t ext_address,
556  uint8_t reg_address, uint8_t *rw_data, uint8_t n_bytes );
557 
569 err_t ccrf3_read_reg ( ccrf3_t *ctx, uint16_t reg_address, uint8_t *read_data, uint8_t n_bytes );
570 
582 err_t ccrf3_write_reg ( ccrf3_t *ctx, uint16_t reg_address, uint8_t *write_data, uint8_t n_bytes );
583 
594 uint8_t ccrf3_write_reg_single( ccrf3_t *ctx, uint16_t reg_address, uint8_t write_data );
595 
606 uint8_t ccrf3_write_tx_fifo ( ccrf3_t *ctx, uint8_t *write_data, uint8_t n_bytes );
607 
618 uint8_t ccrf3_read_rx_fifo ( ccrf3_t *ctx, uint8_t *read_data, uint8_t n_bytes );
619 
629 
639 
649 
658 uint8_t ccrf3_read_gp0 ( ccrf3_t *ctx );
659 
668 uint8_t ccrf3_read_gp2 ( ccrf3_t *ctx );
669 
678 uint8_t ccrf3_read_gp3 ( ccrf3_t *ctx );
679 
690 void ccrf3_send_tx_data ( ccrf3_t *ctx, uint8_t *tx_data, uint8_t n_bytes );
691 
701 uint8_t ccrf3_receive_rx_data ( ccrf3_t *ctx, uint8_t *rx_data );
702 
703 #ifdef __cplusplus
704 }
705 #endif
706 #endif // CCRF3_H
707  // ccrf3
709 
710 // ------------------------------------------------------------------------ END
ccrf3_t::miso
digital_in_t miso
Definition: ccrf3.h:398
ccrf3_cfg_setup
void ccrf3_cfg_setup(ccrf3_cfg_t *cfg)
ccRF 3 configuration object setup function.
ccrf3_cfg_t::rst
pin_name_t rst
Definition: ccrf3.h:422
ccrf3_read_gp2
uint8_t ccrf3_read_gp2(ccrf3_t *ctx)
Read state of GP2 pin function.
ccrf3_write_reg
err_t ccrf3_write_reg(ccrf3_t *ctx, uint16_t reg_address, uint8_t *write_data, uint8_t n_bytes)
Write sequential data function.
spi_specifics.h
This file contains SPI specific macros, functions, etc.
ccrf3_send_tx_data
void ccrf3_send_tx_data(ccrf3_t *ctx, uint8_t *tx_data, uint8_t n_bytes)
Send TX data function.
ccrf3_read_rx_fifo
uint8_t ccrf3_read_rx_fifo(ccrf3_t *ctx, uint8_t *read_data, uint8_t n_bytes)
Read RX FIFO register function.
ccrf3_cfg_t
ccRF 3 Click configuration object.
Definition: ccrf3.h:413
ccrf3_cfg_t::spi_speed
uint32_t spi_speed
Definition: ccrf3.h:427
ccrf3_set_tx_mode
void ccrf3_set_tx_mode(ccrf3_t *ctx)
Set TX mode function.
ccrf3_t::cs
digital_out_t cs
Definition: ccrf3.h:391
ccrf3_cfg_t::spi_mode
spi_master_mode_t spi_mode
Definition: ccrf3.h:428
ccrf3_cfg_t::sck
pin_name_t sck
Definition: ccrf3.h:417
CCRF3_OK
@ CCRF3_OK
Definition: ccrf3.h:439
ccrf3_cfg_t::cs_polarity
spi_master_chip_select_polarity_t cs_polarity
Definition: ccrf3.h:429
ccrf3_cfg_t::gp2
pin_name_t gp2
Definition: ccrf3.h:423
ccrf3_cfg_t::gp0
pin_name_t gp0
Definition: ccrf3.h:421
ccrf3_8bit_reg_access
uint8_t ccrf3_8bit_reg_access(ccrf3_t *ctx, char access_type, uint8_t reg_address, uint8_t *rw_data, uint16_t n_bytes)
Access 8-bit register function.
ccrf3_cmd_strobe
uint8_t ccrf3_cmd_strobe(ccrf3_t *ctx, uint8_t cmd)
Set command strobe function.
ccrf3_t::spi
spi_master_t spi
Definition: ccrf3.h:401
ccrf3_t::gp0
digital_in_t gp0
Definition: ccrf3.h:395
CCRF3_ERROR
@ CCRF3_ERROR
Definition: ccrf3.h:440
ccrf3_set_rx_mode
void ccrf3_set_rx_mode(ccrf3_t *ctx)
Set RX mode function.
ccrf3_read_write_burst_single
void ccrf3_read_write_burst_single(ccrf3_t *ctx, uint8_t reg_address, uint8_t *rw_data, uint16_t n_bytes)
Read or write burst single function.
ccrf3_t::packet_counter
uint16_t packet_counter
Definition: ccrf3.h:405
ccrf3_16bit_reg_access
uint8_t ccrf3_16bit_reg_access(ccrf3_t *ctx, uint8_t access_type, uint8_t ext_address, uint8_t reg_address, uint8_t *rw_data, uint8_t n_bytes)
Access 16-bit register function.
ccrf3_default_cfg
err_t ccrf3_default_cfg(ccrf3_t *ctx)
ccRF 3 default configuration function.
ccrf3_read_reg
err_t ccrf3_read_reg(ccrf3_t *ctx, uint16_t reg_address, uint8_t *read_data, uint8_t n_bytes)
Read the byte of data function.
ccrf3_t::gp3
digital_in_t gp3
Definition: ccrf3.h:397
ccrf3_read_gp0
uint8_t ccrf3_read_gp0(ccrf3_t *ctx)
Read state of GP0 pin function.
ccrf3_write_reg_single
uint8_t ccrf3_write_reg_single(ccrf3_t *ctx, uint16_t reg_address, uint8_t write_data)
Write one byte data function.
ccrf3_cfg_t::cs
pin_name_t cs
Definition: ccrf3.h:418
ccrf3_write_tx_fifo
uint8_t ccrf3_write_tx_fifo(ccrf3_t *ctx, uint8_t *write_data, uint8_t n_bytes)
Write TX FIFO register function.
ccrf3_t::rst
digital_out_t rst
Definition: ccrf3.h:392
ccrf3_t
ccRF 3 Click context object.
Definition: ccrf3.h:389
ccrf3_init
err_t ccrf3_init(ccrf3_t *ctx, ccrf3_cfg_t *cfg)
ccRF 3 initialization function.
ccrf3_read_gp3
uint8_t ccrf3_read_gp3(ccrf3_t *ctx)
Read state of GP3 pin function.
ccrf3_receive_rx_data
uint8_t ccrf3_receive_rx_data(ccrf3_t *ctx, uint8_t *rx_data)
Receive RX data function.
ccrf3_cfg_t::mosi
pin_name_t mosi
Definition: ccrf3.h:416
ccrf3_manual_calibration
void ccrf3_manual_calibration(ccrf3_t *ctx)
Manual calibration function.
ccrf3_t::gp2
digital_in_t gp2
Definition: ccrf3.h:396
ccrf3_cfg_t::miso
pin_name_t miso
Definition: ccrf3.h:415
ccrf3_cfg_t::gp3
pin_name_t gp3
Definition: ccrf3.h:424
ccrf3_hw_reset
void ccrf3_hw_reset(ccrf3_t *ctx)
Hardware reset function.
ccrf3_return_value_t
ccrf3_return_value_t
ccRF 3 Click return value data.
Definition: ccrf3.h:438
ccrf3_t::chip_select
pin_name_t chip_select
Definition: ccrf3.h:403