Go to the documentation of this file.
39 #ifdef PREINIT_SUPPORTED
43 #ifdef MikroCCoreVersion
44 #if MikroCCoreVersion >= 1
49 #include "drv_digital_out.h"
50 #include "drv_digital_in.h"
51 #include "drv_spi_master.h"
53 #include "drv_analog_in.h"
75 #define ECG2_ID_REG 0x00
76 #define ECG2_CONFIG1_REG 0x01
77 #define ECG2_CONFIG2_REG 0x02
78 #define ECG2_CONFIG3_REG 0x03
79 #define ECG2_LOFF_REG 0x04
80 #define ECG2_CH1SET_REG 0x05
81 #define ECG2_CH2SET_REG 0x06
82 #define ECG2_CH3SET_REG 0x07
83 #define ECG2_CH4SET_REG 0x08
84 #define ECG2_CH5SET_REG 0x09
85 #define ECG2_CH6SET_REG 0x0A
86 #define ECG2_CH7SET_REG 0x0B
87 #define ECG2_CH8SET_REG 0x0C
88 #define ECG2_RLD_SENSP_REG 0x0D
89 #define ECG2_RLD_SENSN_REG 0x0E
90 #define ECG2_LOFF_SENSP_REG 0x0F
91 #define ECG2_LOFF_SENSN_REG 0x10
92 #define ECG2_LOFF_FLIP_REG 0x11
93 #define ECG2_LOFF_STATP_REG 0x12
94 #define ECG2_LOFF_STATN_REG 0x13
95 #define ECG2_GPIO_REG 0x14
96 #define ECG2_PACE_REG 0x15
97 #define ECG2_CONFIG4_REG 0x17
98 #define ECG2_WCT1_REG 0x18
99 #define ECG2_WCT2_REG 0x19
122 #define ECG2_WAKEUP_CMD 0x02
123 #define ECG2_STANDBY_CMD 0x04
124 #define ECG2_RESET_CMD 0x06
125 #define ECG2_START_CONVERSION 0x08
126 #define ECG2_STOP_CONVERSION 0x0A
127 #define ECG2_ENABLE_READ_DATA_CONT_MODE 0x10
128 #define ECG2_STOP_DATA_CONT_MODE 0x11
129 #define ECG2_READ_DATA_CMD 0x12
130 #define ECG2_SPI_CMD_WRITE 0x40
131 #define ECG2_SPI_CMD_READ 0x20
137 #define ECG2_CONFIG1_REG_DEFAULT_VAL 0x04
138 #define ECG2_CONFIG2_REG_DEFAULT_VAL 0x20
139 #define ECG2_CONFIG3_REG_DEFAULT_VAL 0x40
145 #define ECG2_CFG_DAISY_ENABLE 0x00
146 #define ECG2_CFG_MULTI_READBACK 0x40
152 #define ECG2_CFG_CLK_ENABLE 0x20
153 #define ECG2_CFG_CLK_DISABLE 0x00
159 #define ECG2_CFG_DATA_SPEED_8K 0x00
160 #define ECG2_CFG_DATA_SPEED_4K 0x01
161 #define ECG2_CFG_DATA_SPEED_2K 0x02
162 #define ECG2_CFG_DATA_SPEED_1K 0x03
163 #define ECG2_CFG_DATA_SPEED_500 0x04
164 #define ECG2_CFG_DATA_SPEED_250 0x05
165 #define ECG2_CFG_DATA_SPEED_125 0x06
166 #define ECG2_CFG_DATA_SPEED_OFF 0x07
172 #define ECG2_CFG_INT_TEST_EXT 0x10
173 #define ECG2_CFG_INT_TEST_INT 0x00
179 #define ECG2_CFG_FREQ_F_DIV_2_TO_21 0x00
180 #define ECG2_CFG_FREQ_F_DIV_2_TO_20 0x01
181 #define ECG2_CFG_FREQ_NOT_USED 0x02
182 #define ECG2_CFG_FREQ_AT_DC 0x03
188 #define ECG2_CFG_AMPLITUDE_NEGATIVE_1 0x00
189 #define ECG2_CFG_AMPLITUDE_NEGATIVE_2 0x01
195 #define ECG2_CFG_ENABLE_INT_BUFFER 0x80
196 #define ECG2_CFG_DISABLE_INT_BUFFER 0x00
198 #define ECG2_CFG_REFBUF_ENABLE 0x80
199 #define ECG2_CFG_REFBUF_DISABLE 0x00
201 #define ECG2_CFG_INTERNAL_RLDREF 0x08
202 #define ECG2_CFG_EXTERNAL_RLDREF 0x00
204 #define ECG2_CFG_RLD_ENABLE 0x0C
205 #define ECG2_CFG_RLD_DISABLE 0x00
207 #define ECG2_CFG_RLD_SENSE_ENABLE 0x02
208 #define ECG2_CFG_RLD_SENSE_DISABLE 0x00
210 #define ECG2_CFG_RLD_NOT_CONNECTED 0x01
211 #define ECG2_CFG_RLD_CONNECTED 0x00
217 #define ECG2_CFG_VREF_2V4 0x00
218 #define ECG2_CFG_VREF_4V 0x20
224 #define ECG2_CFG_COMPARATOR_P_95 0x00
225 #define ECG2_CFG_COMPARATOR_P_92_5 0x20
226 #define ECG2_CFG_COMPARATOR_P_90 0x40
227 #define ECG2_CFG_COMPARATOR_P_87_5 0x60
228 #define ECG2_CFG_COMPARATOR_P_85 0x80
229 #define ECG2_CFG_COMPARATOR_P_80 0xA0
230 #define ECG2_CFG_COMPARATOR_P_75 0xC0
231 #define ECG2_CFG_COMPARATOR_P_70 0xE0
237 #define ECG2_CFG_COMPARATOR_N_5 0x00
238 #define ECG2_CFG_COMPARATOR_N_7_5 0x20
239 #define ECG2_CFG_COMPARATOR_N_10 0x40
240 #define ECG2_CFG_COMPARATOR_N_12_5 0x60
241 #define ECG2_CFG_COMPARATOR_N_15 0x80
242 #define ECG2_CFG_COMPARATOR_N_20 0xA0
243 #define ECG2_CFG_COMPARATOR_N_25 0xC0
244 #define ECG2_CFG_COMPARATOR_N_30 0xE0
250 #define ECG2_CFG_VLEAD_OFF 0x00
251 #define ECG2_CFG_VLEAD_EN 0x10
253 #define ECG2_CFG_ILEAD_OFF_4nA 0x00
254 #define ECG2_CFG_ILEAD_OFF_8nA 0x04
255 #define ECG2_CFG_ILEAD_OFF_12nA 0x08
256 #define ECG2_CFG_ILEAD_OFF_16nA 0x0C
258 #define ECG2_CFG_FLEAD_OFF_AC_OFF 0x01
259 #define ECG2_CFG_FLEAD_OFF_NOT_USED 0x02
260 #define ECG2_CFG_FLEAD_OFF_DC_OFF 0x03
266 #define ECG2_CFG_NORMAL_MODE 0x00
267 #define ECG2_CFG_POWER_DOWN 0x80
273 #define ECG2_CFG_PGA_GAIN_6 0x00
274 #define ECG2_CFG_PGA_GAIN_1 0x01
275 #define ECG2_CFG_PGA_GAIN_2 0x02
276 #define ECG2_CFG_PGA_GAIN_3 0x03
277 #define ECG2_CFG_PGA_GAIN_4 0x04
278 #define ECG2_CFG_PGA_GAIN_8 0x05
279 #define ECG2_CFG_PGA_GAIN_12 0x06
285 #define ECG2_CFG_MUX_NORMAL_ELECTRODE 0x00
286 #define ECG2_CFG_MUX_SHORTED_INPUT 0x01
287 #define ECG2_CFG_MUX_RLD_MEASURMENTS 0x02
288 #define ECG2_CFG_MUX_MVDD_MEASURMENTS 0x03
289 #define ECG2_CFG_MUX_TEMPERATURE_SENSOR 0x04
290 #define ECG2_CFG_MUX_TEST_SIGNAL 0x05
291 #define ECG2_CFG_MUX_RLD_DRP 0x06
292 #define ECG2_CFG_MUX_RLD_DRN 0x07
298 #define ECG2_CHANNEL_ODD_CHANNEL_1 0x00
299 #define ECG2_CHANNEL_ODD_CHANNEL_3 0x01
300 #define ECG2_CHANNEL_ODD_CHANNEL_5 0x02
301 #define ECG2_CHANNEL_ODD_CHANNEL_7 0x03
303 #define ECG2_CHANNEL_EVEN_CHANNEL_2 0x00
304 #define ECG2_CHANNEL_EVEN_CHANNEL_4 0x01
305 #define ECG2_CHANNEL_EVEN_CHANNEL_6 0x02
306 #define ECG2_CHANNEL_EVEN_CHANNEL_8 0x03
308 #define ECG2_CHANNEL_ENABLE 0x01
309 #define ECG2_CHANNEL_DISABLE 0x00
311 #define ECG2_DATA_READY 0x01
320 #define ECG2_SET_DATA_SAMPLE_EDGE SET_SPI_DATA_SAMPLE_EDGE
321 #define ECG2_SET_DATA_SAMPLE_MIDDLE SET_SPI_DATA_SAMPLE_MIDDLE
339 #define ECG2_MAP_MIKROBUS( cfg, mikrobus ) \
340 cfg.miso = MIKROBUS( mikrobus, MIKROBUS_MISO ); \
341 cfg.mosi = MIKROBUS( mikrobus, MIKROBUS_MOSI ); \
342 cfg.sck = MIKROBUS( mikrobus, MIKROBUS_SCK ); \
343 cfg.cs = MIKROBUS( mikrobus, MIKROBUS_CS ); \
344 cfg.an = MIKROBUS( mikrobus, MIKROBUS_AN ); \
345 cfg.rst = MIKROBUS( mikrobus, MIKROBUS_RST ); \
346 cfg.pwd = MIKROBUS( mikrobus, MIKROBUS_PWM ); \
347 cfg.drd = MIKROBUS( mikrobus, MIKROBUS_INT )
610 int8_t channel_input);
err_t ecg2_init(ecg2_t *ctx, ecg2_cfg_t *cfg)
ECG 2 initialization function.
spi_master_chip_select_polarity_t cs_polarity
Definition: ecg2.h:395
void ecg2_lead_off_current_direction_select(ecg2_t *ctx, uint8_t data_in)
ECG 2 lead off current direction drive settings function.
err_t ecg2_read_data(ecg2_t *ctx, uint8_t *data_out, uint8_t len)
ECG 2 read ADC data function.
digital_in_t drd
Definition: ecg2.h:363
uint8_t ecg2_get_device_id(ecg2_t *ctx)
ECG 2 get device id function.
float vref
Definition: ecg2.h:398
pin_name_t mosi
Definition: ecg2.h:382
digital_out_t pwd
Definition: ecg2.h:360
void ecg2_right_leg_positive_drive_set(ecg2_t *ctx, uint8_t data_in)
ECG 2 right leg positive drive settings function.
err_t ecg2_generic_write(ecg2_t *ctx, uint8_t reg, uint8_t *data_in, uint8_t len)
ECG 2 data writing function.
err_t ecg2_configure_channel(ecg2_t *ctx, uint8_t channel, uint8_t enable, uint8_t pga_gain, int8_t channel_input)
ECG 2 configure channel function.
err_t ecg2_write_register(ecg2_t *ctx, uint8_t reg, uint8_t data_in)
ECG 2 register data write function.
pin_name_t miso
Definition: ecg2.h:381
err_t ecg2_generic_read(ecg2_t *ctx, uint8_t reg, uint8_t *data_out, uint8_t len)
ECG 2 data reading function.
spi_master_mode_t spi_mode
Definition: ecg2.h:394
This file contains SPI specific macros, functions, etc.
ECG 2 Click context object.
Definition: ecg2.h:357
pin_name_t chip_select
Definition: ecg2.h:368
err_t ecg2_pace_detect_even_channels_select(ecg2_t *ctx, uint8_t select)
ECG 2 pace detect even chanels drive settings function.
ECG 2 Click configuration object.
Definition: ecg2.h:379
err_t ecg2_pace_detect_odd_channels_select(ecg2_t *ctx, uint8_t select)
ECG 2 pace detect odd chanels drive settings function.
void ecg2_wilson_center_terminal_configure(ecg2_t *ctx, uint16_t set)
ECG 2 right leg positive drive settings function.
spi_master_t spi
Definition: ecg2.h:366
digital_out_t rst
Definition: ecg2.h:359
void ecg2_lead_off_negative_channel_select(ecg2_t *ctx, uint8_t data_in)
ECG 2 lead off negative drive settings function.
err_t ecg2_read_register(ecg2_t *ctx, uint8_t reg, uint8_t *data_out)
ECG 2 register data reading function.
pin_name_t drd
Definition: ecg2.h:390
pin_name_t pwd
Definition: ecg2.h:389
void ecg2_cfg_setup(ecg2_cfg_t *cfg)
ECG 2 configuration object setup function.
pin_name_t sck
Definition: ecg2.h:383
err_t ecg2_read_an_pin_value(ecg2_t *ctx, uint16_t *data_out)
ECG 2 read AN pin value function.
uint8_t ecg2_data_ready(ecg2_t *ctx)
ECG 2 is data ready function.
ecg2_return_value_t
ECG 2 Click return value data.
Definition: ecg2.h:407
void ecg2_hw_reset(ecg2_t *ctx)
ECG 2 hardware reset function.
err_t ecg2_send_command(ecg2_t *ctx, uint8_t command)
ECG 2 send command function.
pin_name_t cs
Definition: ecg2.h:384
err_t ecg2_default_cfg(ecg2_t *ctx)
ECG 2 default configuration function.
void ecg2_right_leg_negative_drive_set(ecg2_t *ctx, uint8_t data_in)
ECG 2 right leg negative drive settings function.
void ecg2_lead_off_positive_channel_select(ecg2_t *ctx, uint8_t data_in)
ECG 2 lead off positive drive settings function.
err_t ecg2_read_channel_data(ecg2_t *ctx, uint8_t channel, uint16_t *data_out)
ECG 2 read data channel function.
@ ECG2_ERROR
Definition: ecg2.h:409
analog_in_resolution_t resolution
Definition: ecg2.h:397
pin_name_t rst
Definition: ecg2.h:388
@ ECG2_OK
Definition: ecg2.h:408
err_t ecg2_multi_write(ecg2_t *ctx, uint8_t reg, uint8_t *data_in, uint8_t len)
ECG 2 data multi writing function.
pin_name_t an
Definition: ecg2.h:387
analog_in_t adc
Definition: ecg2.h:370
err_t ecg2_multi_read(ecg2_t *ctx, uint8_t reg, uint8_t *data_out, uint8_t len)
ECG 2 data multi reading function.
uint32_t spi_speed
Definition: ecg2.h:393