ntag5link  2.0.0.0
ntag5link.h
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3 ** Contact: https://www.mikroe.com/contact
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22 
28 #ifndef NTAG5LINK_H
29 #define NTAG5LINK_H
30 
31 #ifdef __cplusplus
32 extern "C"{
33 #endif
34 
35 #include "drv_digital_out.h"
36 #include "drv_digital_in.h"
37 #include "drv_i2c_master.h"
38 
59 #define NTAG5LINK_CONFIG_SIGNATURE 0x1000
60 #define NTAG5LINK_CONFIG_HEADER 0x1008
61 #define NTAG5LINK_CONFIG_ID 0x1009
62 #define NTAG5LINK_CONFIG_NFC_GCH 0x100C
63 #define NTAG5LINK_CONFIG_NFC_CCH 0x100D
64 #define NTAG5LINK_CONFIG_NFC_AUTH_LIMIT 0x100E
65 #define NTAG5LINK_CONFIG_NFC_KH0 0x1010
66 #define NTAG5LINK_CONFIG_NFC_KP0 0x1011
67 #define NTAG5LINK_CONFIG_NFC_KH1 0x1012
68 #define NTAG5LINK_CONFIG_NFC_KP1 0x1013
69 #define NTAG5LINK_CONFIG_NFC_KH2 0x1014
70 #define NTAG5LINK_CONFIG_NFC_KP2 0x1015
71 #define NTAG5LINK_CONFIG_NFC_KH3 0x1016
72 #define NTAG5LINK_CONFIG_NFC_KP3 0x1017
73 #define NTAG5LINK_CONFIG_KEY_0 0x1020
74 #define NTAG5LINK_CONFIG_KEY_1 0x1024
75 #define NTAG5LINK_CONFIG_KEY_2 0x1028
76 #define NTAG5LINK_CONFIG_KEY_3 0x102C
77 #define NTAG5LINK_CONFIG_I2C_KH 0x1030
78 #define NTAG5LINK_CONFIG_I2C_PP_AND_PPC 0x1031
79 #define NTAG5LINK_CONFIG_I2C_AUTH_LIMIT 0x1032
80 #define NTAG5LINK_CONFIG_I2C_PWD_0 0x1033
81 #define NTAG5LINK_CONFIG_I2C_PWD_1 0x1034
82 #define NTAG5LINK_CONFIG_I2C_PWD_2 0x1035
83 #define NTAG5LINK_CONFIG_I2C_PWD_3 0x1036
84 #define NTAG5LINK_CONFIG_CONFIG 0x1037
85 #define NTAG5LINK_CONFIG_SYNC_DATA_BLOCK 0x1038
86 #define NTAG5LINK_CONFIG_PWM_GPIO_CONFIG 0x1039
87 #define NTAG5LINK_CONFIG_PWM0_ON_OFF 0x103A
88 #define NTAG5LINK_CONFIG_PWM1_ON_OFF 0x103B
89 #define NTAG5LINK_CONFIG_WDT_CFG_AND_SRAM_COPY 0x103C
90 #define NTAG5LINK_CONFIG_EH_AND_ED_CONFIG 0x103D
91 #define NTAG5LINK_CONFIG_I2C_SLAVE_MASTER_CFG 0x103E
92 #define NTAG5LINK_CONFIG_SEC_SRAM_AND_PP_AREA_1 0x103F
93 #define NTAG5LINK_CONFIG_SRAM_DEFAULT 0x1045
94 #define NTAG5LINK_CONFIG_AFI 0x1055
95 #define NTAG5LINK_CONFIG_DSFID 0x1056
96 #define NTAG5LINK_CONFIG_EAS_ID 0x1057
97 #define NTAG5LINK_CONFIG_NFC_PP_AREA_0_AND_PPC 0x1058
98 #define NTAG5LINK_CONFIG_NFC_LOCK_BLOCK 0x106A
99 #define NTAG5LINK_CONFIG_I2C_LOCK_BLOCK 0x108A
100 #define NTAG5LINK_CONFIG_NFC_SECTION_LOCK 0x1092
101 #define NTAG5LINK_CONFIG_I2C_SECTION_LOCK 0x1094
102 #define NTAG5LINK_CONFIG_I2C_PWD_0_AUTH 0x1096
103 #define NTAG5LINK_CONFIG_I2C_PWD_1_AUTH 0x1097
104 #define NTAG5LINK_CONFIG_I2C_PWD_2_AUTH 0x1098
105 #define NTAG5LINK_CONFIG_I2C_PWD_3_AUTH 0x1099
106 
111 #define NTAG5LINK_SESSION_REG_STATUS 0x10A0
112 #define NTAG5LINK_SESSION_REG_CONFIG 0x10A1
113 #define NTAG5LINK_SESSION_REG_SYNC_DATA_BLOCK 0x10A2
114 #define NTAG5LINK_SESSION_REG_PWM_GPIO_CONFIG 0x10A3
115 #define NTAG5LINK_SESSION_REG_PWM0_ON_OFF 0x10A4
116 #define NTAG5LINK_SESSION_REG_PWM1_ON_OFF 0x10A5
117 #define NTAG5LINK_SESSION_REG_WDT_CONFIG 0x10A6
118 #define NTAG5LINK_SESSION_REG_EH_CONFIG 0x10A7
119 #define NTAG5LINK_SESSION_REG_ED_CONFIG 0x10A8
120 #define NTAG5LINK_SESSION_REG_I2C_SLAVE_CONFIG 0x10A9
121 #define NTAG5LINK_SESSION_REG_RESET_GEN 0x10AA
122 #define NTAG5LINK_SESSION_REG_ED_INTR_CLEAR 0x10AB
123 #define NTAG5LINK_SESSION_REG_I2C_MASTER_CONFIG 0x10AC
124 #define NTAG5LINK_SESSION_REG_I2C_MASTER_STATUS 0x10AD
125 #define NTAG5LINK_SESSION_REG_BYTE_0 0x00
126 #define NTAG5LINK_SESSION_REG_BYTE_1 0x01
127 #define NTAG5LINK_SESSION_REG_BYTE_2 0x02
128 #define NTAG5LINK_SESSION_REG_BYTE_3 0x03
129  // ntag5link_reg
131 
146 #define NTAG5LINK_USER_MEMORY_ADDRESS_MIN 0x0000
147 #define NTAG5LINK_USER_MEMORY_ADDRESS_MAX 0x01FF
148 #define NTAG5LINK_CONFIG_MEMORY_ADDRESS_MIN 0x1000
149 #define NTAG5LINK_CONFIG_MEMORY_ADDRESS_MAX 0x109F
150 #define NTAG5LINK_SESSION_REG_ADDRESS_MIN 0x10A0
151 #define NTAG5LINK_SESSION_REG_ADDRESS_MAX 0x10AF
152 #define NTAG5LINK_MEMORY_BLOCK_SIZE 4
153 
158 #define NTAG5LINK_CONFIG_0_SRAM_COPY_ENABLE 0x80
159 #define NTAG5LINK_CONFIG_0_EH_LOW_FIELD_STR 0x08
160 #define NTAG5LINK_CONFIG_0_EH_HIGH_FIELD_STR 0x0C
161 #define NTAG5LINK_CONFIG_0_LOCK_SESSION_REG 0x02
162 #define NTAG5LINK_CONFIG_0_AUTO_STANDBY_MODE_EN 0x01
163 #define NTAG5LINK_CONFIG_1_EH_ARBITER_MODE_EN 0x80
164 #define NTAG5LINK_CONFIG_1_USE_CASE_I2C_SLAVE 0x00
165 #define NTAG5LINK_CONFIG_1_USE_CASE_I2C_MASTER 0x10
166 #define NTAG5LINK_CONFIG_1_USE_CASE_GPIO_PWM 0x20
167 #define NTAG5LINK_CONFIG_1_USE_CASE_3_STATE 0x30
168 #define NTAG5LINK_CONFIG_1_ARBITER_NORMAL_MODE 0x00
169 #define NTAG5LINK_CONFIG_1_ARBITER_SRAM_MIRROR 0x04
170 #define NTAG5LINK_CONFIG_1_ARBITER_SRAM_PT 0x08
171 #define NTAG5LINK_CONFIG_1_ARBITER_SRAM_PHDC 0x0C
172 #define NTAG5LINK_CONFIG_1_SRAM_ENABLE 0x02
173 #define NTAG5LINK_CONFIG_1_PT_TRANSFER_I2C_NFC 0x00
174 #define NTAG5LINK_CONFIG_1_PT_TRANSFER_NFC_I2C 0x01
175 #define NTAG5LINK_CONFIG_2_GPIO1_IN_DISABLE 0x00
176 #define NTAG5LINK_CONFIG_2_GPIO1_IN_PULL_UP 0x40
177 #define NTAG5LINK_CONFIG_2_GPIO1_IN_ENABLE 0x80
178 #define NTAG5LINK_CONFIG_2_GPIO1_IN_PULL_DOWN 0xC0
179 #define NTAG5LINK_CONFIG_2_GPIO0_IN_DISABLE 0x00
180 #define NTAG5LINK_CONFIG_2_GPIO0_IN_PULL_UP 0x10
181 #define NTAG5LINK_CONFIG_2_GPIO0_IN_ENABLE 0x20
182 #define NTAG5LINK_CONFIG_2_GPIO0_IN_PULL_DOWN 0x30
183 #define NTAG5LINK_CONFIG_2_EXT_CMD_SUPPORT 0x08
184 #define NTAG5LINK_CONFIG_2_LOCK_BLK_CMD_SUPPORT 0x04
185 #define NTAG5LINK_CONFIG_2_GPIO1_HIGH_SLEW_RATE 0x02
186 #define NTAG5LINK_CONFIG_2_GPIO0_HIGH_SLEW_RATE 0x01
187 
192 #define NTAG5LINK_CAPABILITY_CONTAINER_ADDRESS 0x0000
193 #define NTAG5LINK_CAPABILITY_CONTAINER 0xE1, 0x40, 0x80, 0x01
194 #define NTAG5LINK_NDEF_MESSAGE_START_ADDRESS 0x0001
195 #define NTAG5LINK_TYPE_NDEF_MESSAGE 0x03
196 #define NTAG5LINK_NDEF_RECORD_HEADER 0xD1
197 #define NTAG5LINK_NDEF_TYPE_LENGTH 0x01
198 #define NTAG5LINK_NDEF_URI_TYPE 'U'
199 #define NTAG5LINK_NDEF_MESSAGE_END_MARK 0xFE
200 
205 #define NTAG5LINK_URI_PREFIX_0 0x00
206 #define NTAG5LINK_URI_PREFIX_1 0x01
207 #define NTAG5LINK_URI_PREFIX_2 0x02
208 #define NTAG5LINK_URI_PREFIX_3 0x03
209 #define NTAG5LINK_URI_PREFIX_4 0x04
210 #define NTAG5LINK_URI_PREFIX_5 0x05
211 #define NTAG5LINK_URI_PREFIX_6 0x06
212 #define NTAG5LINK_URI_PREFIX_7 0x07
213 #define NTAG5LINK_URI_PREFIX_8 0x08
214 #define NTAG5LINK_URI_PREFIX_9 0x09
215 #define NTAG5LINK_URI_PREFIX_10 0x0A
216 #define NTAG5LINK_URI_PREFIX_11 0x0B
217 #define NTAG5LINK_URI_PREFIX_12 0x0C
218 #define NTAG5LINK_URI_PREFIX_13 0x0D
219 #define NTAG5LINK_URI_PREFIX_14 0x0E
220 #define NTAG5LINK_URI_PREFIX_15 0x0F
221 #define NTAG5LINK_URI_PREFIX_16 0x10
222 #define NTAG5LINK_URI_PREFIX_17 0x11
223 #define NTAG5LINK_URI_PREFIX_18 0x12
224 #define NTAG5LINK_URI_PREFIX_19 0x13
225 #define NTAG5LINK_URI_PREFIX_20 0x14
226 #define NTAG5LINK_URI_PREFIX_21 0x15
227 #define NTAG5LINK_URI_PREFIX_22 0x16
228 #define NTAG5LINK_URI_PREFIX_23 0x17
229 #define NTAG5LINK_URI_PREFIX_24 0x18
230 #define NTAG5LINK_URI_PREFIX_25 0x19
231 #define NTAG5LINK_URI_PREFIX_26 0x1A
232 #define NTAG5LINK_URI_PREFIX_27 0x1B
233 #define NTAG5LINK_URI_PREFIX_28 0x1C
234 #define NTAG5LINK_URI_PREFIX_29 0x1D
235 #define NTAG5LINK_URI_PREFIX_30 0x1E
236 #define NTAG5LINK_URI_PREFIX_31 0x1F
237 #define NTAG5LINK_URI_PREFIX_32 0x20
238 #define NTAG5LINK_URI_PREFIX_33 0x21
239 #define NTAG5LINK_URI_PREFIX_34 0x22
240 #define NTAG5LINK_URI_PREFIX_35 0x23
247 #define NTAG5LINK_DEVICE_ADDRESS 0x54
248  // ntag5link_set
250 
265 #define NTAG5LINK_MAP_MIKROBUS( cfg, mikrobus ) \
266  cfg.scl = MIKROBUS( mikrobus, MIKROBUS_SCL ); \
267  cfg.sda = MIKROBUS( mikrobus, MIKROBUS_SDA ); \
268  cfg.hpd = MIKROBUS( mikrobus, MIKROBUS_RST ); \
269  cfg.ed = MIKROBUS( mikrobus, MIKROBUS_INT )
270  // ntag5link_map // ntag5link
273 
274 
279 typedef union
280 {
281  uint8_t value_bytes[ 4 ];
282  uint32_t value;
284 
289 typedef struct
290 {
291  // Output pins
292  digital_out_t hpd;
294  // Input pins
295  digital_in_t ed;
297  // Modules
298  i2c_master_t i2c;
300  // I2C slave address
301  uint8_t slave_address;
303 } ntag5link_t;
304 
309 typedef struct
310 {
311  pin_name_t scl;
312  pin_name_t sda;
314  pin_name_t hpd;
315  pin_name_t ed;
317  uint32_t i2c_speed;
318  uint8_t i2c_address;
321 
326 typedef enum
327 {
329  NTAG5LINK_ERROR = -1
330 
332 
349 
365 
380 
394 err_t ntag5link_write_memory_block ( ntag5link_t *ctx, uint16_t block_addr, ntag5link_block_t *block );
395 
409 err_t ntag5link_read_memory_block ( ntag5link_t *ctx, uint16_t block_addr, ntag5link_block_t *block );
410 
426 err_t ntag5link_write_multiple_memory_block ( ntag5link_t *ctx, uint16_t block_addr,
427  ntag5link_block_t *block, uint8_t num_blocks );
428 
444 err_t ntag5link_read_multiple_memory_block ( ntag5link_t *ctx, uint16_t block_addr,
445  ntag5link_block_t *block, uint8_t num_blocks );
446 
461 err_t ntag5link_write_session_register ( ntag5link_t *ctx, uint16_t block_addr, uint8_t byte_num,
462  uint8_t mask, uint8_t data_in );
463 
477 err_t ntag5link_read_session_register ( ntag5link_t *ctx, uint16_t block_addr, uint8_t byte_num, uint8_t *data_out );
478 
494 err_t ntag5link_write_ndef_uri_record ( ntag5link_t *ctx, uint8_t uri_prefix, uint8_t *uri_data, uint8_t data_len );
495 
507 
522 err_t ntag5link_write_message_to_memory ( ntag5link_t *ctx, uint16_t block_addr, uint8_t *message, uint16_t message_len );
523 
538 err_t ntag5link_read_message_from_memory ( ntag5link_t *ctx, uint16_t block_addr, uint8_t *message, uint16_t message_len );
539 
549 
559 
569 
570 #ifdef __cplusplus
571 }
572 #endif
573 #endif // NTAG5LINK_H
574  // ntag5link
576 
577 // ------------------------------------------------------------------------ END