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35 #include "drv_digital_out.h"
36 #include "drv_digital_in.h"
37 #include "drv_spi_master.h"
60 #define C3DHALL10_REG_DEVICE_CONFIG 0x00
61 #define C3DHALL10_REG_SENSOR_CONFIG 0x01
62 #define C3DHALL10_REG_SYSTEM_CONFIG 0x02
63 #define C3DHALL10_REG_ALERT_CONFIG 0x03
64 #define C3DHALL10_REG_X_THRX_CONFIG 0x04
65 #define C3DHALL10_REG_Y_THRX_CONFIG 0x05
66 #define C3DHALL10_REG_Z_THRX_CONFIG 0x06
67 #define C3DHALL10_REG_T_THRX_CONFIG 0x07
68 #define C3DHALL10_REG_CONV_STATUS 0x08
69 #define C3DHALL10_REG_X_CH_RESULT 0x09
70 #define C3DHALL10_REG_Y_CH_RESULT 0x0A
71 #define C3DHALL10_REG_Z_CH_RESULT 0x0B
72 #define C3DHALL10_REG_TEMP_RESULT 0x0C
73 #define C3DHALL10_REG_AFE_STATUS 0x0D
74 #define C3DHALL10_REG_SYS_STATUS 0x0E
75 #define C3DHALL10_REG_TEST_CONFIG 0x0F
76 #define C3DHALL10_REG_OSC_MONITOR 0x10
77 #define C3DHALL10_REG_MAG_GAIN_CONFIG 0x11
78 #define C3DHALL10_REG_MAG_OFFSET_CONFIG 0x12
79 #define C3DHALL10_REG_ANGLE_RESULT 0x13
80 #define C3DHALL10_REG_MAGNITUDE_RESULT 0x14
98 #define C3DHALL10_CONV_AVG_1X 0x0000
99 #define C3DHALL10_CONV_AVG_2X 0x1000
100 #define C3DHALL10_CONV_AVG_4X 0x2000
101 #define C3DHALL10_CONV_AVG_8X 0x3000
102 #define C3DHALL10_CONV_AVG_16X 0x4000
103 #define C3DHALL10_CONV_AVG_32X 0x5000
104 #define C3DHALL10_CONV_AVG_BIT_MASK 0x7000
105 #define C3DHALL10_MAG_TEMPCO_0 0x0000
106 #define C3DHALL10_MAG_TEMPCO_0p12 0x0100
107 #define C3DHALL10_MAG_TEMPCO_0p03 0x0200
108 #define C3DHALL10_MAG_TEMPCO_0p2 0x0300
109 #define C3DHALL10_MAG_TEMPCO_BIT_MASK 0x0300
110 #define C3DHALL10_OPERATING_MODE_CONFIG 0x0000
111 #define C3DHALL10_OPERATING_MODE_STANDBY 0x0010
112 #define C3DHALL10_OPERATING_MODE_MEASURE 0x0020
113 #define C3DHALL10_OPERATING_MODE_TRIGGER 0x0030
114 #define C3DHALL10_OPERATING_MODE_DUTY_CYCLED 0x0040
115 #define C3DHALL10_OPERATING_MODE_SLEEP 0x0050
116 #define C3DHALL10_OPERATING_MODE_DEEP_SLEEP 0x0060
117 #define C3DHALL10_OPERATING_MODE_BIT_MASK 0x0070
118 #define C3DHALL10_T_CH_EN_DISABLE 0x0000
119 #define C3DHALL10_T_CH_EN_ENABLE 0x0008
120 #define C3DHALL10_T_CH_EN_BIT_MASK 0x0008
121 #define C3DHALL10_T_RATE_PER_CONV_AVG 0x0000
122 #define C3DHALL10_T_RATE_ONCE_PER_CONV 0x0004
123 #define C3DHALL10_T_RATE_BIT_MASK 0x0004
124 #define C3DHALL10_T_HLT_EN_DISABLE 0x0000
125 #define C3DHALL10_T_HLT_EN_ENABLE 0x0002
126 #define C3DHALL10_T_HLT_EN_BIT_MASK 0x0002
132 #define C3DHALL10_ANGLE_EN_NO_ANGLE 0x0000
133 #define C3DHALL10_ANGLE_EN_XY_ANGLE 0x4000
134 #define C3DHALL10_ANGLE_EN_YZ_ANGLE 0x8000
135 #define C3DHALL10_ANGLE_EN_XZ_ANGLE 0xC000
136 #define C3DHALL10_ANGLE_EN_BIT_MASK 0xC000
137 #define C3DHALL10_SLEEPTIME_1MS 0x0000
138 #define C3DHALL10_SLEEPTIME_5MS 0x0400
139 #define C3DHALL10_SLEEPTIME_10MS 0x0800
140 #define C3DHALL10_SLEEPTIME_15MS 0x0C00
141 #define C3DHALL10_SLEEPTIME_20MS 0x1000
142 #define C3DHALL10_SLEEPTIME_30MS 0x1400
143 #define C3DHALL10_SLEEPTIME_50MS 0x1800
144 #define C3DHALL10_SLEEPTIME_100MS 0x1C00
145 #define C3DHALL10_SLEEPTIME_500MS 0x2000
146 #define C3DHALL10_SLEEPTIME_1000MS 0x2400
147 #define C3DHALL10_SLEEPTIME_BIT_MASK 0x3C00
148 #define C3DHALL10_MAG_CH_EN_DISABLE 0x0000
149 #define C3DHALL10_MAG_CH_EN_ENABLE_X 0x0040
150 #define C3DHALL10_MAG_CH_EN_ENABLE_Y 0x0080
151 #define C3DHALL10_MAG_CH_EN_ENABLE_XY 0x00C0
152 #define C3DHALL10_MAG_CH_EN_ENABLE_Z 0x0100
153 #define C3DHALL10_MAG_CH_EN_ENABLE_ZX 0x0140
154 #define C3DHALL10_MAG_CH_EN_ENABLE_YZ 0x0180
155 #define C3DHALL10_MAG_CH_EN_ENABLE_XYZ 0x01C0
156 #define C3DHALL10_MAG_CH_EN_ENABLE_XYX 0x0200
157 #define C3DHALL10_MAG_CH_EN_ENABLE_YXY 0x0240
158 #define C3DHALL10_MAG_CH_EN_ENABLE_YZY 0x0280
159 #define C3DHALL10_MAG_CH_EN_ENABLE_ZYZ 0x02C0
160 #define C3DHALL10_MAG_CH_EN_ENABLE_ZXZ 0x0300
161 #define C3DHALL10_MAG_CH_EN_ENABLE_XZX 0x0340
162 #define C3DHALL10_MAG_CH_EN_ENABLE_XYZYX 0x0380
163 #define C3DHALL10_MAG_CH_EN_ENABLE_XYZZYX 0x03C0
164 #define C3DHALL10_MAG_CH_EN_BIT_MASK 0x03C0
165 #define C3DHALL10_Z_RANGE_50mT 0x0000
166 #define C3DHALL10_Z_RANGE_25mT 0x0010
167 #define C3DHALL10_Z_RANGE_100mT 0x0020
168 #define C3DHALL10_Z_RANGE_BIT_MASK 0x0030
169 #define C3DHALL10_Y_RANGE_50mT 0x0000
170 #define C3DHALL10_Y_RANGE_25mT 0x0004
171 #define C3DHALL10_Y_RANGE_100mT 0x0008
172 #define C3DHALL10_Y_RANGE_BIT_MASK 0x000C
173 #define C3DHALL10_X_RANGE_50mT 0x0000
174 #define C3DHALL10_X_RANGE_25mT 0x0001
175 #define C3DHALL10_X_RANGE_100mT 0x0002
176 #define C3DHALL10_X_RANGE_BIT_MASK 0x0003
182 #define C3DHALL10_DIAG_SEL_ALL_DP_DIAG_ALL 0x0000
183 #define C3DHALL10_DIAG_SEL_EN_DP_ONLY_DIAG_ALL 0x1000
184 #define C3DHALL10_DIAG_SEL_ALL_DP_DIAG_SEQ 0x2000
185 #define C3DHALL10_DIAG_SEL_EN_DP_ONLY_DIAG_SEQ 0x3000
186 #define C3DHALL10_DIAG_SEL_BIT_MASK 0x3000
187 #define C3DHALL10_TRIGGER_MODE_SPI_CMD 0x0000
188 #define C3DHALL10_TRIGGER_MODE_CS_PULSE 0x0200
189 #define C3DHALL10_TRIGGER_MODE_ALERT_PULSE 0x0400
190 #define C3DHALL10_TRIGGER_MODE_BIT_MASK 0x0600
191 #define C3DHALL10_DATA_TYPE_32BIT_REG 0x0000
192 #define C3DHALL10_DATA_TYPE_12BIT_XY_DATA 0x0040
193 #define C3DHALL10_DATA_TYPE_12BIT_XZ_DATA 0x0080
194 #define C3DHALL10_DATA_TYPE_12BIT_ZY_DATA 0x00C0
195 #define C3DHALL10_DATA_TYPE_12BIT_XT_DATA 0x0100
196 #define C3DHALL10_DATA_TYPE_12BIT_YT_DATA 0x0140
197 #define C3DHALL10_DATA_TYPE_12BIT_ZT_DATA 0x0180
198 #define C3DHALL10_DATA_TYPE_12BIT_AM_DATA 0x01C0
199 #define C3DHALL10_DATA_TYPE_BIT_MASK 0x01C0
200 #define C3DHALL10_DIAG_EN_DISABLE 0x0000
201 #define C3DHALL10_DIAG_EN_ENABLE 0x0020
202 #define C3DHALL10_DIAG_EN_BIT_MASK 0x0020
203 #define C3DHALL10_Z_HLT_EN_DISABLE 0x0000
204 #define C3DHALL10_Z_HLT_EN_ENABLE 0x0004
205 #define C3DHALL10_Z_HLT_EN_BIT_MASK 0x0004
206 #define C3DHALL10_Y_HLT_EN_DISABLE 0x0000
207 #define C3DHALL10_Y_HLT_EN_ENABLE 0x0002
208 #define C3DHALL10_Y_HLT_EN_BIT_MASK 0x0002
209 #define C3DHALL10_X_HLT_EN_DISABLE 0x0000
210 #define C3DHALL10_X_HLT_EN_ENABLE 0x0001
211 #define C3DHALL10_X_HLT_EN_BIT_MASK 0x0001
217 #define C3DHALL10_ALERT_LATCH_DISABLE 0x0000
218 #define C3DHALL10_ALERT_LATCH_ENABLE 0x2000
219 #define C3DHALL10_ALERT_LATCH_BIT_MASK 0x2000
220 #define C3DHALL10_ALERT_MODE_INTERRUPT 0x0000
221 #define C3DHALL10_ALERT_MODE_SWITCH 0x1000
222 #define C3DHALL10_ALERT_MODE_BIT_MASK 0x1000
223 #define C3DHALL10_STATUS_ALRT_AFE_SYS_NO_ASSERT 0x0000
224 #define C3DHALL10_STATUS_ALRT_AFE_SYS_ASSERT 0x0800
225 #define C3DHALL10_STATUS_ALRT_BIT_MASK 0x0800
226 #define C3DHALL10_RSLT_ALRT_NO_CONV_COMPLETE 0x0000
227 #define C3DHALL10_RSLT_ALRT_CONV_COMPLETE 0x0100
228 #define C3DHALL10_RSLT_ALRT_BIT_MASK 0x0100
229 #define C3DHALL10_THRX_COUNT_1_CONV 0x0000
230 #define C3DHALL10_THRX_COUNT_2_CONV 0x0010
231 #define C3DHALL10_THRX_COUNT_3_CONV 0x0020
232 #define C3DHALL10_THRX_COUNT_4_CONV 0x0030
233 #define C3DHALL10_THRX_COUNT_BIT_MASK 0x0030
234 #define C3DHALL10_T_THRX_ALRT_NO_CROSSED 0x0000
235 #define C3DHALL10_T_THRX_ALRT_CROSSED 0x0008
236 #define C3DHALL10_T_THRX_ALRT_BIT_MASK 0x0008
237 #define C3DHALL10_Z_THRX_ALRT_NO_CROSSED 0x0000
238 #define C3DHALL10_Z_THRX_ALRT_CROSSED 0x0004
239 #define C3DHALL10_Z_THRX_ALRT_BIT_MASK 0x0004
240 #define C3DHALL10_Y_THRX_ALRT_NO_CROSSED 0x0000
241 #define C3DHALL10_Y_THRX_ALRT_CROSSED 0x0002
242 #define C3DHALL10_Y_THRX_ALRT_BIT_MASK 0x0002
243 #define C3DHALL10_X_THRX_ALRT_NO_CROSSED 0x0000
244 #define C3DHALL10_X_THRX_ALRT_CROSSED 0x0001
245 #define C3DHALL10_X_THRX_ALRT_BIT_MASK 0x0001
251 #define C3DHALL10_GAIN_SELECTION_NO_AXIS 0x0000
252 #define C3DHALL10_GAIN_SELECTION_X_AXIS 0x4000
253 #define C3DHALL10_GAIN_SELECTION_Y_AXIS 0x8000
254 #define C3DHALL10_GAIN_SELECTION_Z_AXIS 0xC000
255 #define C3DHALL10_GAIN_SELECTION_BIT_MASK 0xC000
256 #define C3DHALL10_GAIN_VALUE_BIT_MASK 0x07FF
262 #define C3DHALL10_CONV_STATUS_RDY 0x2000
263 #define C3DHALL10_CONV_STATUS_A 0x1000
264 #define C3DHALL10_CONV_STATUS_T 0x0800
265 #define C3DHALL10_CONV_STATUS_Z 0x0400
266 #define C3DHALL10_CONV_STATUS_Y 0x0200
267 #define C3DHALL10_CONV_STATUS_X 0x0100
268 #define C3DHALL10_CONV_STATUS_SET_COUNT 0x0070
269 #define C3DHALL10_CONV_STATUS_ALRT_STATUS 0x0003
275 #define C3DHALL10_ANGLE_RESOLUTION 16.0
276 #define C3DHALL10_TEMP_SENS_T0 25.0
277 #define C3DHALL10_TEMP_ADC_T0 17522
278 #define C3DHALL10_TEMP_ADC_RESOLUTION 60.0
279 #define C3DHALL10_XYZ_RESOLUTION 32768.0
285 #define C3DHALL10_SPI_READ_MASK 0x80
286 #define C3DHALL10_SPI_WRITE_MASK 0x7F
296 #define C3DHALL10_SET_DATA_SAMPLE_EDGE SET_SPI_DATA_SAMPLE_EDGE
297 #define C3DHALL10_SET_DATA_SAMPLE_MIDDLE SET_SPI_DATA_SAMPLE_MIDDLE
315 #define C3DHALL10_MAP_MIKROBUS( cfg, mikrobus ) \
316 cfg.miso = MIKROBUS( mikrobus, MIKROBUS_MISO ); \
317 cfg.mosi = MIKROBUS( mikrobus, MIKROBUS_MOSI ); \
318 cfg.sck = MIKROBUS( mikrobus, MIKROBUS_SCK ); \
319 cfg.cs = MIKROBUS( mikrobus, MIKROBUS_CS ); \
320 cfg.alr = MIKROBUS( mikrobus, MIKROBUS_INT )
494 #endif // C3DHALL10_H
float x_axis
Definition: c3dhall10.h:331
uint16_t magnitude
Definition: c3dhall10.h:335
This file contains SPI specific macros, functions, etc.
@ C3DHALL10_OK
Definition: c3dhall10.h:384
pin_name_t mosi
Definition: c3dhall10.h:364
spi_master_mode_t spi_mode
Definition: c3dhall10.h:373
uint8_t c3dhall10_get_alert_pin(c3dhall10_t *ctx)
3D Hall 10 get alert pin function.
err_t c3dhall10_write_frame(c3dhall10_t *ctx, uint8_t reg_addr, uint16_t data_in)
3D Hall 10 write frame function.
pin_name_t cs
Definition: c3dhall10.h:366
err_t c3dhall10_default_cfg(c3dhall10_t *ctx)
3D Hall 10 default configuration function.
pin_name_t miso
Definition: c3dhall10.h:363
spi_master_t spi
Definition: c3dhall10.h:350
float z_axis
Definition: c3dhall10.h:333
float y_axis
Definition: c3dhall10.h:332
3D Hall 10 Click data object.
Definition: c3dhall10.h:330
float temperature
Definition: c3dhall10.h:336
pin_name_t chip_select
Definition: c3dhall10.h:352
err_t c3dhall10_init(c3dhall10_t *ctx, c3dhall10_cfg_t *cfg)
3D Hall 10 initialization function.
err_t c3dhall10_read_frame(c3dhall10_t *ctx, uint8_t reg_addr, uint16_t *data_out, uint16_t *status)
3D Hall 10 read frame function.
spi_master_chip_select_polarity_t cs_polarity
Definition: c3dhall10.h:374
uint32_t spi_speed
Definition: c3dhall10.h:372
3D Hall 10 Click configuration object.
Definition: c3dhall10.h:361
3D Hall 10 Click context object.
Definition: c3dhall10.h:345
digital_in_t alr
Definition: c3dhall10.h:347
c3dhall10_return_value_t
3D Hall 10 Click return value data.
Definition: c3dhall10.h:383
pin_name_t alr
Definition: c3dhall10.h:369
pin_name_t sck
Definition: c3dhall10.h:365
void c3dhall10_cfg_setup(c3dhall10_cfg_t *cfg)
3D Hall 10 configuration object setup function.
@ C3DHALL10_ERROR
Definition: c3dhall10.h:385
float angle
Definition: c3dhall10.h:334
err_t c3dhall10_read_data(c3dhall10_t *ctx, c3dhall10_data_t *data_out)
3D Hall 10 read data function.