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39 #ifdef PREINIT_SUPPORTED
43 #ifdef MikroCCoreVersion
44 #if MikroCCoreVersion >= 1
49 #include "drv_digital_out.h"
50 #include "drv_digital_in.h"
51 #include "drv_spi_master.h"
74 #define C3DHALL10_REG_DEVICE_CONFIG 0x00
75 #define C3DHALL10_REG_SENSOR_CONFIG 0x01
76 #define C3DHALL10_REG_SYSTEM_CONFIG 0x02
77 #define C3DHALL10_REG_ALERT_CONFIG 0x03
78 #define C3DHALL10_REG_X_THRX_CONFIG 0x04
79 #define C3DHALL10_REG_Y_THRX_CONFIG 0x05
80 #define C3DHALL10_REG_Z_THRX_CONFIG 0x06
81 #define C3DHALL10_REG_T_THRX_CONFIG 0x07
82 #define C3DHALL10_REG_CONV_STATUS 0x08
83 #define C3DHALL10_REG_X_CH_RESULT 0x09
84 #define C3DHALL10_REG_Y_CH_RESULT 0x0A
85 #define C3DHALL10_REG_Z_CH_RESULT 0x0B
86 #define C3DHALL10_REG_TEMP_RESULT 0x0C
87 #define C3DHALL10_REG_AFE_STATUS 0x0D
88 #define C3DHALL10_REG_SYS_STATUS 0x0E
89 #define C3DHALL10_REG_TEST_CONFIG 0x0F
90 #define C3DHALL10_REG_OSC_MONITOR 0x10
91 #define C3DHALL10_REG_MAG_GAIN_CONFIG 0x11
92 #define C3DHALL10_REG_MAG_OFFSET_CONFIG 0x12
93 #define C3DHALL10_REG_ANGLE_RESULT 0x13
94 #define C3DHALL10_REG_MAGNITUDE_RESULT 0x14
112 #define C3DHALL10_CONV_AVG_1X 0x0000
113 #define C3DHALL10_CONV_AVG_2X 0x1000
114 #define C3DHALL10_CONV_AVG_4X 0x2000
115 #define C3DHALL10_CONV_AVG_8X 0x3000
116 #define C3DHALL10_CONV_AVG_16X 0x4000
117 #define C3DHALL10_CONV_AVG_32X 0x5000
118 #define C3DHALL10_CONV_AVG_BIT_MASK 0x7000
119 #define C3DHALL10_MAG_TEMPCO_0 0x0000
120 #define C3DHALL10_MAG_TEMPCO_0p12 0x0100
121 #define C3DHALL10_MAG_TEMPCO_0p03 0x0200
122 #define C3DHALL10_MAG_TEMPCO_0p2 0x0300
123 #define C3DHALL10_MAG_TEMPCO_BIT_MASK 0x0300
124 #define C3DHALL10_OPERATING_MODE_CONFIG 0x0000
125 #define C3DHALL10_OPERATING_MODE_STANDBY 0x0010
126 #define C3DHALL10_OPERATING_MODE_MEASURE 0x0020
127 #define C3DHALL10_OPERATING_MODE_TRIGGER 0x0030
128 #define C3DHALL10_OPERATING_MODE_DUTY_CYCLED 0x0040
129 #define C3DHALL10_OPERATING_MODE_SLEEP 0x0050
130 #define C3DHALL10_OPERATING_MODE_DEEP_SLEEP 0x0060
131 #define C3DHALL10_OPERATING_MODE_BIT_MASK 0x0070
132 #define C3DHALL10_T_CH_EN_DISABLE 0x0000
133 #define C3DHALL10_T_CH_EN_ENABLE 0x0008
134 #define C3DHALL10_T_CH_EN_BIT_MASK 0x0008
135 #define C3DHALL10_T_RATE_PER_CONV_AVG 0x0000
136 #define C3DHALL10_T_RATE_ONCE_PER_CONV 0x0004
137 #define C3DHALL10_T_RATE_BIT_MASK 0x0004
138 #define C3DHALL10_T_HLT_EN_DISABLE 0x0000
139 #define C3DHALL10_T_HLT_EN_ENABLE 0x0002
140 #define C3DHALL10_T_HLT_EN_BIT_MASK 0x0002
146 #define C3DHALL10_ANGLE_EN_NO_ANGLE 0x0000
147 #define C3DHALL10_ANGLE_EN_XY_ANGLE 0x4000
148 #define C3DHALL10_ANGLE_EN_YZ_ANGLE 0x8000
149 #define C3DHALL10_ANGLE_EN_XZ_ANGLE 0xC000
150 #define C3DHALL10_ANGLE_EN_BIT_MASK 0xC000
151 #define C3DHALL10_SLEEPTIME_1MS 0x0000
152 #define C3DHALL10_SLEEPTIME_5MS 0x0400
153 #define C3DHALL10_SLEEPTIME_10MS 0x0800
154 #define C3DHALL10_SLEEPTIME_15MS 0x0C00
155 #define C3DHALL10_SLEEPTIME_20MS 0x1000
156 #define C3DHALL10_SLEEPTIME_30MS 0x1400
157 #define C3DHALL10_SLEEPTIME_50MS 0x1800
158 #define C3DHALL10_SLEEPTIME_100MS 0x1C00
159 #define C3DHALL10_SLEEPTIME_500MS 0x2000
160 #define C3DHALL10_SLEEPTIME_1000MS 0x2400
161 #define C3DHALL10_SLEEPTIME_BIT_MASK 0x3C00
162 #define C3DHALL10_MAG_CH_EN_DISABLE 0x0000
163 #define C3DHALL10_MAG_CH_EN_ENABLE_X 0x0040
164 #define C3DHALL10_MAG_CH_EN_ENABLE_Y 0x0080
165 #define C3DHALL10_MAG_CH_EN_ENABLE_XY 0x00C0
166 #define C3DHALL10_MAG_CH_EN_ENABLE_Z 0x0100
167 #define C3DHALL10_MAG_CH_EN_ENABLE_ZX 0x0140
168 #define C3DHALL10_MAG_CH_EN_ENABLE_YZ 0x0180
169 #define C3DHALL10_MAG_CH_EN_ENABLE_XYZ 0x01C0
170 #define C3DHALL10_MAG_CH_EN_ENABLE_XYX 0x0200
171 #define C3DHALL10_MAG_CH_EN_ENABLE_YXY 0x0240
172 #define C3DHALL10_MAG_CH_EN_ENABLE_YZY 0x0280
173 #define C3DHALL10_MAG_CH_EN_ENABLE_ZYZ 0x02C0
174 #define C3DHALL10_MAG_CH_EN_ENABLE_ZXZ 0x0300
175 #define C3DHALL10_MAG_CH_EN_ENABLE_XZX 0x0340
176 #define C3DHALL10_MAG_CH_EN_ENABLE_XYZYX 0x0380
177 #define C3DHALL10_MAG_CH_EN_ENABLE_XYZZYX 0x03C0
178 #define C3DHALL10_MAG_CH_EN_BIT_MASK 0x03C0
179 #define C3DHALL10_Z_RANGE_50mT 0x0000
180 #define C3DHALL10_Z_RANGE_25mT 0x0010
181 #define C3DHALL10_Z_RANGE_100mT 0x0020
182 #define C3DHALL10_Z_RANGE_BIT_MASK 0x0030
183 #define C3DHALL10_Y_RANGE_50mT 0x0000
184 #define C3DHALL10_Y_RANGE_25mT 0x0004
185 #define C3DHALL10_Y_RANGE_100mT 0x0008
186 #define C3DHALL10_Y_RANGE_BIT_MASK 0x000C
187 #define C3DHALL10_X_RANGE_50mT 0x0000
188 #define C3DHALL10_X_RANGE_25mT 0x0001
189 #define C3DHALL10_X_RANGE_100mT 0x0002
190 #define C3DHALL10_X_RANGE_BIT_MASK 0x0003
196 #define C3DHALL10_DIAG_SEL_ALL_DP_DIAG_ALL 0x0000
197 #define C3DHALL10_DIAG_SEL_EN_DP_ONLY_DIAG_ALL 0x1000
198 #define C3DHALL10_DIAG_SEL_ALL_DP_DIAG_SEQ 0x2000
199 #define C3DHALL10_DIAG_SEL_EN_DP_ONLY_DIAG_SEQ 0x3000
200 #define C3DHALL10_DIAG_SEL_BIT_MASK 0x3000
201 #define C3DHALL10_TRIGGER_MODE_SPI_CMD 0x0000
202 #define C3DHALL10_TRIGGER_MODE_CS_PULSE 0x0200
203 #define C3DHALL10_TRIGGER_MODE_ALERT_PULSE 0x0400
204 #define C3DHALL10_TRIGGER_MODE_BIT_MASK 0x0600
205 #define C3DHALL10_DATA_TYPE_32BIT_REG 0x0000
206 #define C3DHALL10_DATA_TYPE_12BIT_XY_DATA 0x0040
207 #define C3DHALL10_DATA_TYPE_12BIT_XZ_DATA 0x0080
208 #define C3DHALL10_DATA_TYPE_12BIT_ZY_DATA 0x00C0
209 #define C3DHALL10_DATA_TYPE_12BIT_XT_DATA 0x0100
210 #define C3DHALL10_DATA_TYPE_12BIT_YT_DATA 0x0140
211 #define C3DHALL10_DATA_TYPE_12BIT_ZT_DATA 0x0180
212 #define C3DHALL10_DATA_TYPE_12BIT_AM_DATA 0x01C0
213 #define C3DHALL10_DATA_TYPE_BIT_MASK 0x01C0
214 #define C3DHALL10_DIAG_EN_DISABLE 0x0000
215 #define C3DHALL10_DIAG_EN_ENABLE 0x0020
216 #define C3DHALL10_DIAG_EN_BIT_MASK 0x0020
217 #define C3DHALL10_Z_HLT_EN_DISABLE 0x0000
218 #define C3DHALL10_Z_HLT_EN_ENABLE 0x0004
219 #define C3DHALL10_Z_HLT_EN_BIT_MASK 0x0004
220 #define C3DHALL10_Y_HLT_EN_DISABLE 0x0000
221 #define C3DHALL10_Y_HLT_EN_ENABLE 0x0002
222 #define C3DHALL10_Y_HLT_EN_BIT_MASK 0x0002
223 #define C3DHALL10_X_HLT_EN_DISABLE 0x0000
224 #define C3DHALL10_X_HLT_EN_ENABLE 0x0001
225 #define C3DHALL10_X_HLT_EN_BIT_MASK 0x0001
231 #define C3DHALL10_ALERT_LATCH_DISABLE 0x0000
232 #define C3DHALL10_ALERT_LATCH_ENABLE 0x2000
233 #define C3DHALL10_ALERT_LATCH_BIT_MASK 0x2000
234 #define C3DHALL10_ALERT_MODE_INTERRUPT 0x0000
235 #define C3DHALL10_ALERT_MODE_SWITCH 0x1000
236 #define C3DHALL10_ALERT_MODE_BIT_MASK 0x1000
237 #define C3DHALL10_STATUS_ALRT_AFE_SYS_NO_ASSERT 0x0000
238 #define C3DHALL10_STATUS_ALRT_AFE_SYS_ASSERT 0x0800
239 #define C3DHALL10_STATUS_ALRT_BIT_MASK 0x0800
240 #define C3DHALL10_RSLT_ALRT_NO_CONV_COMPLETE 0x0000
241 #define C3DHALL10_RSLT_ALRT_CONV_COMPLETE 0x0100
242 #define C3DHALL10_RSLT_ALRT_BIT_MASK 0x0100
243 #define C3DHALL10_THRX_COUNT_1_CONV 0x0000
244 #define C3DHALL10_THRX_COUNT_2_CONV 0x0010
245 #define C3DHALL10_THRX_COUNT_3_CONV 0x0020
246 #define C3DHALL10_THRX_COUNT_4_CONV 0x0030
247 #define C3DHALL10_THRX_COUNT_BIT_MASK 0x0030
248 #define C3DHALL10_T_THRX_ALRT_NO_CROSSED 0x0000
249 #define C3DHALL10_T_THRX_ALRT_CROSSED 0x0008
250 #define C3DHALL10_T_THRX_ALRT_BIT_MASK 0x0008
251 #define C3DHALL10_Z_THRX_ALRT_NO_CROSSED 0x0000
252 #define C3DHALL10_Z_THRX_ALRT_CROSSED 0x0004
253 #define C3DHALL10_Z_THRX_ALRT_BIT_MASK 0x0004
254 #define C3DHALL10_Y_THRX_ALRT_NO_CROSSED 0x0000
255 #define C3DHALL10_Y_THRX_ALRT_CROSSED 0x0002
256 #define C3DHALL10_Y_THRX_ALRT_BIT_MASK 0x0002
257 #define C3DHALL10_X_THRX_ALRT_NO_CROSSED 0x0000
258 #define C3DHALL10_X_THRX_ALRT_CROSSED 0x0001
259 #define C3DHALL10_X_THRX_ALRT_BIT_MASK 0x0001
265 #define C3DHALL10_GAIN_SELECTION_NO_AXIS 0x0000
266 #define C3DHALL10_GAIN_SELECTION_X_AXIS 0x4000
267 #define C3DHALL10_GAIN_SELECTION_Y_AXIS 0x8000
268 #define C3DHALL10_GAIN_SELECTION_Z_AXIS 0xC000
269 #define C3DHALL10_GAIN_SELECTION_BIT_MASK 0xC000
270 #define C3DHALL10_GAIN_VALUE_BIT_MASK 0x07FF
276 #define C3DHALL10_CONV_STATUS_RDY 0x2000
277 #define C3DHALL10_CONV_STATUS_A 0x1000
278 #define C3DHALL10_CONV_STATUS_T 0x0800
279 #define C3DHALL10_CONV_STATUS_Z 0x0400
280 #define C3DHALL10_CONV_STATUS_Y 0x0200
281 #define C3DHALL10_CONV_STATUS_X 0x0100
282 #define C3DHALL10_CONV_STATUS_SET_COUNT 0x0070
283 #define C3DHALL10_CONV_STATUS_ALRT_STATUS 0x0003
289 #define C3DHALL10_ANGLE_RESOLUTION 16.0
290 #define C3DHALL10_TEMP_SENS_T0 25.0
291 #define C3DHALL10_TEMP_ADC_T0 17522
292 #define C3DHALL10_TEMP_ADC_RESOLUTION 60.0
293 #define C3DHALL10_XYZ_RESOLUTION 32768.0
299 #define C3DHALL10_SPI_READ_MASK 0x80
300 #define C3DHALL10_SPI_WRITE_MASK 0x7F
310 #define C3DHALL10_SET_DATA_SAMPLE_EDGE SET_SPI_DATA_SAMPLE_EDGE
311 #define C3DHALL10_SET_DATA_SAMPLE_MIDDLE SET_SPI_DATA_SAMPLE_MIDDLE
329 #define C3DHALL10_MAP_MIKROBUS( cfg, mikrobus ) \
330 cfg.miso = MIKROBUS( mikrobus, MIKROBUS_MISO ); \
331 cfg.mosi = MIKROBUS( mikrobus, MIKROBUS_MOSI ); \
332 cfg.sck = MIKROBUS( mikrobus, MIKROBUS_SCK ); \
333 cfg.cs = MIKROBUS( mikrobus, MIKROBUS_CS ); \
334 cfg.alr = MIKROBUS( mikrobus, MIKROBUS_INT )
508 #endif // C3DHALL10_H
float x_axis
Definition: c3dhall10.h:345
uint16_t magnitude
Definition: c3dhall10.h:349
This file contains SPI specific macros, functions, etc.
@ C3DHALL10_OK
Definition: c3dhall10.h:398
pin_name_t mosi
Definition: c3dhall10.h:378
spi_master_mode_t spi_mode
Definition: c3dhall10.h:387
uint8_t c3dhall10_get_alert_pin(c3dhall10_t *ctx)
3D Hall 10 get alert pin function.
err_t c3dhall10_write_frame(c3dhall10_t *ctx, uint8_t reg_addr, uint16_t data_in)
3D Hall 10 write frame function.
pin_name_t cs
Definition: c3dhall10.h:380
err_t c3dhall10_default_cfg(c3dhall10_t *ctx)
3D Hall 10 default configuration function.
pin_name_t miso
Definition: c3dhall10.h:377
spi_master_t spi
Definition: c3dhall10.h:364
float z_axis
Definition: c3dhall10.h:347
float y_axis
Definition: c3dhall10.h:346
3D Hall 10 Click data object.
Definition: c3dhall10.h:344
float temperature
Definition: c3dhall10.h:350
pin_name_t chip_select
Definition: c3dhall10.h:366
err_t c3dhall10_init(c3dhall10_t *ctx, c3dhall10_cfg_t *cfg)
3D Hall 10 initialization function.
err_t c3dhall10_read_frame(c3dhall10_t *ctx, uint8_t reg_addr, uint16_t *data_out, uint16_t *status)
3D Hall 10 read frame function.
spi_master_chip_select_polarity_t cs_polarity
Definition: c3dhall10.h:388
uint32_t spi_speed
Definition: c3dhall10.h:386
3D Hall 10 Click configuration object.
Definition: c3dhall10.h:375
3D Hall 10 Click context object.
Definition: c3dhall10.h:359
digital_in_t alr
Definition: c3dhall10.h:361
c3dhall10_return_value_t
3D Hall 10 Click return value data.
Definition: c3dhall10.h:397
pin_name_t alr
Definition: c3dhall10.h:383
pin_name_t sck
Definition: c3dhall10.h:379
void c3dhall10_cfg_setup(c3dhall10_cfg_t *cfg)
3D Hall 10 configuration object setup function.
@ C3DHALL10_ERROR
Definition: c3dhall10.h:399
float angle
Definition: c3dhall10.h:348
err_t c3dhall10_read_data(c3dhall10_t *ctx, c3dhall10_data_t *data_out)
3D Hall 10 read data function.