mram3  2.0.0.0
mram3.h
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22 
28 #ifndef MRAM3_H
29 #define MRAM3_H
30 
31 #ifdef __cplusplus
32 extern "C"{
33 #endif
34 
35 #include "mikrosdk_version.h"
36 
37 #ifdef __GNUC__
38 #if mikroSDK_GET_VERSION < 20800ul
39 #include "rcu_delays.h"
40 #else
41 #include "delays.h"
42 #endif
43 #endif
44 
45 #include "drv_digital_out.h"
46 #include "drv_digital_in.h"
47 #include "drv_spi_master.h"
48 #include "spi_specifics.h"
49 
70 #define MRAM3_CMD_NOP 0x00
71 #define MRAM3_CMD_WRITE_ENABLE 0x06
72 #define MRAM3_CMD_WRITE_DISABLE 0x04
73 #define MRAM3_CMD_ENABLE_DPI 0x37
74 #define MRAM3_CMD_ENABLE_QPI 0x38
75 #define MRAM3_CMD_ENABLE_SPI 0xFF
76 #define MRAM3_CMD_ENTER_DEEP_POWER_DOWN 0xB9
77 #define MRAM3_CMD_ENTER_HIBERNATE 0xBA
78 #define MRAM3_CMD_SOFT_RESET_ENABLE 0x66
79 #define MRAM3_CMD_SOFT_RESET 0x99
80 #define MRAM3_CMD_EXIT_DEEP_POWER_DOWN 0xAB
81 
86 #define MRAM3_CMD_READ_STATUS 0x05
87 #define MRAM3_CMD_READ_CONFIG_1 0x35
88 #define MRAM3_CMD_READ_CONFIG_2 0x3F
89 #define MRAM3_CMD_READ_CONFIG_3 0x44
90 #define MRAM3_CMD_READ_CONFIG_4 0x45
91 #define MRAM3_CMD_READ_CONFIG_ALL 0x46
92 #define MRAM3_CMD_READ_DEVICE_ID 0x9F
93 #define MRAM3_CMD_READ_UNIQUE_ID 0x4C
94 #define MRAM3_CMD_READ_SERIAL_NUMBER 0xC3
95 #define MRAM3_CMD_READ_AUG_ARRAY_PROTECT 0x14
96 #define MRAM3_CMD_READ_ADDRESS_BASED 0x65
97 
102 #define MRAM3_CMD_WRITE_STATUS 0x01
103 #define MRAM3_CMD_WRITE_CONFIG_ALL 0x87
104 #define MRAM3_CMD_WRITE_SERIAL_NUMBER 0xC2
105 #define MRAM3_CMD_WRITE_AUG_ARRAY_PROTECT 0x1A
106 #define MRAM3_CMD_WRITE_ADDRESS_BASED 0x71
107 
112 #define MRAM3_CMD_READ_MEMORY_SDR 0x03
113 #define MRAM3_CMD_FAST_READ_MEMORY_SDR 0x0B
114 #define MRAM3_CMD_FAST_READ_MEMORY_DDR 0x0D
115 #define MRAM3_CMD_READ_DUAL_OUT_MEMORY_SDR 0x3B
116 #define MRAM3_CMD_READ_QUAD_OUT_MEMORY_SDR 0x6B
117 #define MRAM3_CMD_READ_DUAL_IO_MEMORY_SDR 0xBB
118 #define MRAM3_CMD_READ_DUAL_IO_MEMORY_DDR 0xBD
119 #define MRAM3_CMD_READ_QUAD_IO_MEMORY_SDR 0xEB
120 #define MRAM3_CMD_READ_QUAD_IO_MEMORY_DDR 0xED
121 
126 #define MRAM3_CMD_WRITE_MEMORY_SDR 0x02
127 #define MRAM3_CMD_FAST_WRITE_MEMORY_SDR 0xDA
128 #define MRAM3_CMD_FAST_WRITE_MEMORY_DDR 0xDE
129 #define MRAM3_CMD_WRITE_DUAL_IN_MEMORY_SDR 0xA2
130 #define MRAM3_CMD_WRITE_QUAD_IN_MEMORY_SDR 0x32
131 #define MRAM3_CMD_WRITE_QUAD_IN_MEMORY_DDR 0x31
132 #define MRAM3_CMD_WRITE_DUAL_IO_MEMORY_SDR 0xA1
133 #define MRAM3_CMD_WRITE_QUAD_IO_MEMORY_SDR 0xD2
134 #define MRAM3_CMD_WRITE_QUAD_IO_MEMORY_DDR 0xD1
135 
140 #define MRAM3_CMD_READ_AUG_STORAGE_SDR 0x4B
141 #define MRAM3_CMD_WRITE_AUG_STORAGE_SDR 0x42
142  // mram3_reg
144 
159 #define MRAM3_STATUS_WPEN 0x80
160 #define MRAM3_STATUS_SNPEN 0x40
161 #define MRAM3_STATUS_TBSEL_BOTTOM 0x20
162 #define MRAM3_STATUS_TBSEL_TOP 0x00
163 #define MRAM3_STATUS_BPSEL_NONE 0x00
164 #define MRAM3_STATUS_BPSEL_UPPER_1_64 0x04
165 #define MRAM3_STATUS_BPSEL_UPPER_1_32 0x08
166 #define MRAM3_STATUS_BPSEL_UPPER_1_16 0x0C
167 #define MRAM3_STATUS_BPSEL_UPPER_1_8 0x10
168 #define MRAM3_STATUS_BPSEL_UPPER_QUARTER 0x14
169 #define MRAM3_STATUS_BPSEL_UPPER_HALF 0x18
170 #define MRAM3_STATUS_BPSEL_ALL 0x1C
171 #define MRAM3_STATUS_WREN 0x02
172 
177 #define MRAM3_CONFIG1_MAPLK_LOCK 0x04
178 #define MRAM3_CONFIG1_MAPLK_UNLOCK 0x00
179 #define MRAM3_CONFIG1_ASPLK_LOCK 0x01
180 #define MRAM3_CONFIG1_ASPLK_UNLOCK 0x00
181 #define MRAM3_CONFIG2_QUAD_SPI 0x40
182 #define MRAM3_CONFIG2_DUAL_SPI 0x10
183 #define MRAM3_CONFIG2_MLATS_0_CYCLES 0x00
184 #define MRAM3_CONFIG2_MLATS_1_CYCLE 0x01
185 #define MRAM3_CONFIG2_MLATS_2_CYCLES 0x02
186 #define MRAM3_CONFIG2_MLATS_3_CYCLES 0x03
187 #define MRAM3_CONFIG2_MLATS_4_CYCLES 0x04
188 #define MRAM3_CONFIG2_MLATS_5_CYCLES 0x05
189 #define MRAM3_CONFIG2_MLATS_6_CYCLES 0x06
190 #define MRAM3_CONFIG2_MLATS_7_CYCLES 0x07
191 #define MRAM3_CONFIG2_MLATS_8_CYCLES 0x08
192 #define MRAM3_CONFIG2_MLATS_9_CYCLES 0x09
193 #define MRAM3_CONFIG2_MLATS_10_CYCLES 0x0A
194 #define MRAM3_CONFIG2_MLATS_11_CYCLES 0x0B
195 #define MRAM3_CONFIG2_MLATS_12_CYCLES 0x0C
196 #define MRAM3_CONFIG2_MLATS_13_CYCLES 0x0D
197 #define MRAM3_CONFIG2_MLATS_14_CYCLES 0x0E
198 #define MRAM3_CONFIG2_MLATS_15_CYCLES 0x0F
199 #define MRAM3_CONFIG3_ODSEL_35OHM 0x00
200 #define MRAM3_CONFIG3_ODSEL_75OHM 0x20
201 #define MRAM3_CONFIG3_ODSEL_60OHM 0x40
202 #define MRAM3_CONFIG3_ODSEL_45OHM 0x60
203 #define MRAM3_CONFIG3_ODSEL_40OHM 0xA0
204 #define MRAM3_CONFIG3_ODSEL_20OHM 0xC0
205 #define MRAM3_CONFIG3_ODSEL_15OHM 0xE0
206 #define MRAM3_CONFIG3_WRAPS_ENABLE 0x10
207 #define MRAM3_CONFIG3_WRPLS_16BYTE 0x00
208 #define MRAM3_CONFIG3_WRPLS_32BYTE 0x01
209 #define MRAM3_CONFIG3_WRPLS_64BYTE 0x02
210 #define MRAM3_CONFIG3_WRPLS_128BYTE 0x03
211 #define MRAM3_CONFIG3_WRPLS_256BYTE 0x04
212 #define MRAM3_CONFIG4_WRENS_NORMAL 0x04
213 #define MRAM3_CONFIG4_WRENS_SRAM 0x05
214 #define MRAM3_CONFIG4_WRENS_BACK_TO_BACK 0x06
215 
220 #define MRAM3_MIN_ADDRESS 0x000000
221 #define MRAM3_MAX_ADDRESS 0x01FFFFul
222 
227 #define MRAM3_DEVICE_ID 0xE6010102ul
228 
237 #define MRAM3_SET_DATA_SAMPLE_EDGE SET_SPI_DATA_SAMPLE_EDGE
238 #define MRAM3_SET_DATA_SAMPLE_MIDDLE SET_SPI_DATA_SAMPLE_MIDDLE
239  // mram3_set
241 
256 #define MRAM3_MAP_MIKROBUS( cfg, mikrobus ) \
257  cfg.miso = MIKROBUS( mikrobus, MIKROBUS_MISO ); \
258  cfg.mosi = MIKROBUS( mikrobus, MIKROBUS_MOSI ); \
259  cfg.sck = MIKROBUS( mikrobus, MIKROBUS_SCK ); \
260  cfg.cs = MIKROBUS( mikrobus, MIKROBUS_CS ); \
261  cfg.io3 = MIKROBUS( mikrobus, MIKROBUS_RST ); \
262  cfg.wp = MIKROBUS( mikrobus, MIKROBUS_PWM );
263  // mram3_map // mram3
266 
271 typedef struct
272 {
273  // Output pins
274  digital_out_t io3;
275  digital_out_t wp;
277  // Modules
278  spi_master_t spi;
280  pin_name_t chip_select;
282 } mram3_t;
283 
288 typedef struct
289 {
290  // Communication gpio pins
291  pin_name_t miso;
292  pin_name_t mosi;
293  pin_name_t sck;
294  pin_name_t cs;
296  // Additional gpio pins
297  pin_name_t io3;
298  pin_name_t wp;
300  // static variable
301  uint32_t spi_speed;
302  spi_master_mode_t spi_mode;
303  spi_master_chip_select_polarity_t cs_polarity;
305 } mram3_cfg_t;
306 
311 typedef enum
312 {
313  MRAM3_OK = 0,
314  MRAM3_ERROR = -1
315 
317 
334 
348 err_t mram3_init ( mram3_t *ctx, mram3_cfg_t *cfg );
349 
362 err_t mram3_default_cfg ( mram3_t *ctx );
363 
375 err_t mram3_write_cmd ( mram3_t *ctx, uint8_t cmd );
376 
391 err_t mram3_write_cmd_data ( mram3_t *ctx, uint8_t cmd, uint8_t *data_in, uint8_t len );
392 
407 err_t mram3_read_cmd_data ( mram3_t *ctx, uint8_t cmd, uint8_t *data_out, uint8_t len );
408 
424 err_t mram3_write_cmd_address_data ( mram3_t *ctx, uint8_t cmd, uint32_t address, uint8_t *data_in, uint32_t len );
425 
441 err_t mram3_read_cmd_address_data ( mram3_t *ctx, uint8_t cmd, uint32_t address, uint8_t *data_out, uint32_t len );
442 
457 err_t mram3_memory_write ( mram3_t *ctx, uint32_t address, uint8_t *data_in, uint32_t len );
458 
473 err_t mram3_memory_read ( mram3_t *ctx, uint32_t address, uint8_t *data_out, uint32_t len );
474 
489 err_t mram3_aug_memory_write ( mram3_t *ctx, uint8_t address, uint8_t *data_in, uint8_t len );
490 
505 err_t mram3_aug_memory_read ( mram3_t *ctx, uint8_t address, uint8_t *data_out, uint8_t len );
506 
518 
528 
538 
547 err_t mram3_soft_reset ( mram3_t *ctx );
548 
560 err_t mram3_write_status ( mram3_t *ctx, uint8_t status );
561 
573 err_t mram3_read_status ( mram3_t *ctx, uint8_t *status );
574 
575 #ifdef __cplusplus
576 }
577 #endif
578 #endif // MRAM3_H
579  // mram3
581 
582 // ------------------------------------------------------------------------ END
mram3_init
err_t mram3_init(mram3_t *ctx, mram3_cfg_t *cfg)
MRAM 3 initialization function.
MRAM3_OK
@ MRAM3_OK
Definition: mram3.h:313
mram3_cfg_t::sck
pin_name_t sck
Definition: mram3.h:293
mram3_write_cmd
err_t mram3_write_cmd(mram3_t *ctx, uint8_t cmd)
MRAM 3 write cmd function.
mram3_cfg_t::mosi
pin_name_t mosi
Definition: mram3.h:292
mram3_cfg_t::miso
pin_name_t miso
Definition: mram3.h:291
mram3_memory_write
err_t mram3_memory_write(mram3_t *ctx, uint32_t address, uint8_t *data_in, uint32_t len)
MRAM 3 memory write function.
mram3_t::wp
digital_out_t wp
Definition: mram3.h:275
mram3_write_status
err_t mram3_write_status(mram3_t *ctx, uint8_t status)
MRAM 3 write status function.
mram3_cfg_t::spi_mode
spi_master_mode_t spi_mode
Definition: mram3.h:302
spi_specifics.h
This file contains SPI specific macros, functions, etc.
mram3_write_enable
err_t mram3_write_enable(mram3_t *ctx)
MRAM 3 write enable function.
mram3_t::spi
spi_master_t spi
Definition: mram3.h:278
mram3_check_communication
err_t mram3_check_communication(mram3_t *ctx)
MRAM 3 check communication function.
mram3_cfg_t
MRAM 3 Click configuration object.
Definition: mram3.h:289
mram3_cfg_t::io3
pin_name_t io3
Definition: mram3.h:297
mram3_cfg_t::cs
pin_name_t cs
Definition: mram3.h:294
mram3_aug_memory_write
err_t mram3_aug_memory_write(mram3_t *ctx, uint8_t address, uint8_t *data_in, uint8_t len)
MRAM 3 aug memory write function.
mram3_memory_read
err_t mram3_memory_read(mram3_t *ctx, uint32_t address, uint8_t *data_out, uint32_t len)
MRAM 3 memory read function.
mram3_default_cfg
err_t mram3_default_cfg(mram3_t *ctx)
MRAM 3 default configuration function.
mram3_read_status
err_t mram3_read_status(mram3_t *ctx, uint8_t *status)
MRAM 3 read status function.
mram3_read_cmd_address_data
err_t mram3_read_cmd_address_data(mram3_t *ctx, uint8_t cmd, uint32_t address, uint8_t *data_out, uint32_t len)
MRAM 3 read cmd address data function.
mram3_read_cmd_data
err_t mram3_read_cmd_data(mram3_t *ctx, uint8_t cmd, uint8_t *data_out, uint8_t len)
MRAM 3 read cmd data function.
mram3_cfg_setup
void mram3_cfg_setup(mram3_cfg_t *cfg)
MRAM 3 configuration object setup function.
mram3_return_value_t
mram3_return_value_t
MRAM 3 Click return value data.
Definition: mram3.h:312
mram3_t
MRAM 3 Click context object.
Definition: mram3.h:272
mram3_write_cmd_data
err_t mram3_write_cmd_data(mram3_t *ctx, uint8_t cmd, uint8_t *data_in, uint8_t len)
MRAM 3 write cmd data function.
mram3_cfg_t::cs_polarity
spi_master_chip_select_polarity_t cs_polarity
Definition: mram3.h:303
mram3_cfg_t::spi_speed
uint32_t spi_speed
Definition: mram3.h:301
mram3_t::chip_select
pin_name_t chip_select
Definition: mram3.h:280
mram3_aug_memory_read
err_t mram3_aug_memory_read(mram3_t *ctx, uint8_t address, uint8_t *data_out, uint8_t len)
MRAM 3 aug memory read function.
mram3_cfg_t::wp
pin_name_t wp
Definition: mram3.h:298
mram3_soft_reset
err_t mram3_soft_reset(mram3_t *ctx)
MRAM 3 soft reset function.
mram3_write_protect
err_t mram3_write_protect(mram3_t *ctx)
MRAM 3 write protect function.
mram3_write_cmd_address_data
err_t mram3_write_cmd_address_data(mram3_t *ctx, uint8_t cmd, uint32_t address, uint8_t *data_in, uint32_t len)
MRAM 3 write cmd address data function.
mram3_t::io3
digital_out_t io3
Definition: mram3.h:274
MRAM3_ERROR
@ MRAM3_ERROR
Definition: mram3.h:314