dram  2.1.0.0
dram.h
Go to the documentation of this file.
1 /****************************************************************************
2 ** Copyright (C) 2020 MikroElektronika d.o.o.
3 ** Contact: https://www.mikroe.com/contact
4 **
5 ** Permission is hereby granted, free of charge, to any person obtaining a copy
6 ** of this software and associated documentation files (the "Software"), to deal
7 ** in the Software without restriction, including without limitation the rights
8 ** to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
9 ** copies of the Software, and to permit persons to whom the Software is
10 ** furnished to do so, subject to the following conditions:
11 ** The above copyright notice and this permission notice shall be
12 ** included in all copies or substantial portions of the Software.
13 **
14 ** THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
15 ** EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
16 ** OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
17 ** IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM,
18 ** DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT
19 ** OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
20 ** USE OR OTHER DEALINGS IN THE SOFTWARE.
21 ****************************************************************************/
22 
28 #ifndef DRAM_H
29 #define DRAM_H
30 
31 #ifdef __cplusplus
32 extern "C"{
33 #endif
34 
39 #ifdef PREINIT_SUPPORTED
40 #include "preinit.h"
41 #endif
42 
43 #ifdef MikroCCoreVersion
44  #if MikroCCoreVersion >= 1
45  #include "delays.h"
46  #endif
47 #endif
48 
49 #include "drv_digital_out.h"
50 #include "drv_digital_in.h"
51 #include "drv_spi_master.h"
52 #include "spi_specifics.h"
53 
74 #define DRAM_CMD_READ 0x03
75 #define DRAM_CMD_FAST_READ 0x0B
76 #define DRAM_CMD_WRITE 0x02
77 #define DRAM_CMD_RESET_ENABLE 0x66
78 #define DRAM_CMD_RESET 0x99
79 #define DRAM_CMD_WRAP_BOUNDARY_TOGGLE 0xC0
80 #define DRAM_CMD_READ_ID 0x9F
81  // dram_reg
83 
98 #define DRAM_MIN_ADDRESS 0x000000
99 #define DRAM_MAX_ADDRESS 0x7FFFFFul
100 
105 #define DRAM_MANUFACTURER_ID 0x0D
106 
115 #define DRAM_SET_DATA_SAMPLE_EDGE SET_SPI_DATA_SAMPLE_EDGE
116 #define DRAM_SET_DATA_SAMPLE_MIDDLE SET_SPI_DATA_SAMPLE_MIDDLE
117  // dram_set
119 
134 #define DRAM_MAP_MIKROBUS( cfg, mikrobus ) \
135  cfg.miso = MIKROBUS( mikrobus, MIKROBUS_MISO ); \
136  cfg.mosi = MIKROBUS( mikrobus, MIKROBUS_MOSI ); \
137  cfg.sck = MIKROBUS( mikrobus, MIKROBUS_SCK ); \
138  cfg.cs = MIKROBUS( mikrobus, MIKROBUS_CS ); \
139  cfg.io3 = MIKROBUS( mikrobus, MIKROBUS_RST ); \
140  cfg.io2 = MIKROBUS( mikrobus, MIKROBUS_PWM );
141  // dram_map // dram
144 
149 typedef struct
150 {
151  // Output pins
152  digital_out_t io3;
153  digital_out_t io2;
155  // Modules
156  spi_master_t spi;
158  pin_name_t chip_select;
160 } dram_t;
161 
166 typedef struct
167 {
168  // Communication gpio pins
169  pin_name_t miso;
170  pin_name_t mosi;
171  pin_name_t sck;
172  pin_name_t cs;
174  // Additional gpio pins
175  pin_name_t io3;
176  pin_name_t io2;
178  // static variable
179  uint32_t spi_speed;
180  spi_master_mode_t spi_mode;
181  spi_master_chip_select_polarity_t cs_polarity;
183 } dram_cfg_t;
184 
189 typedef enum
190 {
191  DRAM_OK = 0,
192  DRAM_ERROR = -1
193 
195 
212 
226 err_t dram_init ( dram_t *ctx, dram_cfg_t *cfg );
227 
242 err_t dram_memory_write ( dram_t *ctx, uint32_t address, uint8_t *data_in, uint32_t len );
243 
258 err_t dram_memory_read ( dram_t *ctx, uint32_t address, uint8_t *data_out, uint32_t len );
259 
274 err_t dram_memory_read_fast ( dram_t *ctx, uint32_t address, uint8_t *data_out, uint32_t len );
275 
287 err_t dram_reset ( dram_t *ctx );
288 
301 
313 err_t dram_read_id ( dram_t *ctx, uint8_t *device_id );
314 
327 
337 void dram_set_io3_pin ( dram_t *ctx, uint8_t state );
338 
348 void dram_set_io2_pin ( dram_t *ctx, uint8_t state );
349 
350 #ifdef __cplusplus
351 }
352 #endif
353 #endif // DRAM_H
354  // dram
356 
357 // ------------------------------------------------------------------------ END
dram_set_io2_pin
void dram_set_io2_pin(dram_t *ctx, uint8_t state)
DRAM set io2 pin function.
DRAM_ERROR
@ DRAM_ERROR
Definition: dram.h:192
dram_cfg_t::io3
pin_name_t io3
Definition: dram.h:175
dram_cfg_t::spi_mode
spi_master_mode_t spi_mode
Definition: dram.h:180
dram_memory_read
err_t dram_memory_read(dram_t *ctx, uint32_t address, uint8_t *data_out, uint32_t len)
DRAM memory read function.
dram_memory_read_fast
err_t dram_memory_read_fast(dram_t *ctx, uint32_t address, uint8_t *data_out, uint32_t len)
DRAM memory read fast function.
dram_return_value_t
dram_return_value_t
DRAM Click return value data.
Definition: dram.h:190
spi_specifics.h
This file contains SPI specific macros, functions, etc.
dram_toggle_wrap_boundary
err_t dram_toggle_wrap_boundary(dram_t *ctx)
DRAM toggle wrap boundary function.
dram_t::io3
digital_out_t io3
Definition: dram.h:152
DRAM_OK
@ DRAM_OK
Definition: dram.h:191
dram_cfg_t::mosi
pin_name_t mosi
Definition: dram.h:170
dram_set_io3_pin
void dram_set_io3_pin(dram_t *ctx, uint8_t state)
DRAM set io3 pin function.
dram_check_communication
err_t dram_check_communication(dram_t *ctx)
DRAM check communication function.
dram_init
err_t dram_init(dram_t *ctx, dram_cfg_t *cfg)
DRAM initialization function.
dram_t::chip_select
pin_name_t chip_select
Definition: dram.h:158
dram_cfg_t::cs
pin_name_t cs
Definition: dram.h:172
dram_t::spi
spi_master_t spi
Definition: dram.h:156
dram_t::io2
digital_out_t io2
Definition: dram.h:153
dram_cfg_t
DRAM Click configuration object.
Definition: dram.h:167
dram_t
DRAM Click context object.
Definition: dram.h:150
dram_cfg_t::miso
pin_name_t miso
Definition: dram.h:169
dram_cfg_t::cs_polarity
spi_master_chip_select_polarity_t cs_polarity
Definition: dram.h:181
dram_cfg_setup
void dram_cfg_setup(dram_cfg_t *cfg)
DRAM configuration object setup function.
dram_cfg_t::spi_speed
uint32_t spi_speed
Definition: dram.h:179
dram_memory_write
err_t dram_memory_write(dram_t *ctx, uint32_t address, uint8_t *data_in, uint32_t len)
DRAM memory write function.
dram_cfg_t::io2
pin_name_t io2
Definition: dram.h:176
dram_cfg_t::sck
pin_name_t sck
Definition: dram.h:171
dram_reset
err_t dram_reset(dram_t *ctx)
DRAM reset function.
dram_read_id
err_t dram_read_id(dram_t *ctx, uint8_t *device_id)
DRAM read id function.