adac2  2.1.0.0
adac2.h
Go to the documentation of this file.
1 /****************************************************************************
2 ** Copyright (C) 2020 MikroElektronika d.o.o.
3 ** Contact: https://www.mikroe.com/contact
4 **
5 ** Permission is hereby granted, free of charge, to any person obtaining a copy
6 ** of this software and associated documentation files (the "Software"), to deal
7 ** in the Software without restriction, including without limitation the rights
8 ** to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
9 ** copies of the Software, and to permit persons to whom the Software is
10 ** furnished to do so, subject to the following conditions:
11 ** The above copyright notice and this permission notice shall be
12 ** included in all copies or substantial portions of the Software.
13 **
14 ** THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
15 ** EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
16 ** OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
17 ** IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM,
18 ** DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT
19 ** OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
20 ** USE OR OTHER DEALINGS IN THE SOFTWARE.
21 ****************************************************************************/
22 
28 #ifndef ADAC2_H
29 #define ADAC2_H
30 
31 #ifdef __cplusplus
32 extern "C"{
33 #endif
34 
35 #include "drv_digital_out.h"
36 #include "drv_digital_in.h"
37 #include "drv_spi_master.h"
38 #include "spi_specifics.h"
39 
60 #define ADAC2_REG_GEN_PROD 0x00
61 #define ADAC2_REG_GEN_REV 0x01
62 #define ADAC2_REG_GEN_CNFG 0x02
63 #define ADAC2_REG_GEN_CHNL_CTRL 0x03
64 #define ADAC2_REG_GEN_GPIO_CTRL 0x04
65 #define ADAC2_REG_GEN_GPI_INT 0x05
66 #define ADAC2_REG_GEN_GPI_DATA 0x06
67 #define ADAC2_REG_GEN_INT 0x07
68 #define ADAC2_REG_GEN_INTEN 0x08
69 #define ADAC2_REG_GEN_PWR_CTRL 0x09
70 #define ADAC2_REG_DCHNL_CMD 0x20
71 #define ADAC2_REG_DCHNL_STA 0x21
72 #define ADAC2_REG_DCHNL_CTRL1 0x22
73 #define ADAC2_REG_DCHNL_CTRL2 0x23
74 #define ADAC2_REG_DCHNL_DATA 0x24
75 #define ADAC2_REG_DCHNL_N_SEL 0x25
76 #define ADAC2_REG_DCHNL_N_SOC 0x26
77 #define ADAC2_REG_DCHNL_N_SGC 0x27
78 #define ADAC2_REG_AO_DATA_WR 0x40
79 #define ADAC2_REG_AO_OFFSET_CORR_WR 0x41
80 #define ADAC2_REG_AO_GAIN_CORR_WR 0x42
81 #define ADAC2_REG_AO_CNFG_WR 0x43
82 #define ADAC2_REG_AO_DATA_RD 0x44
83 #define ADAC2_REG_AO_OFFSET_CORR_RD 0x45
84 #define ADAC2_REG_AO_GAIN_CORR_RD 0x46
85 #define ADAC2_REG_AO_STA_RD 0x47
86  // adac2_reg
88 
103 #define ADAC2_PRODUCT_ID 0x2D
104 
109 #define ADAC2_GEN_CNFG_CRC_EN_DISABLE 0x000000ul
110 #define ADAC2_GEN_CNFG_CRC_EN_ENABLE 0x800000ul
111 #define ADAC2_GEN_CNFG_CRC_EN_MASK 0x800000ul
112 #define ADAC2_GEN_CNFG_DACREF_SEL_INT 0x000000ul
113 #define ADAC2_GEN_CNFG_DACREF_SEL_EXT 0x400000ul
114 #define ADAC2_GEN_CNFG_DACREF_SEL_MASK 0x400000ul
115 #define ADAC2_GEN_CNFG_ADCREF_SEL_INT 0x000000ul
116 #define ADAC2_GEN_CNFG_ADCREF_SEL_EXT 0x200000ul
117 #define ADAC2_GEN_CNFG_ADCREF_SEL_MASK 0x200000ul
118 #define ADAC2_GEN_CNFG_LINE_CNFG_OPEN 0x000000ul
119 #define ADAC2_GEN_CNFG_LINE_CNFG_CLOSED 0x100000ul
120 #define ADAC2_GEN_CNFG_LINE_CNFG_MASK 0x100000ul
121 #define ADAC2_GEN_CNFG_AO_CNFG_HIGH_Z 0x000000ul
122 #define ADAC2_GEN_CNFG_AO_CNFG_25V 0x010000ul
123 #define ADAC2_GEN_CNFG_AO_CNFG_12p5V 0x020000ul
124 #define ADAC2_GEN_CNFG_AO_CNFG_25mA 0x060000ul
125 #define ADAC2_GEN_CNFG_AO_CNFG_12p5mA 0x080000ul
126 #define ADAC2_GEN_CNFG_AO_CNFG_MASK 0x0F0000ul
127 #define ADAC2_GEN_CNFG_AI1_2_CNFG_BOTH_PD 0x000000ul
128 #define ADAC2_GEN_CNFG_AI1_2_CNFG_AI1_SE 0x002000ul
129 #define ADAC2_GEN_CNFG_AI1_2_CNFG_AI2_SE 0x004000ul
130 #define ADAC2_GEN_CNFG_AI1_2_CNFG_BOTH_SE 0x006000ul
131 #define ADAC2_GEN_CNFG_AI1_2_CNFG_DIFF 0x008000ul
132 #define ADAC2_GEN_CNFG_AI1_2_CNFG_MASK 0x00E000ul
133 #define ADAC2_GEN_CNFG_AI3_CNFG_PD 0x000000ul
134 #define ADAC2_GEN_CNFG_AI3_CNFG_SE 0x001000ul
135 #define ADAC2_GEN_CNFG_AI3_CNFG_MASK 0x001000ul
136 #define ADAC2_GEN_CNFG_AI4_CNFG_PD 0x000000ul
137 #define ADAC2_GEN_CNFG_AI4_CNFG_SE 0x000800ul
138 #define ADAC2_GEN_CNFG_AI4_CNFG_MASK 0x000800ul
139 #define ADAC2_GEN_CNFG_AI5_6_CNFG_PD 0x000000ul
140 #define ADAC2_GEN_CNFG_AI5_6_CNFG_DIFF 0x000400ul
141 #define ADAC2_GEN_CNFG_AI5_6_CNFG_MASK 0x000700ul
142 #define ADAC2_GEN_CNFG_AI5_DF_GAIN_12p5V 0x000000ul
143 #define ADAC2_GEN_CNFG_AI5_DF_GAIN_0p5V 0x000040ul
144 #define ADAC2_GEN_CNFG_AI5_DF_GAIN_0p25V 0x000080ul
145 #define ADAC2_GEN_CNFG_AI5_DF_GAIN_0p125V 0x0000C0ul
146 #define ADAC2_GEN_CNFG_AI5_DF_GAIN_MASK 0x0000C0ul
147 #define ADAC2_GEN_CNFG_OVC_CTRL_AUTO 0x000000ul
148 #define ADAC2_GEN_CNFG_OVC_CTRL_HOST 0x000008ul
149 #define ADAC2_GEN_CNFG_OVC_CTRL_MASK 0x000008ul
150 
155 #define ADAC2_ADC_DATA_RESOLUTION 0x7FFFFFul
156 #define ADAC2_DAC_DATA_RESOLUTION 0x03FFFFul
157 #define ADAC2_DAC_MIN_VALUE -131072l
158 #define ADAC2_DAC_MAX_VALUE 131071l
159 #define ADAC2_FULL_SCALE_RANGE_25V 25.0f
160 #define ADAC2_FULL_SCALE_RANGE_12p5V 12.5f
161 #define ADAC2_FULL_SCALE_RANGE_2p5V 2.5f
162 #define ADAC2_FULL_SCALE_RANGE_0p5V 0.5f
163 #define ADAC2_FULL_SCALE_RANGE_0p25V 0.25f
164 #define ADAC2_FULL_SCALE_RANGE_0p125V 0.125f
165 
170 #define ADAC2_START_CONVERSION 0x30
171 #define ADAC2_STOP_CONVERSION 0x10
172 #define ADAC2_DATA_RATE_5_SPS 0x00
173 #define ADAC2_DATA_RATE_10_SPS 0x01
174 #define ADAC2_DATA_RATE_15_SPS 0x02
175 #define ADAC2_DATA_RATE_30_SPS 0x03
176 #define ADAC2_DATA_RATE_50_SPS 0x04
177 #define ADAC2_DATA_RATE_60_SPS 0x05
178 #define ADAC2_DATA_RATE_225_SPS 0x06
179 #define ADAC2_DATA_RATE_450_SPS 0x07
180 #define ADAC2_DATA_RATE_900_SPS 0x08
181 #define ADAC2_DATA_RATE_1800_SPS 0x09
182 #define ADAC2_DATA_RATE_3600_SPS 0x0A
183 #define ADAC2_DATA_RATE_7200_SPS 0x0B
184 #define ADAC2_DATA_RATE_14400_SPS 0x0C
185 #define ADAC2_DATA_RATE_28800_SPS 0x0D
186 #define ADAC2_DATA_RATE_57600_SPS 0x0E
187 #define ADAC2_DATA_RATE_115200_SPS 0x0F
188 
193 #define ADAC2_PD_STATE_STANDBY 0x00
194 #define ADAC2_PD_STATE_RESET 0x10
195 #define ADAC2_CONV_MODE_CONTINUOUS 0x00
196 #define ADAC2_CONV_MODE_SINGLE_CYCLE 0x02
197 #define ADAC2_CONV_MODE_CONT_SINGLE_CYCLE 0x03
198 
203 #define ADAC2_CH_NONE 0x00
204 #define ADAC2_CH_AI1_SINGLE_ENDED 0x01
205 #define ADAC2_CH_AI2_SINGLE_ENDED 0x02
206 #define ADAC2_CH_AI1_AI2_DIFFERENTIAL 0x03
207 #define ADAC2_CH_AI3_SINGLE_ENDED 0x04
208 #define ADAC2_CH_AI4_SINGLE_ENDED 0x05
209 #define ADAC2_CH_AI3_AI4_DIFFERENTIAL 0x06
210 #define ADAC2_CH_AI5_AI6_DIFFERENTIAL_25V 0x09
211 #define ADAC2_CH_AI5_AI6_DIFFERENTIAL_2p5V 0x0C
212 #define ADAC2_CH_AUX1_SINGLE_ENDED 0x0D
213 #define ADAC2_CH_AUX2_SINGLE_ENDED 0x0E
214 #define ADAC2_CH_AUX1_AUX2_DIFFERENTIAL 0x0F
215 #define ADAC2_CH_MASK 0x000F00ul
216 
221 #define ADAC2_GPIO_0_MASK 0x01
222 #define ADAC2_GPIO_1_MASK 0x02
223 #define ADAC2_GPIO_2_MASK 0x04
224 #define ADAC2_GPIO_3_MASK 0x08
225 #define ADAC2_GPIO_4_MASK 0x10
226 #define ADAC2_GPIO_5_MASK 0x20
227 #define ADAC2_GPIO_ALL_MASK 0x3F
228 
237 #define ADAC2_SET_DATA_SAMPLE_EDGE SET_SPI_DATA_SAMPLE_EDGE
238 #define ADAC2_SET_DATA_SAMPLE_MIDDLE SET_SPI_DATA_SAMPLE_MIDDLE
239  // adac2_set
241 
256 #define ADAC2_MAP_MIKROBUS( cfg, mikrobus ) \
257  cfg.miso = MIKROBUS( mikrobus, MIKROBUS_MISO ); \
258  cfg.mosi = MIKROBUS( mikrobus, MIKROBUS_MOSI ); \
259  cfg.sck = MIKROBUS( mikrobus, MIKROBUS_SCK ); \
260  cfg.cs = MIKROBUS( mikrobus, MIKROBUS_CS ); \
261  cfg.rdy = MIKROBUS( mikrobus, MIKROBUS_AN ); \
262  cfg.rst = MIKROBUS( mikrobus, MIKROBUS_RST ); \
263  cfg.int_pin = MIKROBUS( mikrobus, MIKROBUS_INT )
264  // adac2_map // adac2
267 
272 typedef struct
273 {
274  // Output pins
275  digital_out_t rst;
277  // Input pins
278  digital_in_t rdy;
279  digital_in_t int_pin;
281  // Modules
282  spi_master_t spi;
284  pin_name_t chip_select;
288 } adac2_t;
289 
294 typedef struct
295 {
296  // Communication gpio pins
297  pin_name_t miso;
298  pin_name_t mosi;
299  pin_name_t sck;
300  pin_name_t cs;
302  // Additional gpio pins
303  pin_name_t rdy;
304  pin_name_t rst;
305  pin_name_t int_pin;
307  // static variable
308  uint32_t spi_speed;
309  spi_master_mode_t spi_mode;
310  spi_master_chip_select_polarity_t cs_polarity;
312 } adac2_cfg_t;
313 
318 typedef enum
319 {
320  ADAC2_OK = 0,
321  ADAC2_ERROR = -1
322 
324 
341 
355 err_t adac2_init ( adac2_t *ctx, adac2_cfg_t *cfg );
356 
369 err_t adac2_default_cfg ( adac2_t *ctx );
370 
384 err_t adac2_write_register ( adac2_t *ctx, uint8_t reg, uint32_t data_in );
385 
399 err_t adac2_read_register ( adac2_t *ctx, uint8_t reg, uint32_t *data_out );
400 
411 
422 
433 
443 
452 uint8_t adac2_get_rdy_pin ( adac2_t *ctx );
453 
462 uint8_t adac2_get_int_pin ( adac2_t *ctx );
463 
474 err_t adac2_start_conversion ( adac2_t *ctx, uint8_t data_rate );
475 
486 
500 err_t adac2_set_conversion_mode ( adac2_t *ctx, uint8_t mode );
501 
512 err_t adac2_set_active_ain_channel ( adac2_t *ctx, uint8_t channel );
513 
524 err_t adac2_read_raw_adc ( adac2_t *ctx, int32_t *raw_adc );
525 
537 err_t adac2_read_voltage ( adac2_t *ctx, float fsr, float *voltage );
538 
549 err_t adac2_write_dac ( adac2_t *ctx, int32_t dac );
550 
551 #ifdef __cplusplus
552 }
553 #endif
554 #endif // ADAC2_H
555  // adac2
557 
558 // ------------------------------------------------------------------------ END
adac2_cfg_t::miso
pin_name_t miso
Definition: adac2.h:297
adac2_read_register
err_t adac2_read_register(adac2_t *ctx, uint8_t reg, uint32_t *data_out)
ADAC 2 read register function.
adac2_t
ADAC 2 Click context object.
Definition: adac2.h:273
adac2_reset_device
void adac2_reset_device(adac2_t *ctx)
ADAC 2 reset device function.
adac2_cfg_t::mosi
pin_name_t mosi
Definition: adac2.h:298
adac2_get_rdy_pin
uint8_t adac2_get_rdy_pin(adac2_t *ctx)
ADAC 2 get rdy pin function.
spi_specifics.h
This file contains SPI specific macros, functions, etc.
adac2_t::spi
spi_master_t spi
Definition: adac2.h:282
adac2_cfg_t::spi_mode
spi_master_mode_t spi_mode
Definition: adac2.h:309
adac2_disable_spi_crc
err_t adac2_disable_spi_crc(adac2_t *ctx)
ADAC 2 disable spi crc function.
adac2_read_voltage
err_t adac2_read_voltage(adac2_t *ctx, float fsr, float *voltage)
ADAC 2 read voltage function.
adac2_init
err_t adac2_init(adac2_t *ctx, adac2_cfg_t *cfg)
ADAC 2 initialization function.
adac2_cfg_t::cs
pin_name_t cs
Definition: adac2.h:300
adac2_cfg_t::spi_speed
uint32_t spi_speed
Definition: adac2.h:308
adac2_enable_spi_crc
err_t adac2_enable_spi_crc(adac2_t *ctx)
ADAC 2 enable spi crc function.
adac2_cfg_t::sck
pin_name_t sck
Definition: adac2.h:299
adac2_start_conversion
err_t adac2_start_conversion(adac2_t *ctx, uint8_t data_rate)
ADAC 2 start conversion function.
adac2_t::int_pin
digital_in_t int_pin
Definition: adac2.h:279
adac2_write_register
err_t adac2_write_register(adac2_t *ctx, uint8_t reg, uint32_t data_in)
ADAC 2 write register function.
adac2_default_cfg
err_t adac2_default_cfg(adac2_t *ctx)
ADAC 2 default configuration function.
adac2_cfg_t::cs_polarity
spi_master_chip_select_polarity_t cs_polarity
Definition: adac2.h:310
adac2_cfg_t::int_pin
pin_name_t int_pin
Definition: adac2.h:305
adac2_set_conversion_mode
err_t adac2_set_conversion_mode(adac2_t *ctx, uint8_t mode)
ADAC 2 set conversion mode function.
adac2_get_int_pin
uint8_t adac2_get_int_pin(adac2_t *ctx)
ADAC 2 get int pin function.
adac2_t::spi_crc_enable
bool spi_crc_enable
Definition: adac2.h:286
adac2_check_communication
err_t adac2_check_communication(adac2_t *ctx)
ADAC 2 check communication function.
adac2_set_active_ain_channel
err_t adac2_set_active_ain_channel(adac2_t *ctx, uint8_t channel)
ADAC 2 set active ain channel function.
adac2_cfg_t::rst
pin_name_t rst
Definition: adac2.h:304
adac2_t::rst
digital_out_t rst
Definition: adac2.h:275
ADAC2_OK
@ ADAC2_OK
Definition: adac2.h:320
adac2_cfg_t
ADAC 2 Click configuration object.
Definition: adac2.h:295
adac2_read_raw_adc
err_t adac2_read_raw_adc(adac2_t *ctx, int32_t *raw_adc)
ADAC 2 read raw adc function.
adac2_return_value_t
adac2_return_value_t
ADAC 2 Click return value data.
Definition: adac2.h:319
adac2_cfg_setup
void adac2_cfg_setup(adac2_cfg_t *cfg)
ADAC 2 configuration object setup function.
ADAC2_ERROR
@ ADAC2_ERROR
Definition: adac2.h:321
adac2_stop_conversion
err_t adac2_stop_conversion(adac2_t *ctx)
ADAC 2 stop conversion function.
adac2_cfg_t::rdy
pin_name_t rdy
Definition: adac2.h:303
adac2_write_dac
err_t adac2_write_dac(adac2_t *ctx, int32_t dac)
ADAC 2 write dac function.
adac2_t::chip_select
pin_name_t chip_select
Definition: adac2.h:284
adac2_t::rdy
digital_in_t rdy
Definition: adac2.h:278