adac2  2.1.0.0
adac2.h
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22 
28 #ifndef ADAC2_H
29 #define ADAC2_H
30 
31 #ifdef __cplusplus
32 extern "C"{
33 #endif
34 
35 #include "mikrosdk_version.h"
36 
37 #ifdef __GNUC__
38 #if mikroSDK_GET_VERSION < 20800ul
39 #include "rcu_delays.h"
40 #else
41 #include "delays.h"
42 #endif
43 #endif
44 
45 #include "drv_digital_out.h"
46 #include "drv_digital_in.h"
47 #include "drv_spi_master.h"
48 #include "spi_specifics.h"
49 
70 #define ADAC2_REG_GEN_PROD 0x00
71 #define ADAC2_REG_GEN_REV 0x01
72 #define ADAC2_REG_GEN_CNFG 0x02
73 #define ADAC2_REG_GEN_CHNL_CTRL 0x03
74 #define ADAC2_REG_GEN_GPIO_CTRL 0x04
75 #define ADAC2_REG_GEN_GPI_INT 0x05
76 #define ADAC2_REG_GEN_GPI_DATA 0x06
77 #define ADAC2_REG_GEN_INT 0x07
78 #define ADAC2_REG_GEN_INTEN 0x08
79 #define ADAC2_REG_GEN_PWR_CTRL 0x09
80 #define ADAC2_REG_DCHNL_CMD 0x20
81 #define ADAC2_REG_DCHNL_STA 0x21
82 #define ADAC2_REG_DCHNL_CTRL1 0x22
83 #define ADAC2_REG_DCHNL_CTRL2 0x23
84 #define ADAC2_REG_DCHNL_DATA 0x24
85 #define ADAC2_REG_DCHNL_N_SEL 0x25
86 #define ADAC2_REG_DCHNL_N_SOC 0x26
87 #define ADAC2_REG_DCHNL_N_SGC 0x27
88 #define ADAC2_REG_AO_DATA_WR 0x40
89 #define ADAC2_REG_AO_OFFSET_CORR_WR 0x41
90 #define ADAC2_REG_AO_GAIN_CORR_WR 0x42
91 #define ADAC2_REG_AO_CNFG_WR 0x43
92 #define ADAC2_REG_AO_DATA_RD 0x44
93 #define ADAC2_REG_AO_OFFSET_CORR_RD 0x45
94 #define ADAC2_REG_AO_GAIN_CORR_RD 0x46
95 #define ADAC2_REG_AO_STA_RD 0x47
96  // adac2_reg
98 
113 #define ADAC2_PRODUCT_ID 0x2D
114 
119 #define ADAC2_GEN_CNFG_CRC_EN_DISABLE 0x000000ul
120 #define ADAC2_GEN_CNFG_CRC_EN_ENABLE 0x800000ul
121 #define ADAC2_GEN_CNFG_CRC_EN_MASK 0x800000ul
122 #define ADAC2_GEN_CNFG_DACREF_SEL_INT 0x000000ul
123 #define ADAC2_GEN_CNFG_DACREF_SEL_EXT 0x400000ul
124 #define ADAC2_GEN_CNFG_DACREF_SEL_MASK 0x400000ul
125 #define ADAC2_GEN_CNFG_ADCREF_SEL_INT 0x000000ul
126 #define ADAC2_GEN_CNFG_ADCREF_SEL_EXT 0x200000ul
127 #define ADAC2_GEN_CNFG_ADCREF_SEL_MASK 0x200000ul
128 #define ADAC2_GEN_CNFG_LINE_CNFG_OPEN 0x000000ul
129 #define ADAC2_GEN_CNFG_LINE_CNFG_CLOSED 0x100000ul
130 #define ADAC2_GEN_CNFG_LINE_CNFG_MASK 0x100000ul
131 #define ADAC2_GEN_CNFG_AO_CNFG_HIGH_Z 0x000000ul
132 #define ADAC2_GEN_CNFG_AO_CNFG_25V 0x010000ul
133 #define ADAC2_GEN_CNFG_AO_CNFG_12p5V 0x020000ul
134 #define ADAC2_GEN_CNFG_AO_CNFG_25mA 0x060000ul
135 #define ADAC2_GEN_CNFG_AO_CNFG_12p5mA 0x080000ul
136 #define ADAC2_GEN_CNFG_AO_CNFG_MASK 0x0F0000ul
137 #define ADAC2_GEN_CNFG_AI1_2_CNFG_BOTH_PD 0x000000ul
138 #define ADAC2_GEN_CNFG_AI1_2_CNFG_AI1_SE 0x002000ul
139 #define ADAC2_GEN_CNFG_AI1_2_CNFG_AI2_SE 0x004000ul
140 #define ADAC2_GEN_CNFG_AI1_2_CNFG_BOTH_SE 0x006000ul
141 #define ADAC2_GEN_CNFG_AI1_2_CNFG_DIFF 0x008000ul
142 #define ADAC2_GEN_CNFG_AI1_2_CNFG_MASK 0x00E000ul
143 #define ADAC2_GEN_CNFG_AI3_CNFG_PD 0x000000ul
144 #define ADAC2_GEN_CNFG_AI3_CNFG_SE 0x001000ul
145 #define ADAC2_GEN_CNFG_AI3_CNFG_MASK 0x001000ul
146 #define ADAC2_GEN_CNFG_AI4_CNFG_PD 0x000000ul
147 #define ADAC2_GEN_CNFG_AI4_CNFG_SE 0x000800ul
148 #define ADAC2_GEN_CNFG_AI4_CNFG_MASK 0x000800ul
149 #define ADAC2_GEN_CNFG_AI5_6_CNFG_PD 0x000000ul
150 #define ADAC2_GEN_CNFG_AI5_6_CNFG_DIFF 0x000400ul
151 #define ADAC2_GEN_CNFG_AI5_6_CNFG_MASK 0x000700ul
152 #define ADAC2_GEN_CNFG_AI5_DF_GAIN_12p5V 0x000000ul
153 #define ADAC2_GEN_CNFG_AI5_DF_GAIN_0p5V 0x000040ul
154 #define ADAC2_GEN_CNFG_AI5_DF_GAIN_0p25V 0x000080ul
155 #define ADAC2_GEN_CNFG_AI5_DF_GAIN_0p125V 0x0000C0ul
156 #define ADAC2_GEN_CNFG_AI5_DF_GAIN_MASK 0x0000C0ul
157 #define ADAC2_GEN_CNFG_OVC_CTRL_AUTO 0x000000ul
158 #define ADAC2_GEN_CNFG_OVC_CTRL_HOST 0x000008ul
159 #define ADAC2_GEN_CNFG_OVC_CTRL_MASK 0x000008ul
160 
165 #define ADAC2_ADC_DATA_RESOLUTION 0x7FFFFFul
166 #define ADAC2_DAC_DATA_RESOLUTION 0x03FFFFul
167 #define ADAC2_DAC_MIN_VALUE -131072l
168 #define ADAC2_DAC_MAX_VALUE 131071l
169 #define ADAC2_FULL_SCALE_RANGE_25V 25.0f
170 #define ADAC2_FULL_SCALE_RANGE_12p5V 12.5f
171 #define ADAC2_FULL_SCALE_RANGE_2p5V 2.5f
172 #define ADAC2_FULL_SCALE_RANGE_0p5V 0.5f
173 #define ADAC2_FULL_SCALE_RANGE_0p25V 0.25f
174 #define ADAC2_FULL_SCALE_RANGE_0p125V 0.125f
175 
180 #define ADAC2_START_CONVERSION 0x30
181 #define ADAC2_STOP_CONVERSION 0x10
182 #define ADAC2_DATA_RATE_5_SPS 0x00
183 #define ADAC2_DATA_RATE_10_SPS 0x01
184 #define ADAC2_DATA_RATE_15_SPS 0x02
185 #define ADAC2_DATA_RATE_30_SPS 0x03
186 #define ADAC2_DATA_RATE_50_SPS 0x04
187 #define ADAC2_DATA_RATE_60_SPS 0x05
188 #define ADAC2_DATA_RATE_225_SPS 0x06
189 #define ADAC2_DATA_RATE_450_SPS 0x07
190 #define ADAC2_DATA_RATE_900_SPS 0x08
191 #define ADAC2_DATA_RATE_1800_SPS 0x09
192 #define ADAC2_DATA_RATE_3600_SPS 0x0A
193 #define ADAC2_DATA_RATE_7200_SPS 0x0B
194 #define ADAC2_DATA_RATE_14400_SPS 0x0C
195 #define ADAC2_DATA_RATE_28800_SPS 0x0D
196 #define ADAC2_DATA_RATE_57600_SPS 0x0E
197 #define ADAC2_DATA_RATE_115200_SPS 0x0F
198 
203 #define ADAC2_PD_STATE_STANDBY 0x00
204 #define ADAC2_PD_STATE_RESET 0x10
205 #define ADAC2_CONV_MODE_CONTINUOUS 0x00
206 #define ADAC2_CONV_MODE_SINGLE_CYCLE 0x02
207 #define ADAC2_CONV_MODE_CONT_SINGLE_CYCLE 0x03
208 
213 #define ADAC2_CH_NONE 0x00
214 #define ADAC2_CH_AI1_SINGLE_ENDED 0x01
215 #define ADAC2_CH_AI2_SINGLE_ENDED 0x02
216 #define ADAC2_CH_AI1_AI2_DIFFERENTIAL 0x03
217 #define ADAC2_CH_AI3_SINGLE_ENDED 0x04
218 #define ADAC2_CH_AI4_SINGLE_ENDED 0x05
219 #define ADAC2_CH_AI3_AI4_DIFFERENTIAL 0x06
220 #define ADAC2_CH_AI5_AI6_DIFFERENTIAL_25V 0x09
221 #define ADAC2_CH_AI5_AI6_DIFFERENTIAL_2p5V 0x0C
222 #define ADAC2_CH_AUX1_SINGLE_ENDED 0x0D
223 #define ADAC2_CH_AUX2_SINGLE_ENDED 0x0E
224 #define ADAC2_CH_AUX1_AUX2_DIFFERENTIAL 0x0F
225 #define ADAC2_CH_MASK 0x000F00ul
226 
231 #define ADAC2_GPIO_0_MASK 0x01
232 #define ADAC2_GPIO_1_MASK 0x02
233 #define ADAC2_GPIO_2_MASK 0x04
234 #define ADAC2_GPIO_3_MASK 0x08
235 #define ADAC2_GPIO_4_MASK 0x10
236 #define ADAC2_GPIO_5_MASK 0x20
237 #define ADAC2_GPIO_ALL_MASK 0x3F
238 
247 #define ADAC2_SET_DATA_SAMPLE_EDGE SET_SPI_DATA_SAMPLE_EDGE
248 #define ADAC2_SET_DATA_SAMPLE_MIDDLE SET_SPI_DATA_SAMPLE_MIDDLE
249  // adac2_set
251 
266 #define ADAC2_MAP_MIKROBUS( cfg, mikrobus ) \
267  cfg.miso = MIKROBUS( mikrobus, MIKROBUS_MISO ); \
268  cfg.mosi = MIKROBUS( mikrobus, MIKROBUS_MOSI ); \
269  cfg.sck = MIKROBUS( mikrobus, MIKROBUS_SCK ); \
270  cfg.cs = MIKROBUS( mikrobus, MIKROBUS_CS ); \
271  cfg.rdy = MIKROBUS( mikrobus, MIKROBUS_AN ); \
272  cfg.rst = MIKROBUS( mikrobus, MIKROBUS_RST ); \
273  cfg.int_pin = MIKROBUS( mikrobus, MIKROBUS_INT )
274  // adac2_map // adac2
277 
282 typedef struct
283 {
284  // Output pins
285  digital_out_t rst;
287  // Input pins
288  digital_in_t rdy;
289  digital_in_t int_pin;
291  // Modules
292  spi_master_t spi;
294  pin_name_t chip_select;
298 } adac2_t;
299 
304 typedef struct
305 {
306  // Communication gpio pins
307  pin_name_t miso;
308  pin_name_t mosi;
309  pin_name_t sck;
310  pin_name_t cs;
312  // Additional gpio pins
313  pin_name_t rdy;
314  pin_name_t rst;
315  pin_name_t int_pin;
317  // static variable
318  uint32_t spi_speed;
319  spi_master_mode_t spi_mode;
320  spi_master_chip_select_polarity_t cs_polarity;
322 } adac2_cfg_t;
323 
328 typedef enum
329 {
330  ADAC2_OK = 0,
331  ADAC2_ERROR = -1
332 
334 
351 
365 err_t adac2_init ( adac2_t *ctx, adac2_cfg_t *cfg );
366 
379 err_t adac2_default_cfg ( adac2_t *ctx );
380 
394 err_t adac2_write_register ( adac2_t *ctx, uint8_t reg, uint32_t data_in );
395 
409 err_t adac2_read_register ( adac2_t *ctx, uint8_t reg, uint32_t *data_out );
410 
421 
432 
443 
453 
462 uint8_t adac2_get_rdy_pin ( adac2_t *ctx );
463 
472 uint8_t adac2_get_int_pin ( adac2_t *ctx );
473 
484 err_t adac2_start_conversion ( adac2_t *ctx, uint8_t data_rate );
485 
496 
510 err_t adac2_set_conversion_mode ( adac2_t *ctx, uint8_t mode );
511 
522 err_t adac2_set_active_ain_channel ( adac2_t *ctx, uint8_t channel );
523 
534 err_t adac2_read_raw_adc ( adac2_t *ctx, int32_t *raw_adc );
535 
547 err_t adac2_read_voltage ( adac2_t *ctx, float fsr, float *voltage );
548 
559 err_t adac2_write_dac ( adac2_t *ctx, int32_t dac );
560 
561 #ifdef __cplusplus
562 }
563 #endif
564 #endif // ADAC2_H
565  // adac2
567 
568 // ------------------------------------------------------------------------ END
adac2_cfg_t::miso
pin_name_t miso
Definition: adac2.h:307
adac2_read_register
err_t adac2_read_register(adac2_t *ctx, uint8_t reg, uint32_t *data_out)
ADAC 2 read register function.
adac2_t
ADAC 2 Click context object.
Definition: adac2.h:283
adac2_reset_device
void adac2_reset_device(adac2_t *ctx)
ADAC 2 reset device function.
adac2_cfg_t::mosi
pin_name_t mosi
Definition: adac2.h:308
adac2_get_rdy_pin
uint8_t adac2_get_rdy_pin(adac2_t *ctx)
ADAC 2 get rdy pin function.
spi_specifics.h
This file contains SPI specific macros, functions, etc.
adac2_t::spi
spi_master_t spi
Definition: adac2.h:292
adac2_cfg_t::spi_mode
spi_master_mode_t spi_mode
Definition: adac2.h:319
adac2_disable_spi_crc
err_t adac2_disable_spi_crc(adac2_t *ctx)
ADAC 2 disable spi crc function.
adac2_read_voltage
err_t adac2_read_voltage(adac2_t *ctx, float fsr, float *voltage)
ADAC 2 read voltage function.
adac2_init
err_t adac2_init(adac2_t *ctx, adac2_cfg_t *cfg)
ADAC 2 initialization function.
adac2_cfg_t::cs
pin_name_t cs
Definition: adac2.h:310
adac2_cfg_t::spi_speed
uint32_t spi_speed
Definition: adac2.h:318
adac2_enable_spi_crc
err_t adac2_enable_spi_crc(adac2_t *ctx)
ADAC 2 enable spi crc function.
adac2_cfg_t::sck
pin_name_t sck
Definition: adac2.h:309
adac2_start_conversion
err_t adac2_start_conversion(adac2_t *ctx, uint8_t data_rate)
ADAC 2 start conversion function.
adac2_t::int_pin
digital_in_t int_pin
Definition: adac2.h:289
adac2_write_register
err_t adac2_write_register(adac2_t *ctx, uint8_t reg, uint32_t data_in)
ADAC 2 write register function.
adac2_default_cfg
err_t adac2_default_cfg(adac2_t *ctx)
ADAC 2 default configuration function.
adac2_cfg_t::cs_polarity
spi_master_chip_select_polarity_t cs_polarity
Definition: adac2.h:320
adac2_cfg_t::int_pin
pin_name_t int_pin
Definition: adac2.h:315
adac2_set_conversion_mode
err_t adac2_set_conversion_mode(adac2_t *ctx, uint8_t mode)
ADAC 2 set conversion mode function.
adac2_get_int_pin
uint8_t adac2_get_int_pin(adac2_t *ctx)
ADAC 2 get int pin function.
adac2_t::spi_crc_enable
bool spi_crc_enable
Definition: adac2.h:296
adac2_check_communication
err_t adac2_check_communication(adac2_t *ctx)
ADAC 2 check communication function.
adac2_set_active_ain_channel
err_t adac2_set_active_ain_channel(adac2_t *ctx, uint8_t channel)
ADAC 2 set active ain channel function.
adac2_cfg_t::rst
pin_name_t rst
Definition: adac2.h:314
adac2_t::rst
digital_out_t rst
Definition: adac2.h:285
ADAC2_OK
@ ADAC2_OK
Definition: adac2.h:330
adac2_cfg_t
ADAC 2 Click configuration object.
Definition: adac2.h:305
adac2_read_raw_adc
err_t adac2_read_raw_adc(adac2_t *ctx, int32_t *raw_adc)
ADAC 2 read raw adc function.
adac2_return_value_t
adac2_return_value_t
ADAC 2 Click return value data.
Definition: adac2.h:329
adac2_cfg_setup
void adac2_cfg_setup(adac2_cfg_t *cfg)
ADAC 2 configuration object setup function.
ADAC2_ERROR
@ ADAC2_ERROR
Definition: adac2.h:331
adac2_stop_conversion
err_t adac2_stop_conversion(adac2_t *ctx)
ADAC 2 stop conversion function.
adac2_cfg_t::rdy
pin_name_t rdy
Definition: adac2.h:313
adac2_write_dac
err_t adac2_write_dac(adac2_t *ctx, int32_t dac)
ADAC 2 write dac function.
adac2_t::chip_select
pin_name_t chip_select
Definition: adac2.h:294
adac2_t::rdy
digital_in_t rdy
Definition: adac2.h:288