adac2  2.1.0.0
adac2.h
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22 
28 #ifndef ADAC2_H
29 #define ADAC2_H
30 
31 #ifdef __cplusplus
32 extern "C"{
33 #endif
34 
39 #ifdef PREINIT_SUPPORTED
40 #include "preinit.h"
41 #endif
42 
43 #ifdef MikroCCoreVersion
44  #if MikroCCoreVersion >= 1
45  #include "delays.h"
46  #endif
47 #endif
48 
49 #include "drv_digital_out.h"
50 #include "drv_digital_in.h"
51 #include "drv_spi_master.h"
52 #include "spi_specifics.h"
53 
74 #define ADAC2_REG_GEN_PROD 0x00
75 #define ADAC2_REG_GEN_REV 0x01
76 #define ADAC2_REG_GEN_CNFG 0x02
77 #define ADAC2_REG_GEN_CHNL_CTRL 0x03
78 #define ADAC2_REG_GEN_GPIO_CTRL 0x04
79 #define ADAC2_REG_GEN_GPI_INT 0x05
80 #define ADAC2_REG_GEN_GPI_DATA 0x06
81 #define ADAC2_REG_GEN_INT 0x07
82 #define ADAC2_REG_GEN_INTEN 0x08
83 #define ADAC2_REG_GEN_PWR_CTRL 0x09
84 #define ADAC2_REG_DCHNL_CMD 0x20
85 #define ADAC2_REG_DCHNL_STA 0x21
86 #define ADAC2_REG_DCHNL_CTRL1 0x22
87 #define ADAC2_REG_DCHNL_CTRL2 0x23
88 #define ADAC2_REG_DCHNL_DATA 0x24
89 #define ADAC2_REG_DCHNL_N_SEL 0x25
90 #define ADAC2_REG_DCHNL_N_SOC 0x26
91 #define ADAC2_REG_DCHNL_N_SGC 0x27
92 #define ADAC2_REG_AO_DATA_WR 0x40
93 #define ADAC2_REG_AO_OFFSET_CORR_WR 0x41
94 #define ADAC2_REG_AO_GAIN_CORR_WR 0x42
95 #define ADAC2_REG_AO_CNFG_WR 0x43
96 #define ADAC2_REG_AO_DATA_RD 0x44
97 #define ADAC2_REG_AO_OFFSET_CORR_RD 0x45
98 #define ADAC2_REG_AO_GAIN_CORR_RD 0x46
99 #define ADAC2_REG_AO_STA_RD 0x47
100  // adac2_reg
102 
117 #define ADAC2_PRODUCT_ID 0x2D
118 
123 #define ADAC2_GEN_CNFG_CRC_EN_DISABLE 0x000000ul
124 #define ADAC2_GEN_CNFG_CRC_EN_ENABLE 0x800000ul
125 #define ADAC2_GEN_CNFG_CRC_EN_MASK 0x800000ul
126 #define ADAC2_GEN_CNFG_DACREF_SEL_INT 0x000000ul
127 #define ADAC2_GEN_CNFG_DACREF_SEL_EXT 0x400000ul
128 #define ADAC2_GEN_CNFG_DACREF_SEL_MASK 0x400000ul
129 #define ADAC2_GEN_CNFG_ADCREF_SEL_INT 0x000000ul
130 #define ADAC2_GEN_CNFG_ADCREF_SEL_EXT 0x200000ul
131 #define ADAC2_GEN_CNFG_ADCREF_SEL_MASK 0x200000ul
132 #define ADAC2_GEN_CNFG_LINE_CNFG_OPEN 0x000000ul
133 #define ADAC2_GEN_CNFG_LINE_CNFG_CLOSED 0x100000ul
134 #define ADAC2_GEN_CNFG_LINE_CNFG_MASK 0x100000ul
135 #define ADAC2_GEN_CNFG_AO_CNFG_HIGH_Z 0x000000ul
136 #define ADAC2_GEN_CNFG_AO_CNFG_25V 0x010000ul
137 #define ADAC2_GEN_CNFG_AO_CNFG_12p5V 0x020000ul
138 #define ADAC2_GEN_CNFG_AO_CNFG_25mA 0x060000ul
139 #define ADAC2_GEN_CNFG_AO_CNFG_12p5mA 0x080000ul
140 #define ADAC2_GEN_CNFG_AO_CNFG_MASK 0x0F0000ul
141 #define ADAC2_GEN_CNFG_AI1_2_CNFG_BOTH_PD 0x000000ul
142 #define ADAC2_GEN_CNFG_AI1_2_CNFG_AI1_SE 0x002000ul
143 #define ADAC2_GEN_CNFG_AI1_2_CNFG_AI2_SE 0x004000ul
144 #define ADAC2_GEN_CNFG_AI1_2_CNFG_BOTH_SE 0x006000ul
145 #define ADAC2_GEN_CNFG_AI1_2_CNFG_DIFF 0x008000ul
146 #define ADAC2_GEN_CNFG_AI1_2_CNFG_MASK 0x00E000ul
147 #define ADAC2_GEN_CNFG_AI3_CNFG_PD 0x000000ul
148 #define ADAC2_GEN_CNFG_AI3_CNFG_SE 0x001000ul
149 #define ADAC2_GEN_CNFG_AI3_CNFG_MASK 0x001000ul
150 #define ADAC2_GEN_CNFG_AI4_CNFG_PD 0x000000ul
151 #define ADAC2_GEN_CNFG_AI4_CNFG_SE 0x000800ul
152 #define ADAC2_GEN_CNFG_AI4_CNFG_MASK 0x000800ul
153 #define ADAC2_GEN_CNFG_AI5_6_CNFG_PD 0x000000ul
154 #define ADAC2_GEN_CNFG_AI5_6_CNFG_DIFF 0x000400ul
155 #define ADAC2_GEN_CNFG_AI5_6_CNFG_MASK 0x000700ul
156 #define ADAC2_GEN_CNFG_AI5_DF_GAIN_12p5V 0x000000ul
157 #define ADAC2_GEN_CNFG_AI5_DF_GAIN_0p5V 0x000040ul
158 #define ADAC2_GEN_CNFG_AI5_DF_GAIN_0p25V 0x000080ul
159 #define ADAC2_GEN_CNFG_AI5_DF_GAIN_0p125V 0x0000C0ul
160 #define ADAC2_GEN_CNFG_AI5_DF_GAIN_MASK 0x0000C0ul
161 #define ADAC2_GEN_CNFG_OVC_CTRL_AUTO 0x000000ul
162 #define ADAC2_GEN_CNFG_OVC_CTRL_HOST 0x000008ul
163 #define ADAC2_GEN_CNFG_OVC_CTRL_MASK 0x000008ul
164 
169 #define ADAC2_ADC_DATA_RESOLUTION 0x7FFFFFul
170 #define ADAC2_DAC_DATA_RESOLUTION 0x03FFFFul
171 #define ADAC2_DAC_MIN_VALUE -131072l
172 #define ADAC2_DAC_MAX_VALUE 131071l
173 #define ADAC2_FULL_SCALE_RANGE_25V 25.0f
174 #define ADAC2_FULL_SCALE_RANGE_12p5V 12.5f
175 #define ADAC2_FULL_SCALE_RANGE_2p5V 2.5f
176 #define ADAC2_FULL_SCALE_RANGE_0p5V 0.5f
177 #define ADAC2_FULL_SCALE_RANGE_0p25V 0.25f
178 #define ADAC2_FULL_SCALE_RANGE_0p125V 0.125f
179 
184 #define ADAC2_START_CONVERSION 0x30
185 #define ADAC2_STOP_CONVERSION 0x10
186 #define ADAC2_DATA_RATE_5_SPS 0x00
187 #define ADAC2_DATA_RATE_10_SPS 0x01
188 #define ADAC2_DATA_RATE_15_SPS 0x02
189 #define ADAC2_DATA_RATE_30_SPS 0x03
190 #define ADAC2_DATA_RATE_50_SPS 0x04
191 #define ADAC2_DATA_RATE_60_SPS 0x05
192 #define ADAC2_DATA_RATE_225_SPS 0x06
193 #define ADAC2_DATA_RATE_450_SPS 0x07
194 #define ADAC2_DATA_RATE_900_SPS 0x08
195 #define ADAC2_DATA_RATE_1800_SPS 0x09
196 #define ADAC2_DATA_RATE_3600_SPS 0x0A
197 #define ADAC2_DATA_RATE_7200_SPS 0x0B
198 #define ADAC2_DATA_RATE_14400_SPS 0x0C
199 #define ADAC2_DATA_RATE_28800_SPS 0x0D
200 #define ADAC2_DATA_RATE_57600_SPS 0x0E
201 #define ADAC2_DATA_RATE_115200_SPS 0x0F
202 
207 #define ADAC2_PD_STATE_STANDBY 0x00
208 #define ADAC2_PD_STATE_RESET 0x10
209 #define ADAC2_CONV_MODE_CONTINUOUS 0x00
210 #define ADAC2_CONV_MODE_SINGLE_CYCLE 0x02
211 #define ADAC2_CONV_MODE_CONT_SINGLE_CYCLE 0x03
212 
217 #define ADAC2_CH_NONE 0x00
218 #define ADAC2_CH_AI1_SINGLE_ENDED 0x01
219 #define ADAC2_CH_AI2_SINGLE_ENDED 0x02
220 #define ADAC2_CH_AI1_AI2_DIFFERENTIAL 0x03
221 #define ADAC2_CH_AI3_SINGLE_ENDED 0x04
222 #define ADAC2_CH_AI4_SINGLE_ENDED 0x05
223 #define ADAC2_CH_AI3_AI4_DIFFERENTIAL 0x06
224 #define ADAC2_CH_AI5_AI6_DIFFERENTIAL_25V 0x09
225 #define ADAC2_CH_AI5_AI6_DIFFERENTIAL_2p5V 0x0C
226 #define ADAC2_CH_AUX1_SINGLE_ENDED 0x0D
227 #define ADAC2_CH_AUX2_SINGLE_ENDED 0x0E
228 #define ADAC2_CH_AUX1_AUX2_DIFFERENTIAL 0x0F
229 #define ADAC2_CH_MASK 0x000F00ul
230 
235 #define ADAC2_GPIO_0_MASK 0x01
236 #define ADAC2_GPIO_1_MASK 0x02
237 #define ADAC2_GPIO_2_MASK 0x04
238 #define ADAC2_GPIO_3_MASK 0x08
239 #define ADAC2_GPIO_4_MASK 0x10
240 #define ADAC2_GPIO_5_MASK 0x20
241 #define ADAC2_GPIO_ALL_MASK 0x3F
242 
251 #define ADAC2_SET_DATA_SAMPLE_EDGE SET_SPI_DATA_SAMPLE_EDGE
252 #define ADAC2_SET_DATA_SAMPLE_MIDDLE SET_SPI_DATA_SAMPLE_MIDDLE
253  // adac2_set
255 
270 #define ADAC2_MAP_MIKROBUS( cfg, mikrobus ) \
271  cfg.miso = MIKROBUS( mikrobus, MIKROBUS_MISO ); \
272  cfg.mosi = MIKROBUS( mikrobus, MIKROBUS_MOSI ); \
273  cfg.sck = MIKROBUS( mikrobus, MIKROBUS_SCK ); \
274  cfg.cs = MIKROBUS( mikrobus, MIKROBUS_CS ); \
275  cfg.rdy = MIKROBUS( mikrobus, MIKROBUS_AN ); \
276  cfg.rst = MIKROBUS( mikrobus, MIKROBUS_RST ); \
277  cfg.int_pin = MIKROBUS( mikrobus, MIKROBUS_INT )
278  // adac2_map // adac2
281 
286 typedef struct
287 {
288  // Output pins
289  digital_out_t rst;
291  // Input pins
292  digital_in_t rdy;
293  digital_in_t int_pin;
295  // Modules
296  spi_master_t spi;
298  pin_name_t chip_select;
302 } adac2_t;
303 
308 typedef struct
309 {
310  // Communication gpio pins
311  pin_name_t miso;
312  pin_name_t mosi;
313  pin_name_t sck;
314  pin_name_t cs;
316  // Additional gpio pins
317  pin_name_t rdy;
318  pin_name_t rst;
319  pin_name_t int_pin;
321  // static variable
322  uint32_t spi_speed;
323  spi_master_mode_t spi_mode;
324  spi_master_chip_select_polarity_t cs_polarity;
326 } adac2_cfg_t;
327 
332 typedef enum
333 {
334  ADAC2_OK = 0,
335  ADAC2_ERROR = -1
336 
338 
355 
369 err_t adac2_init ( adac2_t *ctx, adac2_cfg_t *cfg );
370 
383 err_t adac2_default_cfg ( adac2_t *ctx );
384 
398 err_t adac2_write_register ( adac2_t *ctx, uint8_t reg, uint32_t data_in );
399 
413 err_t adac2_read_register ( adac2_t *ctx, uint8_t reg, uint32_t *data_out );
414 
425 
436 
447 
457 
466 uint8_t adac2_get_rdy_pin ( adac2_t *ctx );
467 
476 uint8_t adac2_get_int_pin ( adac2_t *ctx );
477 
488 err_t adac2_start_conversion ( adac2_t *ctx, uint8_t data_rate );
489 
500 
514 err_t adac2_set_conversion_mode ( adac2_t *ctx, uint8_t mode );
515 
526 err_t adac2_set_active_ain_channel ( adac2_t *ctx, uint8_t channel );
527 
538 err_t adac2_read_raw_adc ( adac2_t *ctx, int32_t *raw_adc );
539 
551 err_t adac2_read_voltage ( adac2_t *ctx, float fsr, float *voltage );
552 
563 err_t adac2_write_dac ( adac2_t *ctx, int32_t dac );
564 
565 #ifdef __cplusplus
566 }
567 #endif
568 #endif // ADAC2_H
569  // adac2
571 
572 // ------------------------------------------------------------------------ END
adac2_cfg_t::miso
pin_name_t miso
Definition: adac2.h:311
adac2_read_register
err_t adac2_read_register(adac2_t *ctx, uint8_t reg, uint32_t *data_out)
ADAC 2 read register function.
adac2_t
ADAC 2 Click context object.
Definition: adac2.h:287
adac2_reset_device
void adac2_reset_device(adac2_t *ctx)
ADAC 2 reset device function.
adac2_cfg_t::mosi
pin_name_t mosi
Definition: adac2.h:312
adac2_get_rdy_pin
uint8_t adac2_get_rdy_pin(adac2_t *ctx)
ADAC 2 get rdy pin function.
spi_specifics.h
This file contains SPI specific macros, functions, etc.
adac2_t::spi
spi_master_t spi
Definition: adac2.h:296
adac2_cfg_t::spi_mode
spi_master_mode_t spi_mode
Definition: adac2.h:323
adac2_disable_spi_crc
err_t adac2_disable_spi_crc(adac2_t *ctx)
ADAC 2 disable spi crc function.
adac2_read_voltage
err_t adac2_read_voltage(adac2_t *ctx, float fsr, float *voltage)
ADAC 2 read voltage function.
adac2_init
err_t adac2_init(adac2_t *ctx, adac2_cfg_t *cfg)
ADAC 2 initialization function.
adac2_cfg_t::cs
pin_name_t cs
Definition: adac2.h:314
adac2_cfg_t::spi_speed
uint32_t spi_speed
Definition: adac2.h:322
adac2_enable_spi_crc
err_t adac2_enable_spi_crc(adac2_t *ctx)
ADAC 2 enable spi crc function.
adac2_cfg_t::sck
pin_name_t sck
Definition: adac2.h:313
adac2_start_conversion
err_t adac2_start_conversion(adac2_t *ctx, uint8_t data_rate)
ADAC 2 start conversion function.
adac2_t::int_pin
digital_in_t int_pin
Definition: adac2.h:293
adac2_write_register
err_t adac2_write_register(adac2_t *ctx, uint8_t reg, uint32_t data_in)
ADAC 2 write register function.
adac2_default_cfg
err_t adac2_default_cfg(adac2_t *ctx)
ADAC 2 default configuration function.
adac2_cfg_t::cs_polarity
spi_master_chip_select_polarity_t cs_polarity
Definition: adac2.h:324
adac2_cfg_t::int_pin
pin_name_t int_pin
Definition: adac2.h:319
adac2_set_conversion_mode
err_t adac2_set_conversion_mode(adac2_t *ctx, uint8_t mode)
ADAC 2 set conversion mode function.
adac2_get_int_pin
uint8_t adac2_get_int_pin(adac2_t *ctx)
ADAC 2 get int pin function.
adac2_t::spi_crc_enable
bool spi_crc_enable
Definition: adac2.h:300
adac2_check_communication
err_t adac2_check_communication(adac2_t *ctx)
ADAC 2 check communication function.
adac2_set_active_ain_channel
err_t adac2_set_active_ain_channel(adac2_t *ctx, uint8_t channel)
ADAC 2 set active ain channel function.
adac2_cfg_t::rst
pin_name_t rst
Definition: adac2.h:318
adac2_t::rst
digital_out_t rst
Definition: adac2.h:289
ADAC2_OK
@ ADAC2_OK
Definition: adac2.h:334
adac2_cfg_t
ADAC 2 Click configuration object.
Definition: adac2.h:309
adac2_read_raw_adc
err_t adac2_read_raw_adc(adac2_t *ctx, int32_t *raw_adc)
ADAC 2 read raw adc function.
adac2_return_value_t
adac2_return_value_t
ADAC 2 Click return value data.
Definition: adac2.h:333
adac2_cfg_setup
void adac2_cfg_setup(adac2_cfg_t *cfg)
ADAC 2 configuration object setup function.
ADAC2_ERROR
@ ADAC2_ERROR
Definition: adac2.h:335
adac2_stop_conversion
err_t adac2_stop_conversion(adac2_t *ctx)
ADAC 2 stop conversion function.
adac2_cfg_t::rdy
pin_name_t rdy
Definition: adac2.h:317
adac2_write_dac
err_t adac2_write_dac(adac2_t *ctx, int32_t dac)
ADAC 2 write dac function.
adac2_t::chip_select
pin_name_t chip_select
Definition: adac2.h:298
adac2_t::rdy
digital_in_t rdy
Definition: adac2.h:292