adc20  2.1.0.0
adc20.h
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22 
28 #ifndef ADC20_H
29 #define ADC20_H
30 
31 #ifdef __cplusplus
32 extern "C"{
33 #endif
34 
35 #include "mikrosdk_version.h"
36 
37 #ifdef __GNUC__
38 #if mikroSDK_GET_VERSION < 20800ul
39 #include "rcu_delays.h"
40 #else
41 #include "delays.h"
42 #endif
43 #endif
44 
45 #include "drv_digital_out.h"
46 #include "drv_digital_in.h"
47 #include "drv_spi_master.h"
48 #include "spi_specifics.h"
49 
70 #define ADC20_CMD_NOP 0x00
71 #define ADC20_CMD_REG_READ 0x10
72 #define ADC20_CMD_REG_WRITE 0x08
73 #define ADC20_CMD_SET_BIT 0x18
74 #define ADC20_CMD_CLEAR_BIT 0x20
75 
80 #define ADC20_REG_SYSTEM_STATUS 0x00
81 #define ADC20_REG_GENERAL_CFG 0x01
82 #define ADC20_REG_DATA_CFG 0x02
83 #define ADC20_REG_OSR_CFG 0x03
84 #define ADC20_REG_OPMODE_CFG 0x04
85 #define ADC20_REG_PIN_CFG 0x05
86 #define ADC20_REG_GPIO_CFG 0x07
87 #define ADC20_REG_GPO_DRIVE_CFG 0x09
88 #define ADC20_REG_GPO_VALUE 0x0B
89 #define ADC20_REG_GPI_VALUE 0x0D
90 #define ADC20_REG_SEQUENCE_CFG 0x10
91 #define ADC20_REG_CHANNEL_SEL 0x11
92 #define ADC20_REG_AUTO_SEQ_CH_SEL 0x12
93  // adc20_reg
95 
110 #define ADC20_DATA_CFG_FIX_PAT 0x80
111 #define ADC20_DATA_CFG_APPEND_CHANNEL_ID 0x10
112 #define ADC20_DATA_CFG_SPI_MODE_0 0x00
113 #define ADC20_DATA_CFG_SPI_MODE_1 0x01
114 #define ADC20_DATA_CFG_SPI_MODE_2 0x02
115 #define ADC20_DATA_CFG_SPI_MODE_3 0x03
116 #define ADC20_DATA_CFG_SPI_MODE_MASK 0x03
117 
122 #define ADC20_FIXED_CODE 0xA5A0
123 
128 #define ADC20_CHANNEL_0 0x01
129 #define ADC20_CHANNEL_1 0x02
130 #define ADC20_CHANNEL_2 0x04
131 #define ADC20_CHANNEL_3 0x08
132 #define ADC20_CHANNEL_4 0x10
133 #define ADC20_CHANNEL_5 0x20
134 #define ADC20_CHANNEL_6 0x40
135 #define ADC20_CHANNEL_7 0x80
136 #define ADC20_CHANNEL_NONE 0x00
137 #define ADC20_CHANNEL_MASK 0xFF
138 
143 #define ADC20_CHANNEL_ID_0 0
144 #define ADC20_CHANNEL_ID_1 1
145 #define ADC20_CHANNEL_ID_2 2
146 #define ADC20_CHANNEL_ID_3 3
147 #define ADC20_CHANNEL_ID_4 4
148 #define ADC20_CHANNEL_ID_5 5
149 #define ADC20_CHANNEL_ID_6 6
150 #define ADC20_CHANNEL_ID_7 7
151 #define ADC20_CHANNEL_ID_MASK 0x0F
152 
157 #define ADC20_PIN_CFG_ANALOG 0
158 #define ADC20_PIN_CFG_GPIO 1
159 
164 #define ADC20_GPIO_CFG_DIG_INPUT 0
165 #define ADC20_GPIO_CFG_DIG_OUTPUT 1
166 
171 #define ADC20_GPO_DRIVE_CFG_OPEN_DRAIN 0
172 #define ADC20_GPO_DRIVE_CFG_PUSH_PULL 1
173 
178 #define ADC20_GPIO_VALUE_LOW 0
179 #define ADC20_GPIO_VALUE_HIGH 1
180 
185 #define ADC20_OSR_NO_AVERAGING 0x00
186 #define ADC20_OSR_2_SAMPLES 0x01
187 #define ADC20_OSR_4_SAMPLES 0x02
188 #define ADC20_OSR_8_SAMPLES 0x03
189 #define ADC20_OSR_16_SAMPLES 0x04
190 #define ADC20_OSR_32_SAMPLES 0x05
191 #define ADC20_OSR_64_SAMPLES 0x06
192 #define ADC20_OSR_128_SAMPLES 0x07
193 #define ADC20_OSR_MASK 0x07
194 
199 #define ADC20_SEQ_STOP 0x00
200 #define ADC20_SEQ_START 0x10
201 #define ADC20_SEQ_MODE_MANUAL 0x00
202 #define ADC20_SEQ_MODE_AUTO 0x01
203 #define ADC20_SEQ_MODE_OTF 0x02
204 #define ADC20_SEQ_MODE_MASK 0x03
205 
210 #define ADC20_ADC_OFFSET 4
211 #define ADC20_RES_12BIT 0x0FFF
212 #define ADC20_VREF_3V3 3.3f
213 
222 #define ADC20_SET_DATA_SAMPLE_EDGE SET_SPI_DATA_SAMPLE_EDGE
223 #define ADC20_SET_DATA_SAMPLE_MIDDLE SET_SPI_DATA_SAMPLE_MIDDLE
224  // adc20_set
226 
241 #define ADC20_MAP_MIKROBUS( cfg, mikrobus ) \
242  cfg.miso = MIKROBUS( mikrobus, MIKROBUS_MISO ); \
243  cfg.mosi = MIKROBUS( mikrobus, MIKROBUS_MOSI ); \
244  cfg.sck = MIKROBUS( mikrobus, MIKROBUS_SCK ); \
245  cfg.cs = MIKROBUS( mikrobus, MIKROBUS_CS );
246  // adc20_map // adc20
249 
254 typedef struct
255 {
256  // Modules
257  spi_master_t spi;
259  pin_name_t chip_select;
261 } adc20_t;
262 
267 typedef struct
268 {
269  // Communication gpio pins
270  pin_name_t miso;
271  pin_name_t mosi;
272  pin_name_t sck;
273  pin_name_t cs;
275  // static variable
276  uint32_t spi_speed;
277  spi_master_mode_t spi_mode;
278  spi_master_chip_select_polarity_t cs_polarity;
280 } adc20_cfg_t;
281 
286 typedef enum
287 {
288  ADC20_OK = 0,
289  ADC20_ERROR = -1
290 
292 
309 
323 err_t adc20_init ( adc20_t *ctx, adc20_cfg_t *cfg );
324 
337 err_t adc20_default_cfg ( adc20_t *ctx );
338 
351 err_t adc20_write_register ( adc20_t *ctx, uint8_t reg, uint8_t data_in );
352 
365 err_t adc20_read_register ( adc20_t *ctx, uint8_t reg, uint8_t *data_out );
366 
378 err_t adc20_read_data ( adc20_t *ctx, uint16_t *data_out );
379 
391 
403 
415 
429 err_t adc20_set_pin_config ( adc20_t *ctx, uint8_t ch_mask, uint8_t pin_cfg );
430 
444 err_t adc20_set_gpio_config ( adc20_t *ctx, uint8_t ch_mask, uint8_t gpio_cfg );
445 
459 err_t adc20_set_gpo_drive_config ( adc20_t *ctx, uint8_t ch_mask, uint8_t gpo_drive_cfg );
460 
474 err_t adc20_set_gpo_value ( adc20_t *ctx, uint8_t ch_mask, uint8_t value );
475 
487 err_t adc20_read_gpio_value ( adc20_t *ctx, uint8_t *gpio_value );
488 
489 #ifdef __cplusplus
490 }
491 #endif
492 #endif // ADC20_H
493  // adc20
495 
496 // ------------------------------------------------------------------------ END
adc20_t
ADC 20 Click context object.
Definition: adc20.h:255
adc20_cfg_t::mosi
pin_name_t mosi
Definition: adc20.h:271
adc20_set_pin_config
err_t adc20_set_pin_config(adc20_t *ctx, uint8_t ch_mask, uint8_t pin_cfg)
ADC 20 set pin config function.
adc20_default_cfg
err_t adc20_default_cfg(adc20_t *ctx)
ADC 20 default configuration function.
adc20_write_register
err_t adc20_write_register(adc20_t *ctx, uint8_t reg, uint8_t data_in)
ADC 20 write register function.
adc20_read_data
err_t adc20_read_data(adc20_t *ctx, uint16_t *data_out)
ADC 20 read data function.
adc20_cfg_t::spi_mode
spi_master_mode_t spi_mode
Definition: adc20.h:277
adc20_set_gpio_config
err_t adc20_set_gpio_config(adc20_t *ctx, uint8_t ch_mask, uint8_t gpio_cfg)
ADC 20 set gpio config function.
spi_specifics.h
This file contains SPI specific macros, functions, etc.
adc20_stop_auto_sequence
err_t adc20_stop_auto_sequence(adc20_t *ctx)
ADC 20 stop auto sequence function.
adc20_t::spi
spi_master_t spi
Definition: adc20.h:257
adc20_cfg_t
ADC 20 Click configuration object.
Definition: adc20.h:268
ADC20_ERROR
@ ADC20_ERROR
Definition: adc20.h:289
adc20_return_value_t
adc20_return_value_t
ADC 20 Click return value data.
Definition: adc20.h:287
adc20_cfg_t::spi_speed
uint32_t spi_speed
Definition: adc20.h:276
adc20_cfg_t::sck
pin_name_t sck
Definition: adc20.h:272
adc20_cfg_t::cs_polarity
spi_master_chip_select_polarity_t cs_polarity
Definition: adc20.h:278
adc20_check_communication
err_t adc20_check_communication(adc20_t *ctx)
ADC 20 check communication function.
adc20_read_register
err_t adc20_read_register(adc20_t *ctx, uint8_t reg, uint8_t *data_out)
ADC 20 read register function.
adc20_cfg_t::cs
pin_name_t cs
Definition: adc20.h:273
adc20_cfg_setup
void adc20_cfg_setup(adc20_cfg_t *cfg)
ADC 20 configuration object setup function.
adc20_read_gpio_value
err_t adc20_read_gpio_value(adc20_t *ctx, uint8_t *gpio_value)
ADC 20 read gpio value function.
adc20_set_gpo_drive_config
err_t adc20_set_gpo_drive_config(adc20_t *ctx, uint8_t ch_mask, uint8_t gpo_drive_cfg)
ADC 20 set gpo drive config function.
ADC20_OK
@ ADC20_OK
Definition: adc20.h:288
adc20_cfg_t::miso
pin_name_t miso
Definition: adc20.h:270
adc20_t::chip_select
pin_name_t chip_select
Definition: adc20.h:259
adc20_start_auto_sequence
err_t adc20_start_auto_sequence(adc20_t *ctx)
ADC 20 start auto sequence function.
adc20_set_gpo_value
err_t adc20_set_gpo_value(adc20_t *ctx, uint8_t ch_mask, uint8_t value)
ADC 20 set gpo value function.
adc20_init
err_t adc20_init(adc20_t *ctx, adc20_cfg_t *cfg)
ADC 20 initialization function.