- s -
- t -
- TDC2_10pS_RESOLUTION
: tdc2.h
- TDC2_1pS_RESOLUTION
: tdc2.h
- TDC2_5pS_RESOLUTION
: tdc2.h
- TDC2_CFG10_FIXED_VALUE
: tdc2.h
- TDC2_CFG11_FIXED_VALUE
: tdc2.h
- TDC2_CFG12_FIXED_VALUE
: tdc2.h
- TDC2_CFG13_FIXED_VALUE
: tdc2.h
- TDC2_CFG14_FIXED_VALUE
: tdc2.h
- TDC2_CFG15_FIXED_VALUE
: tdc2.h
- TDC2_CFG16_FIXED_VALUE
: tdc2.h
- TDC2_CFG6_FIXED_VALUE
: tdc2.h
- TDC2_CFG7_FIXED_VALUE
: tdc2.h
- TDC2_CFG8_FIXED_VALUE
: tdc2.h
- TDC2_CFG9_FIXED_VALUE
: tdc2.h
- TDC2_CHANNEL_COMBINE_NORMAL
: tdc2.h
- TDC2_CHANNEL_COMBINE_PULSE_DISTANCE
: tdc2.h
- TDC2_CHANNEL_COMBINE_PULSE_WIDTH
: tdc2.h
- TDC2_DISABLE_DISABLE_PIN
: tdc2.h
- TDC2_DISABLE_REFCLK_PIN
: tdc2.h
- TDC2_DISABLE_RSTINDX_PIN
: tdc2.h
- TDC2_DISABLE_STOP1_PIN
: tdc2.h
- TDC2_DISABLE_STOP2_PIN
: tdc2.h
- TDC2_DISABLE_STOP3_PIN
: tdc2.h
- TDC2_DISABLE_STOP4_PIN
: tdc2.h
- TDC2_ENABLE_DISABLE_PIN
: tdc2.h
- TDC2_ENABLE_REFCLK_PIN
: tdc2.h
- TDC2_ENABLE_RSTINDX_PIN
: tdc2.h
- TDC2_ENABLE_STOP1_PIN
: tdc2.h
- TDC2_ENABLE_STOP2_PIN
: tdc2.h
- TDC2_ENABLE_STOP3_PIN
: tdc2.h
- TDC2_ENABLE_STOP4_PIN
: tdc2.h
- TDC2_FIFO_BLOCKWISE_READ_OFF
: tdc2.h
- TDC2_FIFO_BLOCKWISE_READ_ON
: tdc2.h
- TDC2_FIFO_COMMON_READ_OFF
: tdc2.h
- TDC2_FIFO_COMMON_READ_ON
: tdc2.h
- TDC2_HIGH_RESOLUTION_OFF
: tdc2.h
- TDC2_HIGH_RESOLUTION_X2
: tdc2.h
- TDC2_HIGH_RESOLUTION_X4
: tdc2.h
- TDC2_HIT_DISABLE_STOP1
: tdc2.h
- TDC2_HIT_DISABLE_STOP2
: tdc2.h
- TDC2_HIT_DISABLE_STOP3
: tdc2.h
- TDC2_HIT_DISABLE_STOP4
: tdc2.h
- TDC2_HIT_ENABLE_STOP1
: tdc2.h
- TDC2_HIT_ENABLE_STOP2
: tdc2.h
- TDC2_HIT_ENABLE_STOP3
: tdc2.h
- TDC2_HIT_ENABLE_STOP4
: tdc2.h
- TDC2_MAP_MIKROBUS
: tdc2.h
- TDC2_REFERENCE_CLOCK_EXTERNAL
: tdc2.h
- TDC2_REFERENCE_CLOCK_INTERNAL
: tdc2.h
- TDC2_REG_CFG0
: tdc2.h
- TDC2_REG_CFG1
: tdc2.h
- TDC2_REG_CFG10
: tdc2.h
- TDC2_REG_CFG11
: tdc2.h
- TDC2_REG_CFG12
: tdc2.h
- TDC2_REG_CFG13
: tdc2.h
- TDC2_REG_CFG14
: tdc2.h
- TDC2_REG_CFG15
: tdc2.h
- TDC2_REG_CFG16
: tdc2.h
- TDC2_REG_CFG2
: tdc2.h
- TDC2_REG_CFG3
: tdc2.h
- TDC2_REG_CFG4
: tdc2.h
- TDC2_REG_CFG5
: tdc2.h
- TDC2_REG_CFG6
: tdc2.h
- TDC2_REG_CFG7
: tdc2.h
- TDC2_REG_CFG8
: tdc2.h
- TDC2_REG_CFG9
: tdc2.h
- TDC2_REG_INDEX_CH1_BYTE1
: tdc2.h
- TDC2_REG_INDEX_CH1_BYTE2
: tdc2.h
- TDC2_REG_INDEX_CH1_BYTE3
: tdc2.h
- TDC2_REG_INDEX_CH2_BYTE1
: tdc2.h
- TDC2_REG_INDEX_CH2_BYTE2
: tdc2.h
- TDC2_REG_INDEX_CH2_BYTE3
: tdc2.h
- TDC2_REG_INDEX_CH3_BYTE1
: tdc2.h
- TDC2_REG_INDEX_CH3_BYTE2
: tdc2.h
- TDC2_REG_INDEX_CH3_BYTE3
: tdc2.h
- TDC2_REG_INDEX_CH4_BYTE1
: tdc2.h
- TDC2_REG_INDEX_CH4_BYTE2
: tdc2.h
- TDC2_REG_INDEX_CH4_BYTE3
: tdc2.h
- TDC2_REG_STOP_CH1_BYTE1
: tdc2.h
- TDC2_REG_STOP_CH1_BYTE2
: tdc2.h
- TDC2_REG_STOP_CH1_BYTE3
: tdc2.h
- TDC2_REG_STOP_CH2_BYTE1
: tdc2.h
- TDC2_REG_STOP_CH2_BYTE2
: tdc2.h
- TDC2_REG_STOP_CH2_BYTE3
: tdc2.h
- TDC2_REG_STOP_CH3_BYTE1
: tdc2.h
- TDC2_REG_STOP_CH3_BYTE2
: tdc2.h
- TDC2_REG_STOP_CH3_BYTE3
: tdc2.h
- TDC2_REG_STOP_CH4_BYTE1
: tdc2.h
- TDC2_REG_STOP_CH4_BYTE2
: tdc2.h
- TDC2_REG_STOP_CH4_BYTE3
: tdc2.h
- TDC2_SET_DATA_SAMPLE_EDGE
: tdc2.h
- TDC2_SET_DATA_SAMPLE_MIDDLE
: tdc2.h
- TDC2_SPIOPC_INIT
: tdc2.h
- TDC2_SPIOPC_POWER
: tdc2.h
- TDC2_SPIOPC_READ_CONFIG
: tdc2.h
- TDC2_SPIOPC_READ_RESULTS
: tdc2.h
- TDC2_SPIOPC_WRITE_CONFIG
: tdc2.h
- TDC2_uS_TO_mS
: tdc2.h