tdc2  2.1.0.0
tdc2.h
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22 
28 #ifndef TDC2_H
29 #define TDC2_H
30 
31 #ifdef __cplusplus
32 extern "C"{
33 #endif
34 
39 #ifdef PREINIT_SUPPORTED
40 #include "preinit.h"
41 #endif
42 
43 #ifdef MikroCCoreVersion
44  #if MikroCCoreVersion >= 1
45  #include "delays.h"
46  #endif
47 #endif
48 
49 #include "drv_digital_out.h"
50 #include "drv_digital_in.h"
51 #include "drv_spi_master.h"
52 #include "spi_specifics.h"
53 
79 #define TDC2_REG_CFG0 0x00
80 #define TDC2_REG_CFG1 0x01
81 #define TDC2_REG_CFG2 0x02
82 #define TDC2_REG_CFG3 0x03
83 #define TDC2_REG_CFG4 0x04
84 #define TDC2_REG_CFG5 0x05
85 #define TDC2_REG_CFG6 0x06
86 #define TDC2_REG_CFG7 0x07
87 #define TDC2_REG_CFG8 0x08
88 #define TDC2_REG_CFG9 0x09
89 #define TDC2_REG_CFG10 0x0A
90 #define TDC2_REG_CFG11 0x0B
91 #define TDC2_REG_CFG12 0x0C
92 #define TDC2_REG_CFG13 0x0D
93 #define TDC2_REG_CFG14 0x0E
94 #define TDC2_REG_CFG15 0x0F
95 #define TDC2_REG_CFG16 0x10
96 
101 #define TDC2_REG_INDEX_CH1_BYTE3 0x08
102 #define TDC2_REG_INDEX_CH1_BYTE2 0x09
103 #define TDC2_REG_INDEX_CH1_BYTE1 0x0A
104 #define TDC2_REG_STOP_CH1_BYTE3 0x0B
105 #define TDC2_REG_STOP_CH1_BYTE2 0x0C
106 #define TDC2_REG_STOP_CH1_BYTE1 0x0D
107 #define TDC2_REG_INDEX_CH2_BYTE3 0x0E
108 #define TDC2_REG_INDEX_CH2_BYTE2 0x0F
109 #define TDC2_REG_INDEX_CH2_BYTE1 0x10
110 #define TDC2_REG_STOP_CH2_BYTE3 0x11
111 #define TDC2_REG_STOP_CH2_BYTE2 0x12
112 #define TDC2_REG_STOP_CH2_BYTE1 0x13
113 #define TDC2_REG_INDEX_CH3_BYTE3 0x14
114 #define TDC2_REG_INDEX_CH3_BYTE2 0x15
115 #define TDC2_REG_INDEX_CH3_BYTE1 0x16
116 #define TDC2_REG_STOP_CH3_BYTE3 0x17
117 #define TDC2_REG_STOP_CH3_BYTE2 0x18
118 #define TDC2_REG_STOP_CH3_BYTE1 0x19
119 #define TDC2_REG_INDEX_CH4_BYTE3 0x1A
120 #define TDC2_REG_INDEX_CH4_BYTE2 0x1B
121 #define TDC2_REG_INDEX_CH4_BYTE1 0x1C
122 #define TDC2_REG_STOP_CH4_BYTE3 0x1D
123 #define TDC2_REG_STOP_CH4_BYTE2 0x1E
124 #define TDC2_REG_STOP_CH4_BYTE1 0x1F
125  // tdc2_reg
127 
147 #define TDC2_SPIOPC_POWER 0x30
148 #define TDC2_SPIOPC_INIT 0x18
149 #define TDC2_SPIOPC_WRITE_CONFIG 0x80
150 #define TDC2_SPIOPC_READ_CONFIG 0x40
151 #define TDC2_SPIOPC_READ_RESULTS 0x60
152 #define TDC2_SPIOPC_READ_RESULTS 0x60
153 
158 #define TDC2_ENABLE_STOP1_PIN 0x01
159 #define TDC2_DISABLE_STOP1_PIN 0x00
160 #define TDC2_ENABLE_STOP2_PIN 0x02
161 #define TDC2_DISABLE_STOP2_PIN 0x00
162 #define TDC2_ENABLE_STOP3_PIN 0x04
163 #define TDC2_DISABLE_STOP3_PIN 0x00
164 #define TDC2_ENABLE_STOP4_PIN 0x08
165 #define TDC2_DISABLE_STOP4_PIN 0x00
166 #define TDC2_ENABLE_REFCLK_PIN 0x10
167 #define TDC2_DISABLE_REFCLK_PIN 0x00
168 #define TDC2_ENABLE_DISABLE_PIN 0x40
169 #define TDC2_DISABLE_DISABLE_PIN 0x00
170 #define TDC2_ENABLE_RSTINDX_PIN 0x80
171 #define TDC2_DISABLE_RSTINDX_PIN 0x00
172 
177 #define TDC2_HIT_ENABLE_STOP1 0x01
178 #define TDC2_HIT_DISABLE_STOP1 0x00
179 #define TDC2_HIT_ENABLE_STOP2 0x02
180 #define TDC2_HIT_DISABLE_STOP2 0x00
181 #define TDC2_HIT_ENABLE_STOP3 0x04
182 #define TDC2_HIT_DISABLE_STOP3 0x00
183 #define TDC2_HIT_ENABLE_STOP4 0x08
184 #define TDC2_HIT_DISABLE_STOP4 0x00
185 #define TDC2_CHANNEL_COMBINE_NORMAL 0x00
186 #define TDC2_CHANNEL_COMBINE_PULSE_DISTANCE 0x10
187 #define TDC2_CHANNEL_COMBINE_PULSE_WIDTH 0x20
188 #define TDC2_HIGH_RESOLUTION_OFF 0x00
189 #define TDC2_HIGH_RESOLUTION_X2 0x40
190 #define TDC2_HIGH_RESOLUTION_X4 0x80
191 
196 #define TDC2_FIFO_COMMON_READ_OFF 0x00
197 #define TDC2_FIFO_COMMON_READ_ON 0x40
198 #define TDC2_FIFO_BLOCKWISE_READ_OFF 0x00
199 #define TDC2_FIFO_BLOCKWISE_READ_ON 0x80
200 
205 #define TDC2_CFG6_FIXED_VALUE 0xC0
206 #define TDC2_CFG8_FIXED_VALUE 0xA1
207 #define TDC2_CFG9_FIXED_VALUE 0x13
208 #define TDC2_CFG10_FIXED_VALUE 0x00
209 #define TDC2_CFG11_FIXED_VALUE 0x0A
210 #define TDC2_CFG12_FIXED_VALUE 0xCC
211 #define TDC2_CFG13_FIXED_VALUE 0x05
212 #define TDC2_CFG14_FIXED_VALUE 0xF1
213 #define TDC2_CFG15_FIXED_VALUE 0x7D
214 #define TDC2_CFG16_FIXED_VALUE 0x04
215 
220 #define TDC2_CFG7_FIXED_VALUE 0x23
221 #define TDC2_REFERENCE_CLOCK_INTERNAL 0x80
222 #define TDC2_REFERENCE_CLOCK_EXTERNAL 0x00
223 
228 #define TDC2_1pS_RESOLUTION 125000
229 #define TDC2_5pS_RESOLUTION 62500
230 #define TDC2_10pS_RESOLUTION 12500
231 
232 #define TDC2_uS_TO_mS 1000000
233 
242 #define TDC2_SET_DATA_SAMPLE_EDGE SET_SPI_DATA_SAMPLE_EDGE
243 #define TDC2_SET_DATA_SAMPLE_MIDDLE SET_SPI_DATA_SAMPLE_MIDDLE
244  // tdc2_set
246 
261 #define TDC2_MAP_MIKROBUS( cfg, mikrobus ) \
262  cfg.miso = MIKROBUS( mikrobus, MIKROBUS_MISO ); \
263  cfg.mosi = MIKROBUS( mikrobus, MIKROBUS_MOSI ); \
264  cfg.sck = MIKROBUS( mikrobus, MIKROBUS_SCK ); \
265  cfg.cs = MIKROBUS( mikrobus, MIKROBUS_CS ); \
266  cfg.rir = MIKROBUS( mikrobus, MIKROBUS_AN ); \
267  cfg.rst = MIKROBUS( mikrobus, MIKROBUS_RST ); \
268  cfg.dis = MIKROBUS( mikrobus, MIKROBUS_PWM ); \
269  cfg.int_pin = MIKROBUS( mikrobus, MIKROBUS_INT )
270  // tdc2_map // tdc2
273 
278 typedef struct
279 {
280  // Output pins
281  digital_out_t rir;
282  digital_out_t rst;
283  digital_out_t dis;
285  // Input pins
286  digital_in_t int_pin;
288  // Modules
289  spi_master_t spi;
291  pin_name_t chip_select;
293 } tdc2_t;
294 
299 typedef struct
300 {
301  // Communication gpio pins
302  pin_name_t miso;
303  pin_name_t mosi;
304  pin_name_t sck;
305  pin_name_t cs;
307  // Additional gpio pins
308  pin_name_t rir;
309  pin_name_t rst;
310  pin_name_t dis;
311  pin_name_t int_pin;
313  // static variable
314  uint32_t spi_speed;
315  spi_master_mode_t spi_mode;
316  spi_master_chip_select_polarity_t cs_polarity;
318 } tdc2_cfg_t;
319 
324 typedef enum
325 {
326  TDC2_OK = 0,
327  TDC2_ERROR = -1
328 
330 
347 
361 err_t tdc2_init ( tdc2_t *ctx, tdc2_cfg_t *cfg );
362 
375 err_t tdc2_default_cfg ( tdc2_t *ctx );
376 
391 err_t tdc2_generic_write ( tdc2_t *ctx, uint8_t reg, uint8_t *data_in, uint8_t len );
392 
407 err_t tdc2_generic_read ( tdc2_t *ctx, uint8_t reg, uint8_t *data_out, uint8_t len );
408 
423 err_t tdc2_write_config ( tdc2_t *ctx, uint8_t reg, uint8_t *data_in, uint8_t len );
424 
439 err_t tdc2_read_config ( tdc2_t *ctx, uint8_t reg, uint8_t *data_out, uint8_t len );
440 
455 err_t tdc2_read_results( tdc2_t *ctx, uint8_t reg, uint32_t *reference_index, uint32_t *stop_result );
456 
469 err_t tdc2_send_command ( tdc2_t *ctx, uint8_t command );
470 
481 err_t tdc2_sw_reset ( tdc2_t *ctx );
482 
494 
506 err_t tdc2_set_resolution ( tdc2_t *ctx, uint32_t resolution );
507 
519 err_t tdc2_get_resolution ( tdc2_t *ctx, uint32_t *resolution );
520 
529 void tdc2_reset_index ( tdc2_t *ctx );
530 
540 
550 
560 uint8_t tdc2_get_int_state ( tdc2_t *ctx );
561 
576 err_t tdc2_get_time_between_stops ( tdc2_t *ctx, uint32_t stop_result1, uint32_t reference_index1,
577  uint32_t stop_result2, uint32_t reference_index2,
578  uint32_t *time_in_us );
579 
580 #ifdef __cplusplus
581 }
582 #endif
583 #endif // TDC2_H
584  // tdc2
586 
587 // ------------------------------------------------------------------------ END
tdc2_t
TDC 2 Click context object.
Definition: tdc2.h:279
tdc2_start_measuring
err_t tdc2_start_measuring(tdc2_t *ctx)
TDC 2 start measuring function.
tdc2_generic_read
err_t tdc2_generic_read(tdc2_t *ctx, uint8_t reg, uint8_t *data_out, uint8_t len)
TDC 2 data reading function.
tdc2_t::spi
spi_master_t spi
Definition: tdc2.h:289
tdc2_disable_stop_channels
void tdc2_disable_stop_channels(tdc2_t *ctx)
TDC 2 disable stop channels function.
tdc2_t::int_pin
digital_in_t int_pin
Definition: tdc2.h:286
spi_specifics.h
This file contains SPI specific macros, functions, etc.
tdc2_init
err_t tdc2_init(tdc2_t *ctx, tdc2_cfg_t *cfg)
TDC 2 initialization function.
tdc2_generic_write
err_t tdc2_generic_write(tdc2_t *ctx, uint8_t reg, uint8_t *data_in, uint8_t len)
TDC 2 data writing function.
tdc2_reset_index
void tdc2_reset_index(tdc2_t *ctx)
TDC 2 reset reference index function.
tdc2_t::dis
digital_out_t dis
Definition: tdc2.h:283
tdc2_get_int_state
uint8_t tdc2_get_int_state(tdc2_t *ctx)
TDC 2 get int state function.
TDC2_ERROR
@ TDC2_ERROR
Definition: tdc2.h:327
tdc2_t::rir
digital_out_t rir
Definition: tdc2.h:281
tdc2_cfg_t::spi_mode
spi_master_mode_t spi_mode
Definition: tdc2.h:315
tdc2_cfg_setup
void tdc2_cfg_setup(tdc2_cfg_t *cfg)
TDC 2 configuration object setup function.
tdc2_read_results
err_t tdc2_read_results(tdc2_t *ctx, uint8_t reg, uint32_t *reference_index, uint32_t *stop_result)
TDC 2 results data reading function.
tdc2_read_config
err_t tdc2_read_config(tdc2_t *ctx, uint8_t reg, uint8_t *data_out, uint8_t len)
TDC 2 config data reading function.
tdc2_default_cfg
err_t tdc2_default_cfg(tdc2_t *ctx)
TDC 2 default configuration function.
tdc2_return_value_t
tdc2_return_value_t
TDC 2 Click return value data.
Definition: tdc2.h:325
tdc2_enable_stop_channels
void tdc2_enable_stop_channels(tdc2_t *ctx)
TDC 2 enable stop channels function.
tdc2_cfg_t::dis
pin_name_t dis
Definition: tdc2.h:310
tdc2_t::rst
digital_out_t rst
Definition: tdc2.h:282
tdc2_cfg_t::miso
pin_name_t miso
Definition: tdc2.h:302
tdc2_cfg_t::cs
pin_name_t cs
Definition: tdc2.h:305
tdc2_t::chip_select
pin_name_t chip_select
Definition: tdc2.h:291
tdc2_set_resolution
err_t tdc2_set_resolution(tdc2_t *ctx, uint32_t resolution)
TDC 2 set resolution function.
tdc2_cfg_t::rir
pin_name_t rir
Definition: tdc2.h:308
tdc2_get_resolution
err_t tdc2_get_resolution(tdc2_t *ctx, uint32_t *resolution)
TDC 2 set resolution function.
tdc2_cfg_t::rst
pin_name_t rst
Definition: tdc2.h:309
tdc2_write_config
err_t tdc2_write_config(tdc2_t *ctx, uint8_t reg, uint8_t *data_in, uint8_t len)
TDC 2 config data writing function.
tdc2_cfg_t::mosi
pin_name_t mosi
Definition: tdc2.h:303
tdc2_cfg_t::int_pin
pin_name_t int_pin
Definition: tdc2.h:311
tdc2_cfg_t::sck
pin_name_t sck
Definition: tdc2.h:304
TDC2_OK
@ TDC2_OK
Definition: tdc2.h:326
tdc2_cfg_t
TDC 2 Click configuration object.
Definition: tdc2.h:300
tdc2_send_command
err_t tdc2_send_command(tdc2_t *ctx, uint8_t command)
TDC 2 send command function.
tdc2_cfg_t::cs_polarity
spi_master_chip_select_polarity_t cs_polarity
Definition: tdc2.h:316
tdc2_get_time_between_stops
err_t tdc2_get_time_between_stops(tdc2_t *ctx, uint32_t stop_result1, uint32_t reference_index1, uint32_t stop_result2, uint32_t reference_index2, uint32_t *time_in_us)
TDC 2 get time between stops function.
tdc2_cfg_t::spi_speed
uint32_t spi_speed
Definition: tdc2.h:314
tdc2_sw_reset
err_t tdc2_sw_reset(tdc2_t *ctx)
TDC 2 software reset function.