hbridge11  2.1.0.0
hbridge11.h
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22 
28 #ifndef HBRIDGE11_H
29 #define HBRIDGE11_H
30 
31 #ifdef __cplusplus
32 extern "C"{
33 #endif
34 
35 #include "drv_digital_out.h"
36 #include "drv_digital_in.h"
37 #include "drv_spi_master.h"
38 #include "spi_specifics.h"
39 
60 #define HBRIDGE11_REG_STATUS 0x00
61 #define HBRIDGE11_REG_CFG_CH0 0x01
62 #define HBRIDGE11_REG_CFG_CH1 0x02
63 #define HBRIDGE11_REG_CFG_CH2 0x03
64 #define HBRIDGE11_REG_CFG_CH3 0x04
65 #define HBRIDGE11_REG_CFG_CH4 0x05
66 #define HBRIDGE11_REG_CFG_CH5 0x06
67 #define HBRIDGE11_REG_CFG_CH6 0x07
68 #define HBRIDGE11_REG_CFG_CH7 0x08
69 #define HBRIDGE11_REG_FAULT 0x09
70 #define HBRIDGE11_REG_CFG_DPM 0x0A
71  // hbridge11_reg
73 
88 #define HBRIDGE11_CMD_WRITE 0x80
89 #define HBRIDGE11_CMD_ADDRESS_MASK 0x1E
90 #define HBRIDGE11_CMD_8BIT_REG 0x01
91 
96 #define HBRIDGE11_STATUS_ONCH_ALL_OFF 0x00000000ul
97 #define HBRIDGE11_STATUS_ONCH_ALL_ON 0xFF000000ul
98 #define HBRIDGE11_STATUS_ONCH_MASK 0xFF000000ul
99 #define HBRIDGE11_STATUS_M_OVT 0x00800000ul
100 #define HBRIDGE11_STATUS_M_OCP 0x00400000ul
101 #define HBRIDGE11_STATUS_M_OLF 0x00200000ul
102 #define HBRIDGE11_STATUS_M_HHF 0x00100000ul
103 #define HBRIDGE11_STATUS_M_DPM 0x00080000ul
104 #define HBRIDGE11_STATUS_M_COMF 0x00040000ul
105 #define HBRIDGE11_STATUS_M_UVM 0x00020000ul
106 #define HBRIDGE11_STATUS_FREQM_100KHZ 0x00000000ul
107 #define HBRIDGE11_STATUS_FREQM_80KHZ 0x00010000ul
108 #define HBRIDGE11_STATUS_FREQM_MASK 0x00010000ul
109 #define HBRIDGE11_STATUS_CM76_INDEPEND 0x00000000ul
110 #define HBRIDGE11_STATUS_CM76_PARALLEL 0x00004000ul
111 #define HBRIDGE11_STATUS_CM76_HBRIDGE 0x00008000ul
112 #define HBRIDGE11_STATUS_CM76_MASK 0x0000C000ul
113 #define HBRIDGE11_STATUS_CM54_INDEPEND 0x00000000ul
114 #define HBRIDGE11_STATUS_CM54_PARALLEL 0x00001000ul
115 #define HBRIDGE11_STATUS_CM54_HBRIDGE 0x00002000ul
116 #define HBRIDGE11_STATUS_CM54_MASK 0x00003000ul
117 #define HBRIDGE11_STATUS_CM32_INDEPEND 0x00000000ul
118 #define HBRIDGE11_STATUS_CM32_PARALLEL 0x00000400ul
119 #define HBRIDGE11_STATUS_CM32_HBRIDGE 0x00000800ul
120 #define HBRIDGE11_STATUS_CM32_MASK 0x00000C00ul
121 #define HBRIDGE11_STATUS_CM10_INDEPEND 0x00000000ul
122 #define HBRIDGE11_STATUS_CM10_PARALLEL 0x00000100ul
123 #define HBRIDGE11_STATUS_CM10_HBRIDGE 0x00000200ul
124 #define HBRIDGE11_STATUS_CM10_MASK 0x00000300ul
125 #define HBRIDGE11_STATUS_OVT 0x00000080ul
126 #define HBRIDGE11_STATUS_OCP 0x00000040ul
127 #define HBRIDGE11_STATUS_OLF 0x00000020ul
128 #define HBRIDGE11_STATUS_HHF 0x00000010ul
129 #define HBRIDGE11_STATUS_DPM 0x00000008ul
130 #define HBRIDGE11_STATUS_COMF 0x00000004ul
131 #define HBRIDGE11_STATUS_UVM 0x00000002ul
132 #define HBRIDGE11_STATUS_ACTIVE 0x00000001ul
133 
138 #define HBRIDGE11_CFG_CH_HFS_FULL_SCALE 0x00000000ul
139 #define HBRIDGE11_CFG_CH_HFS_HALF_SCALE 0x80000000ul
140 #define HBRIDGE11_CFG_CH_HFS_MASK 0x80000000ul
141 #define HBRIDGE11_CFG_CH_HOLD_HS_OFF_LS_ON 0x00000000ul
142 #define HBRIDGE11_CFG_CH_HOLD_DUTY_MIN 0x01000000ul
143 #define HBRIDGE11_CFG_CH_HOLD_DUTY_MAX 0x7E000000ul
144 #define HBRIDGE11_CFG_CH_HOLD_HS_ON_LS_OFF 0x7F000000ul
145 #define HBRIDGE11_CFG_CH_HOLD_MASK 0x7F000000ul
146 #define HBRIDGE11_CFG_CH_TRGNSPI_ONCH 0x00000000ul
147 #define HBRIDGE11_CFG_CH_TRGNSPI_TRIG 0x00800000ul
148 #define HBRIDGE11_CFG_CH_TRGNSPI_MASK 0x00800000ul
149 #define HBRIDGE11_CFG_CH_HIT_HS_OFF_LS_ON 0x00000000ul
150 #define HBRIDGE11_CFG_CH_HIT_DUTY_MIN 0x00010000ul
151 #define HBRIDGE11_CFG_CH_HIT_DUTY_MAX 0x007E0000ul
152 #define HBRIDGE11_CFG_CH_HIT_HS_ON_LS_OFF 0x007F0000ul
153 #define HBRIDGE11_CFG_CH_HIT_MASK 0x007F0000ul
154 #define HBRIDGE11_CFG_CH_HIT_T_MASK 0x0000FF00ul
155 #define HBRIDGE11_CFG_CH_VDRNCDR_CDR 0x00000000ul
156 #define HBRIDGE11_CFG_CH_VDRNCDR_VDR 0x00000080ul
157 #define HBRIDGE11_CFG_CH_VDRNCDR_MASK 0x00000080ul
158 #define HBRIDGE11_CFG_CH_HSNLS_LS 0x00000000ul
159 #define HBRIDGE11_CFG_CH_HSNLS_HS 0x00000040ul
160 #define HBRIDGE11_CFG_CH_HSNLS_MASK 0x00000040ul
161 #define HBRIDGE11_CFG_CH_FREQ_CFG_MAIN_4 0x00000000ul
162 #define HBRIDGE11_CFG_CH_FREQ_CFG_MAIN_3 0x00000010ul
163 #define HBRIDGE11_CFG_CH_FREQ_CFG_MAIN_2 0x00000020ul
164 #define HBRIDGE11_CFG_CH_FREQ_CFG_MAIN 0x00000030ul
165 #define HBRIDGE11_CFG_CH_FREQ_CFG_MASK 0x00000030ul
166 #define HBRIDGE11_CFG_CH_SRC_MASK 0x00000008ul
167 #define HBRIDGE11_CFG_CH_OL_EN_MASK 0x00000004ul
168 #define HBRIDGE11_CFG_CH_DPM_EN_MASK 0x00000002ul
169 #define HBRIDGE11_CFG_CH_HHF_EN_MASK 0x00000001ul
170 
175 #define HBRIDGE11_FAULT_OCP_MASK 0xFF000000ul
176 #define HBRIDGE11_FAULT_HHF_MASK 0x00FF0000ul
177 #define HBRIDGE11_FAULT_OLF_MASK 0x0000FF00ul
178 #define HBRIDGE11_FAULT_DPM_MASK 0x000000FFul
179 
184 #define HBRIDGE11_CFG_DPM_ISTART_MASK 0x00007F00ul
185 #define HBRIDGE11_CFG_DPM_TDEB_MASK 0x000000F0ul
186 #define HBRIDGE11_CFG_DPM_IPTH_MASK 0x0000000Ful
187 
192 #define HBRIDGE11_MOTOR_SEL_0 0
193 #define HBRIDGE11_MOTOR_SEL_1 1
194 #define HBRIDGE11_MOTOR_SEL_2 2
195 #define HBRIDGE11_MOTOR_SEL_3 3
196 
201 #define HBRIDGE11_MOTOR_STATE_HI_Z 0
202 #define HBRIDGE11_MOTOR_STATE_FORWARD 1
203 #define HBRIDGE11_MOTOR_STATE_REVERSE 2
204 #define HBRIDGE11_MOTOR_STATE_BRAKE 3
205 
214 #define HBRIDGE11_SET_DATA_SAMPLE_EDGE SET_SPI_DATA_SAMPLE_EDGE
215 #define HBRIDGE11_SET_DATA_SAMPLE_MIDDLE SET_SPI_DATA_SAMPLE_MIDDLE
216  // hbridge11_set
218 
233 #define HBRIDGE11_MAP_MIKROBUS( cfg, mikrobus ) \
234  cfg.miso = MIKROBUS( mikrobus, MIKROBUS_MISO ); \
235  cfg.mosi = MIKROBUS( mikrobus, MIKROBUS_MOSI ); \
236  cfg.sck = MIKROBUS( mikrobus, MIKROBUS_SCK ); \
237  cfg.cs = MIKROBUS( mikrobus, MIKROBUS_CS ); \
238  cfg.cmd = MIKROBUS( mikrobus, MIKROBUS_AN ); \
239  cfg.en = MIKROBUS( mikrobus, MIKROBUS_RST ); \
240  cfg.flt = MIKROBUS( mikrobus, MIKROBUS_INT )
241  // hbridge11_map // hbridge11
244 
249 typedef struct
250 {
251  // Output pins
252  digital_out_t cmd;
253  digital_out_t en;
255  // Input pins
256  digital_in_t flt;
258  // Modules
259  spi_master_t spi;
261  pin_name_t chip_select;
263 } hbridge11_t;
264 
269 typedef struct
270 {
271  // Communication gpio pins
272  pin_name_t miso;
273  pin_name_t mosi;
274  pin_name_t sck;
275  pin_name_t cs;
277  // Additional gpio pins
278  pin_name_t cmd;
279  pin_name_t en;
280  pin_name_t flt;
282  // static variable
283  uint32_t spi_speed;
284  spi_master_mode_t spi_mode;
285  spi_master_chip_select_polarity_t cs_polarity;
288 
293 typedef enum
294 {
296  HBRIDGE11_ERROR = -1
297 
299 
316 
331 
345 
358 err_t hbridge11_write_8bit_register ( hbridge11_t *ctx, uint8_t reg, uint8_t data_in );
359 
372 err_t hbridge11_read_8bit_register ( hbridge11_t *ctx, uint8_t reg, uint8_t *data_out );
373 
386 err_t hbridge11_write_32bit_register ( hbridge11_t *ctx, uint8_t reg, uint32_t data_in );
387 
400 err_t hbridge11_read_32bit_register ( hbridge11_t *ctx, uint8_t reg, uint32_t *data_out );
401 
411 
421 
431 
443 err_t hbridge11_read_flags ( hbridge11_t *ctx, uint8_t *fault_flags );
444 
461 err_t hbridge11_set_motor_state ( hbridge11_t *ctx, uint8_t motor, uint8_t state );
462 
463 #ifdef __cplusplus
464 }
465 #endif
466 #endif // HBRIDGE11_H
467  // hbridge11
469 
470 // ------------------------------------------------------------------------ END
hbridge11_cfg_t::spi_mode
spi_master_mode_t spi_mode
Definition: hbridge11.h:284
hbridge11_read_flags
err_t hbridge11_read_flags(hbridge11_t *ctx, uint8_t *fault_flags)
H-Bridge 11 read flags function.
hbridge11_t::spi
spi_master_t spi
Definition: hbridge11.h:259
hbridge11_enable_device
void hbridge11_enable_device(hbridge11_t *ctx)
H-Bridge 11 enable device function.
hbridge11_cfg_t::cs_polarity
spi_master_chip_select_polarity_t cs_polarity
Definition: hbridge11.h:285
hbridge11_t::flt
digital_in_t flt
Definition: hbridge11.h:256
spi_specifics.h
This file contains SPI specific macros, functions, etc.
hbridge11_t
H-Bridge 11 Click context object.
Definition: hbridge11.h:250
HBRIDGE11_ERROR
@ HBRIDGE11_ERROR
Definition: hbridge11.h:296
hbridge11_cfg_t
H-Bridge 11 Click configuration object.
Definition: hbridge11.h:270
hbridge11_read_8bit_register
err_t hbridge11_read_8bit_register(hbridge11_t *ctx, uint8_t reg, uint8_t *data_out)
H-Bridge 11 read 8bit register function.
hbridge11_cfg_t::cmd
pin_name_t cmd
Definition: hbridge11.h:278
hbridge11_default_cfg
err_t hbridge11_default_cfg(hbridge11_t *ctx)
H-Bridge 11 default configuration function.
hbridge11_get_fault_pin
uint8_t hbridge11_get_fault_pin(hbridge11_t *ctx)
H-Bridge 11 get fault pin function.
hbridge11_cfg_t::flt
pin_name_t flt
Definition: hbridge11.h:280
HBRIDGE11_OK
@ HBRIDGE11_OK
Definition: hbridge11.h:295
hbridge11_init
err_t hbridge11_init(hbridge11_t *ctx, hbridge11_cfg_t *cfg)
H-Bridge 11 initialization function.
hbridge11_return_value_t
hbridge11_return_value_t
H-Bridge 11 Click return value data.
Definition: hbridge11.h:294
hbridge11_cfg_t::sck
pin_name_t sck
Definition: hbridge11.h:274
hbridge11_disable_device
void hbridge11_disable_device(hbridge11_t *ctx)
H-Bridge 11 disable device function.
hbridge11_set_motor_state
err_t hbridge11_set_motor_state(hbridge11_t *ctx, uint8_t motor, uint8_t state)
H-Bridge 11 set motor state function.
hbridge11_cfg_t::miso
pin_name_t miso
Definition: hbridge11.h:272
hbridge11_cfg_t::spi_speed
uint32_t spi_speed
Definition: hbridge11.h:283
hbridge11_read_32bit_register
err_t hbridge11_read_32bit_register(hbridge11_t *ctx, uint8_t reg, uint32_t *data_out)
H-Bridge 11 read 32bit register function.
hbridge11_cfg_t::en
pin_name_t en
Definition: hbridge11.h:279
hbridge11_t::en
digital_out_t en
Definition: hbridge11.h:253
hbridge11_cfg_setup
void hbridge11_cfg_setup(hbridge11_cfg_t *cfg)
H-Bridge 11 configuration object setup function.
hbridge11_cfg_t::cs
pin_name_t cs
Definition: hbridge11.h:275
hbridge11_cfg_t::mosi
pin_name_t mosi
Definition: hbridge11.h:273
hbridge11_t::chip_select
pin_name_t chip_select
Definition: hbridge11.h:261
hbridge11_write_32bit_register
err_t hbridge11_write_32bit_register(hbridge11_t *ctx, uint8_t reg, uint32_t data_in)
H-Bridge 11 write 32bit register function.
hbridge11_t::cmd
digital_out_t cmd
Definition: hbridge11.h:252
hbridge11_write_8bit_register
err_t hbridge11_write_8bit_register(hbridge11_t *ctx, uint8_t reg, uint8_t data_in)
H-Bridge 11 write 8bit register function.