hbridge11  2.1.0.0
hbridge11.h
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22 
28 #ifndef HBRIDGE11_H
29 #define HBRIDGE11_H
30 
31 #ifdef __cplusplus
32 extern "C"{
33 #endif
34 
39 #ifdef PREINIT_SUPPORTED
40 #include "preinit.h"
41 #endif
42 
43 #ifdef MikroCCoreVersion
44  #if MikroCCoreVersion >= 1
45  #include "delays.h"
46  #endif
47 #endif
48 
49 #include "drv_digital_out.h"
50 #include "drv_digital_in.h"
51 #include "drv_spi_master.h"
52 #include "spi_specifics.h"
53 
74 #define HBRIDGE11_REG_STATUS 0x00
75 #define HBRIDGE11_REG_CFG_CH0 0x01
76 #define HBRIDGE11_REG_CFG_CH1 0x02
77 #define HBRIDGE11_REG_CFG_CH2 0x03
78 #define HBRIDGE11_REG_CFG_CH3 0x04
79 #define HBRIDGE11_REG_CFG_CH4 0x05
80 #define HBRIDGE11_REG_CFG_CH5 0x06
81 #define HBRIDGE11_REG_CFG_CH6 0x07
82 #define HBRIDGE11_REG_CFG_CH7 0x08
83 #define HBRIDGE11_REG_FAULT 0x09
84 #define HBRIDGE11_REG_CFG_DPM 0x0A
85  // hbridge11_reg
87 
102 #define HBRIDGE11_CMD_WRITE 0x80
103 #define HBRIDGE11_CMD_ADDRESS_MASK 0x1E
104 #define HBRIDGE11_CMD_8BIT_REG 0x01
105 
110 #define HBRIDGE11_STATUS_ONCH_ALL_OFF 0x00000000ul
111 #define HBRIDGE11_STATUS_ONCH_ALL_ON 0xFF000000ul
112 #define HBRIDGE11_STATUS_ONCH_MASK 0xFF000000ul
113 #define HBRIDGE11_STATUS_M_OVT 0x00800000ul
114 #define HBRIDGE11_STATUS_M_OCP 0x00400000ul
115 #define HBRIDGE11_STATUS_M_OLF 0x00200000ul
116 #define HBRIDGE11_STATUS_M_HHF 0x00100000ul
117 #define HBRIDGE11_STATUS_M_DPM 0x00080000ul
118 #define HBRIDGE11_STATUS_M_COMF 0x00040000ul
119 #define HBRIDGE11_STATUS_M_UVM 0x00020000ul
120 #define HBRIDGE11_STATUS_FREQM_100KHZ 0x00000000ul
121 #define HBRIDGE11_STATUS_FREQM_80KHZ 0x00010000ul
122 #define HBRIDGE11_STATUS_FREQM_MASK 0x00010000ul
123 #define HBRIDGE11_STATUS_CM76_INDEPEND 0x00000000ul
124 #define HBRIDGE11_STATUS_CM76_PARALLEL 0x00004000ul
125 #define HBRIDGE11_STATUS_CM76_HBRIDGE 0x00008000ul
126 #define HBRIDGE11_STATUS_CM76_MASK 0x0000C000ul
127 #define HBRIDGE11_STATUS_CM54_INDEPEND 0x00000000ul
128 #define HBRIDGE11_STATUS_CM54_PARALLEL 0x00001000ul
129 #define HBRIDGE11_STATUS_CM54_HBRIDGE 0x00002000ul
130 #define HBRIDGE11_STATUS_CM54_MASK 0x00003000ul
131 #define HBRIDGE11_STATUS_CM32_INDEPEND 0x00000000ul
132 #define HBRIDGE11_STATUS_CM32_PARALLEL 0x00000400ul
133 #define HBRIDGE11_STATUS_CM32_HBRIDGE 0x00000800ul
134 #define HBRIDGE11_STATUS_CM32_MASK 0x00000C00ul
135 #define HBRIDGE11_STATUS_CM10_INDEPEND 0x00000000ul
136 #define HBRIDGE11_STATUS_CM10_PARALLEL 0x00000100ul
137 #define HBRIDGE11_STATUS_CM10_HBRIDGE 0x00000200ul
138 #define HBRIDGE11_STATUS_CM10_MASK 0x00000300ul
139 #define HBRIDGE11_STATUS_OVT 0x00000080ul
140 #define HBRIDGE11_STATUS_OCP 0x00000040ul
141 #define HBRIDGE11_STATUS_OLF 0x00000020ul
142 #define HBRIDGE11_STATUS_HHF 0x00000010ul
143 #define HBRIDGE11_STATUS_DPM 0x00000008ul
144 #define HBRIDGE11_STATUS_COMF 0x00000004ul
145 #define HBRIDGE11_STATUS_UVM 0x00000002ul
146 #define HBRIDGE11_STATUS_ACTIVE 0x00000001ul
147 
152 #define HBRIDGE11_CFG_CH_HFS_FULL_SCALE 0x00000000ul
153 #define HBRIDGE11_CFG_CH_HFS_HALF_SCALE 0x80000000ul
154 #define HBRIDGE11_CFG_CH_HFS_MASK 0x80000000ul
155 #define HBRIDGE11_CFG_CH_HOLD_HS_OFF_LS_ON 0x00000000ul
156 #define HBRIDGE11_CFG_CH_HOLD_DUTY_MIN 0x01000000ul
157 #define HBRIDGE11_CFG_CH_HOLD_DUTY_MAX 0x7E000000ul
158 #define HBRIDGE11_CFG_CH_HOLD_HS_ON_LS_OFF 0x7F000000ul
159 #define HBRIDGE11_CFG_CH_HOLD_MASK 0x7F000000ul
160 #define HBRIDGE11_CFG_CH_TRGNSPI_ONCH 0x00000000ul
161 #define HBRIDGE11_CFG_CH_TRGNSPI_TRIG 0x00800000ul
162 #define HBRIDGE11_CFG_CH_TRGNSPI_MASK 0x00800000ul
163 #define HBRIDGE11_CFG_CH_HIT_HS_OFF_LS_ON 0x00000000ul
164 #define HBRIDGE11_CFG_CH_HIT_DUTY_MIN 0x00010000ul
165 #define HBRIDGE11_CFG_CH_HIT_DUTY_MAX 0x007E0000ul
166 #define HBRIDGE11_CFG_CH_HIT_HS_ON_LS_OFF 0x007F0000ul
167 #define HBRIDGE11_CFG_CH_HIT_MASK 0x007F0000ul
168 #define HBRIDGE11_CFG_CH_HIT_T_MASK 0x0000FF00ul
169 #define HBRIDGE11_CFG_CH_VDRNCDR_CDR 0x00000000ul
170 #define HBRIDGE11_CFG_CH_VDRNCDR_VDR 0x00000080ul
171 #define HBRIDGE11_CFG_CH_VDRNCDR_MASK 0x00000080ul
172 #define HBRIDGE11_CFG_CH_HSNLS_LS 0x00000000ul
173 #define HBRIDGE11_CFG_CH_HSNLS_HS 0x00000040ul
174 #define HBRIDGE11_CFG_CH_HSNLS_MASK 0x00000040ul
175 #define HBRIDGE11_CFG_CH_FREQ_CFG_MAIN_4 0x00000000ul
176 #define HBRIDGE11_CFG_CH_FREQ_CFG_MAIN_3 0x00000010ul
177 #define HBRIDGE11_CFG_CH_FREQ_CFG_MAIN_2 0x00000020ul
178 #define HBRIDGE11_CFG_CH_FREQ_CFG_MAIN 0x00000030ul
179 #define HBRIDGE11_CFG_CH_FREQ_CFG_MASK 0x00000030ul
180 #define HBRIDGE11_CFG_CH_SRC_MASK 0x00000008ul
181 #define HBRIDGE11_CFG_CH_OL_EN_MASK 0x00000004ul
182 #define HBRIDGE11_CFG_CH_DPM_EN_MASK 0x00000002ul
183 #define HBRIDGE11_CFG_CH_HHF_EN_MASK 0x00000001ul
184 
189 #define HBRIDGE11_FAULT_OCP_MASK 0xFF000000ul
190 #define HBRIDGE11_FAULT_HHF_MASK 0x00FF0000ul
191 #define HBRIDGE11_FAULT_OLF_MASK 0x0000FF00ul
192 #define HBRIDGE11_FAULT_DPM_MASK 0x000000FFul
193 
198 #define HBRIDGE11_CFG_DPM_ISTART_MASK 0x00007F00ul
199 #define HBRIDGE11_CFG_DPM_TDEB_MASK 0x000000F0ul
200 #define HBRIDGE11_CFG_DPM_IPTH_MASK 0x0000000Ful
201 
206 #define HBRIDGE11_MOTOR_SEL_0 0
207 #define HBRIDGE11_MOTOR_SEL_1 1
208 #define HBRIDGE11_MOTOR_SEL_2 2
209 #define HBRIDGE11_MOTOR_SEL_3 3
210 
215 #define HBRIDGE11_MOTOR_STATE_HI_Z 0
216 #define HBRIDGE11_MOTOR_STATE_FORWARD 1
217 #define HBRIDGE11_MOTOR_STATE_REVERSE 2
218 #define HBRIDGE11_MOTOR_STATE_BRAKE 3
219 
228 #define HBRIDGE11_SET_DATA_SAMPLE_EDGE SET_SPI_DATA_SAMPLE_EDGE
229 #define HBRIDGE11_SET_DATA_SAMPLE_MIDDLE SET_SPI_DATA_SAMPLE_MIDDLE
230  // hbridge11_set
232 
247 #define HBRIDGE11_MAP_MIKROBUS( cfg, mikrobus ) \
248  cfg.miso = MIKROBUS( mikrobus, MIKROBUS_MISO ); \
249  cfg.mosi = MIKROBUS( mikrobus, MIKROBUS_MOSI ); \
250  cfg.sck = MIKROBUS( mikrobus, MIKROBUS_SCK ); \
251  cfg.cs = MIKROBUS( mikrobus, MIKROBUS_CS ); \
252  cfg.cmd = MIKROBUS( mikrobus, MIKROBUS_AN ); \
253  cfg.en = MIKROBUS( mikrobus, MIKROBUS_RST ); \
254  cfg.flt = MIKROBUS( mikrobus, MIKROBUS_INT )
255  // hbridge11_map // hbridge11
258 
263 typedef struct
264 {
265  // Output pins
266  digital_out_t cmd;
267  digital_out_t en;
269  // Input pins
270  digital_in_t flt;
272  // Modules
273  spi_master_t spi;
275  pin_name_t chip_select;
277 } hbridge11_t;
278 
283 typedef struct
284 {
285  // Communication gpio pins
286  pin_name_t miso;
287  pin_name_t mosi;
288  pin_name_t sck;
289  pin_name_t cs;
291  // Additional gpio pins
292  pin_name_t cmd;
293  pin_name_t en;
294  pin_name_t flt;
296  // static variable
297  uint32_t spi_speed;
298  spi_master_mode_t spi_mode;
299  spi_master_chip_select_polarity_t cs_polarity;
302 
307 typedef enum
308 {
310  HBRIDGE11_ERROR = -1
311 
313 
330 
345 
359 
372 err_t hbridge11_write_8bit_register ( hbridge11_t *ctx, uint8_t reg, uint8_t data_in );
373 
386 err_t hbridge11_read_8bit_register ( hbridge11_t *ctx, uint8_t reg, uint8_t *data_out );
387 
400 err_t hbridge11_write_32bit_register ( hbridge11_t *ctx, uint8_t reg, uint32_t data_in );
401 
414 err_t hbridge11_read_32bit_register ( hbridge11_t *ctx, uint8_t reg, uint32_t *data_out );
415 
425 
435 
445 
457 err_t hbridge11_read_flags ( hbridge11_t *ctx, uint8_t *fault_flags );
458 
475 err_t hbridge11_set_motor_state ( hbridge11_t *ctx, uint8_t motor, uint8_t state );
476 
477 #ifdef __cplusplus
478 }
479 #endif
480 #endif // HBRIDGE11_H
481  // hbridge11
483 
484 // ------------------------------------------------------------------------ END
hbridge11_cfg_t::spi_mode
spi_master_mode_t spi_mode
Definition: hbridge11.h:298
hbridge11_read_flags
err_t hbridge11_read_flags(hbridge11_t *ctx, uint8_t *fault_flags)
H-Bridge 11 read flags function.
hbridge11_t::spi
spi_master_t spi
Definition: hbridge11.h:273
hbridge11_enable_device
void hbridge11_enable_device(hbridge11_t *ctx)
H-Bridge 11 enable device function.
hbridge11_cfg_t::cs_polarity
spi_master_chip_select_polarity_t cs_polarity
Definition: hbridge11.h:299
hbridge11_t::flt
digital_in_t flt
Definition: hbridge11.h:270
spi_specifics.h
This file contains SPI specific macros, functions, etc.
hbridge11_t
H-Bridge 11 Click context object.
Definition: hbridge11.h:264
HBRIDGE11_ERROR
@ HBRIDGE11_ERROR
Definition: hbridge11.h:310
hbridge11_cfg_t
H-Bridge 11 Click configuration object.
Definition: hbridge11.h:284
hbridge11_read_8bit_register
err_t hbridge11_read_8bit_register(hbridge11_t *ctx, uint8_t reg, uint8_t *data_out)
H-Bridge 11 read 8bit register function.
hbridge11_cfg_t::cmd
pin_name_t cmd
Definition: hbridge11.h:292
hbridge11_default_cfg
err_t hbridge11_default_cfg(hbridge11_t *ctx)
H-Bridge 11 default configuration function.
hbridge11_get_fault_pin
uint8_t hbridge11_get_fault_pin(hbridge11_t *ctx)
H-Bridge 11 get fault pin function.
hbridge11_cfg_t::flt
pin_name_t flt
Definition: hbridge11.h:294
HBRIDGE11_OK
@ HBRIDGE11_OK
Definition: hbridge11.h:309
hbridge11_init
err_t hbridge11_init(hbridge11_t *ctx, hbridge11_cfg_t *cfg)
H-Bridge 11 initialization function.
hbridge11_return_value_t
hbridge11_return_value_t
H-Bridge 11 Click return value data.
Definition: hbridge11.h:308
hbridge11_cfg_t::sck
pin_name_t sck
Definition: hbridge11.h:288
hbridge11_disable_device
void hbridge11_disable_device(hbridge11_t *ctx)
H-Bridge 11 disable device function.
hbridge11_set_motor_state
err_t hbridge11_set_motor_state(hbridge11_t *ctx, uint8_t motor, uint8_t state)
H-Bridge 11 set motor state function.
hbridge11_cfg_t::miso
pin_name_t miso
Definition: hbridge11.h:286
hbridge11_cfg_t::spi_speed
uint32_t spi_speed
Definition: hbridge11.h:297
hbridge11_read_32bit_register
err_t hbridge11_read_32bit_register(hbridge11_t *ctx, uint8_t reg, uint32_t *data_out)
H-Bridge 11 read 32bit register function.
hbridge11_cfg_t::en
pin_name_t en
Definition: hbridge11.h:293
hbridge11_t::en
digital_out_t en
Definition: hbridge11.h:267
hbridge11_cfg_setup
void hbridge11_cfg_setup(hbridge11_cfg_t *cfg)
H-Bridge 11 configuration object setup function.
hbridge11_cfg_t::cs
pin_name_t cs
Definition: hbridge11.h:289
hbridge11_cfg_t::mosi
pin_name_t mosi
Definition: hbridge11.h:287
hbridge11_t::chip_select
pin_name_t chip_select
Definition: hbridge11.h:275
hbridge11_write_32bit_register
err_t hbridge11_write_32bit_register(hbridge11_t *ctx, uint8_t reg, uint32_t data_in)
H-Bridge 11 write 32bit register function.
hbridge11_t::cmd
digital_out_t cmd
Definition: hbridge11.h:266
hbridge11_write_8bit_register
err_t hbridge11_write_8bit_register(hbridge11_t *ctx, uint8_t reg, uint8_t data_in)
H-Bridge 11 write 8bit register function.