Go to the documentation of this file.
35 #include "mikrosdk_version.h"
38 #if mikroSDK_GET_VERSION < 20800ul
39 #include "rcu_delays.h"
45 #include "drv_digital_out.h"
46 #include "drv_digital_in.h"
47 #include "drv_spi_master.h"
49 #include "drv_analog_in.h"
72 #define ULTRASONIC5_REG_BPF_CONFIG_1 0x10
73 #define ULTRASONIC5_REG_BPF_CONFIG_2 0x11
74 #define ULTRASONIC5_REG_DEV_CTRL_1 0x12
75 #define ULTRASONIC5_REG_DEV_CTRL_2 0x13
76 #define ULTRASONIC5_REG_DEV_CTRL_3 0x14
77 #define ULTRASONIC5_REG_VDRV_CTRL 0x16
78 #define ULTRASONIC5_REG_ECHO_INT_CONFIG 0x17
79 #define ULTRASONIC5_REG_ZC_CONFIG 0x18
80 #define ULTRASONIC5_REG_BURST_PULSE 0x1A
81 #define ULTRASONIC5_REG_TOF_CONFIG 0x1B
82 #define ULTRASONIC5_REG_DEV_STAT 0x1C
83 #define ULTRASONIC5_REG_DEVICE_ID 0x1D
84 #define ULTRASONIC5_REG_REV_ID 0x1E
102 #define ULTRASONIC5_BPF_CONFIG_1_FC_TRIM_FRC 0x80
103 #define ULTRASONIC5_BPF_CONFIG_1_BYPASS 0x40
104 #define ULTRASONIC5_BPF_CONFIG_1_HPF_FREQ_MASK 0x3F
105 #define ULTRASONIC5_BPF_CONFIG_1_RESET 0x00
111 #define ULTRASONIC5_BPF_CONFIG_2_Q_SEL_4 0x00
112 #define ULTRASONIC5_BPF_CONFIG_2_Q_SEL_5 0x10
113 #define ULTRASONIC5_BPF_CONFIG_2_Q_SEL_2 0x20
114 #define ULTRASONIC5_BPF_CONFIG_2_Q_SEL_3 0x30
115 #define ULTRASONIC5_BPF_CONFIG_2_Q_SEL_MASK 0x30
116 #define ULTRASONIC5_BPF_CONFIG_2_FC_TRIM_MASK 0x0F
117 #define ULTRASONIC5_BPF_CONFIG_2_RESET 0x00
123 #define ULTRASONIC5_DEV_CTRL_1_LOGAMP_FRC 0x80
124 #define ULTRASONIC5_DEV_CTRL_1_LOGAMP_SLP_ADJ_MASK 0x70
125 #define ULTRASONIC5_DEV_CTRL_1_LOGAMP_INT_ADJ_MASK 0x0F
126 #define ULTRASONIC5_DEV_CTRL_1_RESET 0x00
132 #define ULTRASONIC5_DEV_CTRL_2_LOGAMP_DIS_FIRST 0x80
133 #define ULTRASONIC5_DEV_CTRL_2_LOGAMP_DIS_LAST 0x40
134 #define ULTRASONIC5_DEV_CTRL_2_VOUT_SCALE_SEL_5V 0x04
135 #define ULTRASONIC5_DEV_CTRL_2_LNA_GAIN_15V 0x00
136 #define ULTRASONIC5_DEV_CTRL_2_LNA_GAIN_10V 0x01
137 #define ULTRASONIC5_DEV_CTRL_2_LNA_GAIN_20V 0x02
138 #define ULTRASONIC5_DEV_CTRL_2_LNA_GAIN_12_5V 0x03
139 #define ULTRASONIC5_DEV_CTRL_2_LNA_GAIN_MASK 0x03
140 #define ULTRASONIC5_DEV_CTRL_2_RESET 0x00
146 #define ULTRASONIC5_DEV_CTRL_3_DRV_PLS_FLT_DT_64US 0x00
147 #define ULTRASONIC5_DEV_CTRL_3_DRV_PLS_FLT_DT_48US 0x04
148 #define ULTRASONIC5_DEV_CTRL_3_DRV_PLS_FLT_DT_32US 0x08
149 #define ULTRASONIC5_DEV_CTRL_3_DRV_PLS_FLT_DT_24US 0x0C
150 #define ULTRASONIC5_DEV_CTRL_3_DRV_PLS_FLT_DT_16US 0x10
151 #define ULTRASONIC5_DEV_CTRL_3_DRV_PLS_FLT_DT_8US 0x14
152 #define ULTRASONIC5_DEV_CTRL_3_DRV_PLS_FLT_DT_4US 0x18
153 #define ULTRASONIC5_DEV_CTRL_3_DRV_PLS_FLT_DT_DIS 0x1C
154 #define ULTRASONIC5_DEV_CTRL_3_DRV_PLS_FLT_DT_MASK 0x1C
155 #define ULTRASONIC5_DEV_CTRL_3_IO_MODE_0 0x00
156 #define ULTRASONIC5_DEV_CTRL_3_IO_MODE_1 0x01
157 #define ULTRASONIC5_DEV_CTRL_3_IO_MODE_2 0x02
158 #define ULTRASONIC5_DEV_CTRL_3_IO_MODE_3 0x03
159 #define ULTRASONIC5_DEV_CTRL_3_IO_MODE_MASK 0x03
160 #define ULTRASONIC5_DEV_CTRL_3_RESET 0x00
166 #define ULTRASONIC5_VDRV_CTRL_DIS_VDRV_REG_LSTN 0x40
167 #define ULTRASONIC5_VDRV_CTRL_VDRV_HI_Z 0x20
168 #define ULTRASONIC5_VDRV_CTRL_VDRV_CURR_LVL_20MA 0x10
169 #define ULTRASONIC5_VDRV_CTRL_VDRV_VOLT_LVL_5V 0x00
170 #define ULTRASONIC5_VDRV_CTRL_VDRV_VOLT_LVL_MASK 0x0F
171 #define ULTRASONIC5_VDRV_CTRL_RESET 0x20
177 #define ULTRASONIC5_ECHO_INT_CONFIG_CMP_EN 0x10
178 #define ULTRASONIC5_ECHO_INT_CONFIG_THR_SEL_MASK 0x0F
179 #define ULTRASONIC5_ECHO_INT_CONFIG_RESET 0x07
185 #define ULTRASONIC5_ZC_CONFIG_CMP_EN 0x80
186 #define ULTRASONIC5_ZC_CONFIG_EN_ECHO_INT 0x40
187 #define ULTRASONIC5_ZC_CONFIG_CMP_IN_SEL 0x20
188 #define ULTRASONIC5_ZC_CONFIG_CMP_STG_SEL_MASK 0x18
189 #define ULTRASONIC5_ZC_CONFIG_CMP_HYST_MASK 0x07
190 #define ULTRASONIC5_ZC_CONFIG_RESET 0x14
196 #define ULTRASONIC5_BURST_PULSE_HALF_BRG_MODE 0x80
197 #define ULTRASONIC5_BURST_PULSE_PRE_DRIVER_MODE 0x40
198 #define ULTRASONIC5_BURST_PULSE_BURST_PULSE_16 0x0F
199 #define ULTRASONIC5_BURST_PULSE_BURST_PULSE_MASK 0x3F
200 #define ULTRASONIC5_BURST_PULSE_RESET 0x00
206 #define ULTRASONIC5_TOF_CONFIG_SLEEP_MODE_EN 0x80
207 #define ULTRASONIC5_TOF_CONFIG_STDBY_MODE_EN 0x40
208 #define ULTRASONIC5_TOF_CONFIG_VDRV_TRIGGER 0x02
209 #define ULTRASONIC5_TOF_CONFIG_CMD_TRIGGER 0x01
210 #define ULTRASONIC5_TOF_CONFIG_RESET 0x00
216 #define ULTRASONIC5_DEF_FREQ 40000
217 #define ULTRASONIC5_DEF_DYTY 0.5f
223 #define ULTRASONIC5_DEVICE_ID 0xB9
229 #define ULTRASONIC5_ODD_PARITY 0x01
239 #define ULTRASONIC5_SET_DATA_SAMPLE_EDGE SET_SPI_DATA_SAMPLE_EDGE
240 #define ULTRASONIC5_SET_DATA_SAMPLE_MIDDLE SET_SPI_DATA_SAMPLE_MIDDLE
258 #define ULTRASONIC5_MAP_MIKROBUS( cfg, mikrobus ) \
259 cfg.miso = MIKROBUS( mikrobus, MIKROBUS_MISO ); \
260 cfg.mosi = MIKROBUS( mikrobus, MIKROBUS_MOSI ); \
261 cfg.sck = MIKROBUS( mikrobus, MIKROBUS_SCK ); \
262 cfg.cs = MIKROBUS( mikrobus, MIKROBUS_CS ); \
263 cfg.an = MIKROBUS( mikrobus, MIKROBUS_AN ); \
264 cfg.io1 = MIKROBUS( mikrobus, MIKROBUS_RST ); \
265 cfg.io2 = MIKROBUS( mikrobus, MIKROBUS_PWM ); \
266 cfg.out4 = MIKROBUS( mikrobus, MIKROBUS_INT )
518 #endif // ULTRASONIC5_H
Ultrasonic 5 Click configuration object.
Definition: ultrasonic5.h:299
uint8_t ultrasonic5_get_out4_pin(ultrasonic5_t *ctx)
Ultrasonic 5 get out4 pin function.
pin_name_t mosi
Definition: ultrasonic5.h:302
digital_in_t out4
Definition: ultrasonic5.h:281
err_t ultrasonic5_read_an_pin_value(ultrasonic5_t *ctx, uint16_t *data_out)
Ultrasonic 5 read AN pin value function.
pin_name_t an
Definition: ultrasonic5.h:305
This file contains SPI specific macros, functions, etc.
err_t ultrasonic5_pwm_start(ultrasonic5_t *ctx)
Ultrasonic 5 start PWM module.
@ ULTRASONIC5_ERROR
Definition: ultrasonic5.h:330
@ ULTRASONIC5_OK
Definition: ultrasonic5.h:329
err_t ultrasonic5_default_cfg(ultrasonic5_t *ctx)
Ultrasonic 5 default configuration function.
err_t ultrasonic5_write_register(ultrasonic5_t *ctx, uint8_t reg, uint8_t data_in)
Ultrasonic 5 data writing function.
pwm_t pwm
Definition: ultrasonic5.h:286
float vref
Definition: ultrasonic5.h:317
err_t ultrasonic5_read_register(ultrasonic5_t *ctx, uint8_t reg, uint8_t *data_out)
Ultrasonic 5 data reading function.
analog_in_resolution_t resolution
Definition: ultrasonic5.h:316
spi_master_t spi
Definition: ultrasonic5.h:284
pin_name_t io1
Definition: ultrasonic5.h:309
err_t ultrasonic5_init(ultrasonic5_t *ctx, ultrasonic5_cfg_t *cfg)
Ultrasonic 5 initialization function.
pin_name_t miso
Definition: ultrasonic5.h:301
err_t ultrasonic5_pwm_stop(ultrasonic5_t *ctx)
Ultrasonic 5 stop PWM module.
err_t ultrasonic5_read_an_pin_voltage(ultrasonic5_t *ctx, float *data_out)
Ultrasonic 5 read AN pin voltage level function.
pin_name_t chip_select
Definition: ultrasonic5.h:290
uint32_t dev_pwm_freq
Definition: ultrasonic5.h:319
pin_name_t io2
Definition: ultrasonic5.h:306
uint32_t spi_speed
Definition: ultrasonic5.h:312
Ultrasonic 5 Click context object.
Definition: ultrasonic5.h:276
uint32_t pwm_freq
Definition: ultrasonic5.h:289
void ultrasonic5_cfg_setup(ultrasonic5_cfg_t *cfg)
Ultrasonic 5 configuration object setup function.
pin_name_t cs
Definition: ultrasonic5.h:304
pin_name_t out4
Definition: ultrasonic5.h:310
digital_out_t io1
Definition: ultrasonic5.h:278
analog_in_t adc
Definition: ultrasonic5.h:285
void ultrasonic5_clear_io1_pin(ultrasonic5_t *ctx)
Ultrasonic 5 clear io1 pin function.
void ultrasonic5_set_io1_pin(ultrasonic5_t *ctx)
Ultrasonic 5 set io1 pin function.
spi_master_chip_select_polarity_t cs_polarity
Definition: ultrasonic5.h:314
err_t ultrasonic5_check_communication(ultrasonic5_t *ctx)
Ultrasonic 5 check communication function.
pin_name_t sck
Definition: ultrasonic5.h:303
spi_master_mode_t spi_mode
Definition: ultrasonic5.h:313
ultrasonic5_return_value_t
Ultrasonic 5 Click return value data.
Definition: ultrasonic5.h:328
err_t ultrasonic5_set_duty_cycle(ultrasonic5_t *ctx, float duty_cycle)
Ultrasonic 5 sets PWM duty cycle.