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39 #ifdef PREINIT_SUPPORTED
43 #ifdef MikroCCoreVersion
44 #if MikroCCoreVersion >= 1
49 #include "drv_digital_out.h"
50 #include "drv_digital_in.h"
51 #include "drv_spi_master.h"
53 #include "drv_analog_in.h"
76 #define ULTRASONIC5_REG_BPF_CONFIG_1 0x10
77 #define ULTRASONIC5_REG_BPF_CONFIG_2 0x11
78 #define ULTRASONIC5_REG_DEV_CTRL_1 0x12
79 #define ULTRASONIC5_REG_DEV_CTRL_2 0x13
80 #define ULTRASONIC5_REG_DEV_CTRL_3 0x14
81 #define ULTRASONIC5_REG_VDRV_CTRL 0x16
82 #define ULTRASONIC5_REG_ECHO_INT_CONFIG 0x17
83 #define ULTRASONIC5_REG_ZC_CONFIG 0x18
84 #define ULTRASONIC5_REG_BURST_PULSE 0x1A
85 #define ULTRASONIC5_REG_TOF_CONFIG 0x1B
86 #define ULTRASONIC5_REG_DEV_STAT 0x1C
87 #define ULTRASONIC5_REG_DEVICE_ID 0x1D
88 #define ULTRASONIC5_REG_REV_ID 0x1E
106 #define ULTRASONIC5_BPF_CONFIG_1_FC_TRIM_FRC 0x80
107 #define ULTRASONIC5_BPF_CONFIG_1_BYPASS 0x40
108 #define ULTRASONIC5_BPF_CONFIG_1_HPF_FREQ_MASK 0x3F
109 #define ULTRASONIC5_BPF_CONFIG_1_RESET 0x00
115 #define ULTRASONIC5_BPF_CONFIG_2_Q_SEL_4 0x00
116 #define ULTRASONIC5_BPF_CONFIG_2_Q_SEL_5 0x10
117 #define ULTRASONIC5_BPF_CONFIG_2_Q_SEL_2 0x20
118 #define ULTRASONIC5_BPF_CONFIG_2_Q_SEL_3 0x30
119 #define ULTRASONIC5_BPF_CONFIG_2_Q_SEL_MASK 0x30
120 #define ULTRASONIC5_BPF_CONFIG_2_FC_TRIM_MASK 0x0F
121 #define ULTRASONIC5_BPF_CONFIG_2_RESET 0x00
127 #define ULTRASONIC5_DEV_CTRL_1_LOGAMP_FRC 0x80
128 #define ULTRASONIC5_DEV_CTRL_1_LOGAMP_SLP_ADJ_MASK 0x70
129 #define ULTRASONIC5_DEV_CTRL_1_LOGAMP_INT_ADJ_MASK 0x0F
130 #define ULTRASONIC5_DEV_CTRL_1_RESET 0x00
136 #define ULTRASONIC5_DEV_CTRL_2_LOGAMP_DIS_FIRST 0x80
137 #define ULTRASONIC5_DEV_CTRL_2_LOGAMP_DIS_LAST 0x40
138 #define ULTRASONIC5_DEV_CTRL_2_VOUT_SCALE_SEL_5V 0x04
139 #define ULTRASONIC5_DEV_CTRL_2_LNA_GAIN_15V 0x00
140 #define ULTRASONIC5_DEV_CTRL_2_LNA_GAIN_10V 0x01
141 #define ULTRASONIC5_DEV_CTRL_2_LNA_GAIN_20V 0x02
142 #define ULTRASONIC5_DEV_CTRL_2_LNA_GAIN_12_5V 0x03
143 #define ULTRASONIC5_DEV_CTRL_2_LNA_GAIN_MASK 0x03
144 #define ULTRASONIC5_DEV_CTRL_2_RESET 0x00
150 #define ULTRASONIC5_DEV_CTRL_3_DRV_PLS_FLT_DT_64US 0x00
151 #define ULTRASONIC5_DEV_CTRL_3_DRV_PLS_FLT_DT_48US 0x04
152 #define ULTRASONIC5_DEV_CTRL_3_DRV_PLS_FLT_DT_32US 0x08
153 #define ULTRASONIC5_DEV_CTRL_3_DRV_PLS_FLT_DT_24US 0x0C
154 #define ULTRASONIC5_DEV_CTRL_3_DRV_PLS_FLT_DT_16US 0x10
155 #define ULTRASONIC5_DEV_CTRL_3_DRV_PLS_FLT_DT_8US 0x14
156 #define ULTRASONIC5_DEV_CTRL_3_DRV_PLS_FLT_DT_4US 0x18
157 #define ULTRASONIC5_DEV_CTRL_3_DRV_PLS_FLT_DT_DIS 0x1C
158 #define ULTRASONIC5_DEV_CTRL_3_DRV_PLS_FLT_DT_MASK 0x1C
159 #define ULTRASONIC5_DEV_CTRL_3_IO_MODE_0 0x00
160 #define ULTRASONIC5_DEV_CTRL_3_IO_MODE_1 0x01
161 #define ULTRASONIC5_DEV_CTRL_3_IO_MODE_2 0x02
162 #define ULTRASONIC5_DEV_CTRL_3_IO_MODE_3 0x03
163 #define ULTRASONIC5_DEV_CTRL_3_IO_MODE_MASK 0x03
164 #define ULTRASONIC5_DEV_CTRL_3_RESET 0x00
170 #define ULTRASONIC5_VDRV_CTRL_DIS_VDRV_REG_LSTN 0x40
171 #define ULTRASONIC5_VDRV_CTRL_VDRV_HI_Z 0x20
172 #define ULTRASONIC5_VDRV_CTRL_VDRV_CURR_LVL_20MA 0x10
173 #define ULTRASONIC5_VDRV_CTRL_VDRV_VOLT_LVL_5V 0x00
174 #define ULTRASONIC5_VDRV_CTRL_VDRV_VOLT_LVL_MASK 0x0F
175 #define ULTRASONIC5_VDRV_CTRL_RESET 0x20
181 #define ULTRASONIC5_ECHO_INT_CONFIG_CMP_EN 0x10
182 #define ULTRASONIC5_ECHO_INT_CONFIG_THR_SEL_MASK 0x0F
183 #define ULTRASONIC5_ECHO_INT_CONFIG_RESET 0x07
189 #define ULTRASONIC5_ZC_CONFIG_CMP_EN 0x80
190 #define ULTRASONIC5_ZC_CONFIG_EN_ECHO_INT 0x40
191 #define ULTRASONIC5_ZC_CONFIG_CMP_IN_SEL 0x20
192 #define ULTRASONIC5_ZC_CONFIG_CMP_STG_SEL_MASK 0x18
193 #define ULTRASONIC5_ZC_CONFIG_CMP_HYST_MASK 0x07
194 #define ULTRASONIC5_ZC_CONFIG_RESET 0x14
200 #define ULTRASONIC5_BURST_PULSE_HALF_BRG_MODE 0x80
201 #define ULTRASONIC5_BURST_PULSE_PRE_DRIVER_MODE 0x40
202 #define ULTRASONIC5_BURST_PULSE_BURST_PULSE_16 0x0F
203 #define ULTRASONIC5_BURST_PULSE_BURST_PULSE_MASK 0x3F
204 #define ULTRASONIC5_BURST_PULSE_RESET 0x00
210 #define ULTRASONIC5_TOF_CONFIG_SLEEP_MODE_EN 0x80
211 #define ULTRASONIC5_TOF_CONFIG_STDBY_MODE_EN 0x40
212 #define ULTRASONIC5_TOF_CONFIG_VDRV_TRIGGER 0x02
213 #define ULTRASONIC5_TOF_CONFIG_CMD_TRIGGER 0x01
214 #define ULTRASONIC5_TOF_CONFIG_RESET 0x00
220 #define ULTRASONIC5_DEF_FREQ 40000
221 #define ULTRASONIC5_DEF_DYTY 0.5f
227 #define ULTRASONIC5_DEVICE_ID 0xB9
233 #define ULTRASONIC5_ODD_PARITY 0x01
243 #define ULTRASONIC5_SET_DATA_SAMPLE_EDGE SET_SPI_DATA_SAMPLE_EDGE
244 #define ULTRASONIC5_SET_DATA_SAMPLE_MIDDLE SET_SPI_DATA_SAMPLE_MIDDLE
262 #define ULTRASONIC5_MAP_MIKROBUS( cfg, mikrobus ) \
263 cfg.miso = MIKROBUS( mikrobus, MIKROBUS_MISO ); \
264 cfg.mosi = MIKROBUS( mikrobus, MIKROBUS_MOSI ); \
265 cfg.sck = MIKROBUS( mikrobus, MIKROBUS_SCK ); \
266 cfg.cs = MIKROBUS( mikrobus, MIKROBUS_CS ); \
267 cfg.an = MIKROBUS( mikrobus, MIKROBUS_AN ); \
268 cfg.io1 = MIKROBUS( mikrobus, MIKROBUS_RST ); \
269 cfg.io2 = MIKROBUS( mikrobus, MIKROBUS_PWM ); \
270 cfg.out4 = MIKROBUS( mikrobus, MIKROBUS_INT )
522 #endif // ULTRASONIC5_H
Ultrasonic 5 Click configuration object.
Definition: ultrasonic5.h:303
uint8_t ultrasonic5_get_out4_pin(ultrasonic5_t *ctx)
Ultrasonic 5 get out4 pin function.
pin_name_t mosi
Definition: ultrasonic5.h:306
digital_in_t out4
Definition: ultrasonic5.h:285
err_t ultrasonic5_read_an_pin_value(ultrasonic5_t *ctx, uint16_t *data_out)
Ultrasonic 5 read AN pin value function.
pin_name_t an
Definition: ultrasonic5.h:309
This file contains SPI specific macros, functions, etc.
err_t ultrasonic5_pwm_start(ultrasonic5_t *ctx)
Ultrasonic 5 start PWM module.
@ ULTRASONIC5_ERROR
Definition: ultrasonic5.h:334
@ ULTRASONIC5_OK
Definition: ultrasonic5.h:333
err_t ultrasonic5_default_cfg(ultrasonic5_t *ctx)
Ultrasonic 5 default configuration function.
err_t ultrasonic5_write_register(ultrasonic5_t *ctx, uint8_t reg, uint8_t data_in)
Ultrasonic 5 data writing function.
pwm_t pwm
Definition: ultrasonic5.h:290
float vref
Definition: ultrasonic5.h:321
err_t ultrasonic5_read_register(ultrasonic5_t *ctx, uint8_t reg, uint8_t *data_out)
Ultrasonic 5 data reading function.
analog_in_resolution_t resolution
Definition: ultrasonic5.h:320
spi_master_t spi
Definition: ultrasonic5.h:288
pin_name_t io1
Definition: ultrasonic5.h:313
err_t ultrasonic5_init(ultrasonic5_t *ctx, ultrasonic5_cfg_t *cfg)
Ultrasonic 5 initialization function.
pin_name_t miso
Definition: ultrasonic5.h:305
err_t ultrasonic5_pwm_stop(ultrasonic5_t *ctx)
Ultrasonic 5 stop PWM module.
err_t ultrasonic5_read_an_pin_voltage(ultrasonic5_t *ctx, float *data_out)
Ultrasonic 5 read AN pin voltage level function.
pin_name_t chip_select
Definition: ultrasonic5.h:294
uint32_t dev_pwm_freq
Definition: ultrasonic5.h:323
pin_name_t io2
Definition: ultrasonic5.h:310
uint32_t spi_speed
Definition: ultrasonic5.h:316
Ultrasonic 5 Click context object.
Definition: ultrasonic5.h:280
uint32_t pwm_freq
Definition: ultrasonic5.h:293
void ultrasonic5_cfg_setup(ultrasonic5_cfg_t *cfg)
Ultrasonic 5 configuration object setup function.
pin_name_t cs
Definition: ultrasonic5.h:308
pin_name_t out4
Definition: ultrasonic5.h:314
digital_out_t io1
Definition: ultrasonic5.h:282
analog_in_t adc
Definition: ultrasonic5.h:289
void ultrasonic5_clear_io1_pin(ultrasonic5_t *ctx)
Ultrasonic 5 clear io1 pin function.
void ultrasonic5_set_io1_pin(ultrasonic5_t *ctx)
Ultrasonic 5 set io1 pin function.
spi_master_chip_select_polarity_t cs_polarity
Definition: ultrasonic5.h:318
err_t ultrasonic5_check_communication(ultrasonic5_t *ctx)
Ultrasonic 5 check communication function.
pin_name_t sck
Definition: ultrasonic5.h:307
spi_master_mode_t spi_mode
Definition: ultrasonic5.h:317
ultrasonic5_return_value_t
Ultrasonic 5 Click return value data.
Definition: ultrasonic5.h:332
err_t ultrasonic5_set_duty_cycle(ultrasonic5_t *ctx, float duty_cycle)
Ultrasonic 5 sets PWM duty cycle.