mram4  2.1.0.0
mram4.h
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22 
28 #ifndef MRAM4_H
29 #define MRAM4_H
30 
31 #ifdef __cplusplus
32 extern "C"{
33 #endif
34 
35 #include "drv_digital_out.h"
36 #include "drv_digital_in.h"
37 #include "drv_spi_master.h"
38 #include "spi_specifics.h"
39 
60 #define MRAM4_CMD_RESET_ENABLE 0x66
61 #define MRAM4_CMD_RESET_MEMORY 0x99
62 #define MRAM4_CMD_READ_ID 0x9E
63 #define MRAM4_CMD_READ_ID_MIO 0xAF
64 #define MRAM4_CMD_READ 0x03
65 #define MRAM4_CMD_READ_FAST_XIP 0x0B
66 #define MRAM4_CMD_READ_FAST_DUAL_OUTPUT 0x3B
67 #define MRAM4_CMD_READ_FAST_DUAL_IO 0xBB
68 #define MRAM4_CMD_READ_FAST_QUAD_OUTPUT 0x6B
69 #define MRAM4_CMD_READ_FAST_QUAD_IO 0xEB
70 #define MRAM4_CMD_READ_FAST_DTR 0x0D
71 #define MRAM4_CMD_READ_FAST_DUAL_OUTPUT_DTR 0x3D
72 #define MRAM4_CMD_READ_FAST_DUAL_IO_DTR 0xBD
73 #define MRAM4_CMD_READ_FAST_QUAD_OUTPUT_DTR 0x6D
74 #define MRAM4_CMD_READ_FAST_QUAD_IO_DTR 0xED
75 #define MRAM4_CMD_READ_WORD_QUAD_IO 0xE7
76 #define MRAM4_CMD_READ_FAST_OCTAL_OUTPUT 0x8B
77 #define MRAM4_CMD_READ_FAST_OCTAL_IO 0xCB
78 #define MRAM4_CMD_READ_FAST_OCTAL_OUTPUT_DTR 0x9D
79 #define MRAM4_CMD_READ_FAST_OCTAL_IO_DTR 0xFD
80 #define MRAM4_CMD_READ_4BYTE_ADDR 0x13
81 #define MRAM4_CMD_READ_FAST_4BYTE_ADDR 0x0C
82 #define MRAM4_CMD_READ_FAST_DUAL_OUTPUT_4BYTE_ADDR 0x3C
83 #define MRAM4_CMD_READ_FAST_DUAL_IO_4BYTE_ADDR 0xBC
84 #define MRAM4_CMD_READ_FAST_QUAD_OUTPUT_4BYTE_ADDR 0x6C
85 #define MRAM4_CMD_READ_FAST_QUAD_IO_4BYTE_ADDR 0xEC
86 #define MRAM4_CMD_READ_FAST_DTR_4BYTE_ADDR 0x0E
87 #define MRAM4_CMD_READ_FAST_DUAL_IO_DTR_4BYTE_ADDR 0xBE
88 #define MRAM4_CMD_READ_FAST_QUAD_IO_DTR_4BYTE_ADDR 0xEE
89 #define MRAM4_CMD_READ_FAST_OCTAL_OUTPUT_4BYTE_ADDR 0x7C
90 #define MRAM4_CMD_READ_FAST_OCTAL_IO_4BYTE_ADDR 0xCC
91 #define MRAM4_CMD_WRITE_ENABLE 0x06
92 #define MRAM4_CMD_WRITE_DISABLE 0x04
93 #define MRAM4_CMD_READ_STATUS_REG 0x05
94 #define MRAM4_CMD_READ_FLAG_STATUS_REG 0x70
95 #define MRAM4_CMD_READ_NVOL_CFG_REG 0xB5
96 #define MRAM4_CMD_READ_VOL_CFG_REG 0x85
97 #define MRAM4_CMD_READ_GENERAL_PURPOSE_READ_REG 0x96
98 #define MRAM4_CMD_WRITE_STATUS_REG 0x01
99 #define MRAM4_CMD_WRITE_NVOL_CFG_REG 0xB1
100 #define MRAM4_CMD_WRITE_VOL_CFG_REG 0x81
101 #define MRAM4_CMD_CLEAR_FLAG_STATUS_REG 0x50
102 #define MRAM4_CMD_WRITE_PR_PAGE 0x02
103 #define MRAM4_CMD_WRITE_PR_FAST_DUAL_INPUT 0xA2
104 #define MRAM4_CMD_WRITE_PR_FAST_DUAL_INPUT_EXT 0xD2
105 #define MRAM4_CMD_WRITE_PR_FAST_QUAD_INPUT 0x32
106 #define MRAM4_CMD_WRITE_PR_FAST_QUAD_INPUT_EXT 0x38
107 #define MRAM4_CMD_WRITE_PR_FAST_OCTAL_INPUT 0x82
108 #define MRAM4_CMD_WRITE_PR_FAST_OCTAL_INPUT_EXT 0xC2
109 #define MRAM4_CMD_WRITE_PR_4BYTE_ADDRESS 0x12
110 #define MRAM4_CMD_WRITE_PR_FAST_QUAD_INPUT_4BYTE 0x34
111 #define MRAM4_CMD_WRITE_PR_FAST_QUAD_INPUT_EXT_4BYTE 0x3E
112 #define MRAM4_CMD_WRITE_PR_FAST_OCTAL_INPUT_4BYTE 0x84
113 #define MRAM4_CMD_WRITE_FAST_OCTAL_INPUT_EXT_4BYTE 0x8E
114 #define MRAM4_CMD_ERASE_32KB 0x52
115 #define MRAM4_CMD_ERASE_4KB 0x20
116 #define MRAM4_CMD_ERASE_SECTOR 0xD8
117 #define MRAM4_CMD_ERASE_BULK_CHIP 0xC7
118 #define MRAM4_CMD_ERASE_CHIP 0x60
119 #define MRAM4_CMD_ERASE_SECTOR_4BYTE_ADDRESS 0xDC
120 #define MRAM4_CMD_ERASE_4KB_4_BYTE_ADDRESS 0x21
121 #define MRAM4_CMD_ERASE_32KB_4BYTE_ADDRESS 0x5C
122 #define MRAM4_CMD_OTP_READ 0x4B
123 #define MRAM4_CMD_OTP_WRITE 0x42
124 #define MRAM4_CMD_4BYTE_ADDRESS_MODE_ENTER 0xB7
125 #define MRAM4_CMD_4BYTE_ADDRESS_MODE_EXIT 0xE9
126 #define MRAM4_CMD_DEEP_POWER_DOWN_ENTER 0xB9
127 #define MRAM4_CMD_DEEP_POWER_DOWN_EXIT 0xAB
128 #define MRAM4_CMD_INTERFACE_ACTIVATION_CRC 0x9B
129 #define MRAM4_CMD_TDP_WRITE 0xF0
130 #define MRAM4_CMD_TDP_READ 0xF1
131 #define MRAM4_CMD_TDP_READ_DTR 0xF2
132  // mram4_cmd
134 
149 #define MRAM4_MEMORY_ADDRESS_MIN 0x000000ul
150 #define MRAM4_MEMORY_ADDRESS_MAX 0x3FFFFFul
151 #define MRAM4_PAGE_SIZE 256
152 
157 #define MRAM4_WRITE_PROTECT_ENABLE 0
158 #define MRAM4_WRITE_PROTECT_DISABLE 1
159 #define MRAM4_HOLD_ENABLE 0
160 #define MRAM4_HOLD_DISABLE 1
161 
166 #define MRAM4_STATUS_WP_BIT_MASK 0x80
167 #define MRAM4_STATUS_BP3_BIT_MASK 0x40
168 #define MRAM4_STATUS_TOP_BOTTOM_BIT_MASK 0x20
169 #define MRAM4_STATUS_BP2_BIT_MASK 0x10
170 #define MRAM4_STATUS_BP1_BIT_MASK 0x08
171 #define MRAM4_STATUS_BP0_BIT_MASK 0x04
172 #define MRAM4_STATUS_WEL_BIT_MASK 0x02
173 #define MRAM4_STATUS_WIP_BIT_MASK 0x01
174 #define MRAM4_STATUS_WEL_SET 0x02
175 #define MRAM4_STATUS_WEL_CLR 0x00
176 
185 #define MRAM4_SET_DATA_SAMPLE_EDGE SET_SPI_DATA_SAMPLE_EDGE
186 #define MRAM4_SET_DATA_SAMPLE_MIDDLE SET_SPI_DATA_SAMPLE_MIDDLE
187  // mram4_set
189 
204 #define MRAM4_MAP_MIKROBUS( cfg, mikrobus ) \
205  cfg.miso = MIKROBUS( mikrobus, MIKROBUS_MISO ); \
206  cfg.mosi = MIKROBUS( mikrobus, MIKROBUS_MOSI ); \
207  cfg.sck = MIKROBUS( mikrobus, MIKROBUS_SCK ); \
208  cfg.cs = MIKROBUS( mikrobus, MIKROBUS_CS ); \
209  cfg.wp = MIKROBUS( mikrobus, MIKROBUS_PWM ); \
210  cfg.hld = MIKROBUS( mikrobus, MIKROBUS_INT )
211  // mram4_map // mram4
214 
219 typedef struct
220 {
221  // Output pins
222  digital_out_t wp;
223  digital_out_t hld;
225  // Modules
226  spi_master_t spi;
228  pin_name_t chip_select;
230 } mram4_t;
231 
236 typedef struct
237 {
238  // Communication gpio pins
239  pin_name_t miso;
240  pin_name_t mosi;
241  pin_name_t sck;
242  pin_name_t cs;
244  // Additional gpio pins
245  pin_name_t wp;
246  pin_name_t hld;
248  // static variable
249  uint32_t spi_speed;
250  spi_master_mode_t spi_mode;
251  spi_master_chip_select_polarity_t cs_polarity;
253 } mram4_cfg_t;
254 
259 typedef enum
260 {
261  MRAM4_OK = 0,
262  MRAM4_ERROR = -1
263 
265 
282 
296 err_t mram4_init ( mram4_t *ctx, mram4_cfg_t *cfg );
297 
310 err_t mram4_default_cfg ( mram4_t *ctx );
311 
326 err_t mram4_generic_write ( mram4_t *ctx, uint8_t reg, uint8_t *data_in, uint8_t len );
327 
342 err_t mram4_generic_read ( mram4_t *ctx, uint8_t reg, uint8_t *data_out, uint8_t len );
343 
361 err_t mram4_write_cmd_addr_data ( mram4_t *ctx, uint8_t cmd, uint32_t addr, uint8_t *data_in, uint32_t len );
362 
380 err_t mram4_read_cmd_addr_data ( mram4_t *ctx, uint8_t cmd, uint32_t addr, uint8_t *data_out, uint32_t len );
381 
398 err_t mram4_memory_write ( mram4_t *ctx, uint32_t mem_addr, uint8_t *data_in, uint8_t len );
399 
416 err_t mram4_memory_read ( mram4_t *ctx, uint32_t mem_addr, uint8_t *data_out, uint8_t len );
417 
431 
445 err_t mram4_set_command ( mram4_t *ctx, uint8_t cmd );
446 
461 
476 
492 err_t mram4_block_erase ( mram4_t *ctx, uint8_t cmd_block_erase, uint32_t mem_addr );
493 
506 err_t mram4_chip_erase ( mram4_t *ctx );
507 
522 err_t mram4_set_status ( mram4_t *ctx, uint8_t st_reg, uint8_t status );
523 
537 err_t mram4_get_status ( mram4_t *ctx, uint8_t *status );
538 
550 void mram4_hw_write_protect ( mram4_t *ctx, uint8_t en_wp );
551 
563 void mram4_set_hold ( mram4_t *ctx, uint8_t en_hld );
564 
565 #ifdef __cplusplus
566 }
567 #endif
568 #endif // MRAM4_H
569  // mram4
571 
572 // ------------------------------------------------------------------------ END
mram4_read_cmd_addr_data
err_t mram4_read_cmd_addr_data(mram4_t *ctx, uint8_t cmd, uint32_t addr, uint8_t *data_out, uint32_t len)
MRAM 4 read command adress data function.
mram4_set_hold
void mram4_set_hold(mram4_t *ctx, uint8_t en_hld)
MRAM 4 set hold function.
MRAM4_OK
@ MRAM4_OK
Definition: mram4.h:261
mram4_t::hld
digital_out_t hld
Definition: mram4.h:223
spi_specifics.h
This file contains SPI specific macros, functions, etc.
mram4_t::spi
spi_master_t spi
Definition: mram4.h:226
mram4_cfg_t
MRAM 4 Click configuration object.
Definition: mram4.h:237
mram4_cfg_t::mosi
pin_name_t mosi
Definition: mram4.h:240
mram4_hw_write_protect
void mram4_hw_write_protect(mram4_t *ctx, uint8_t en_wp)
MRAM 4 hardware write protect function.
mram4_init
err_t mram4_init(mram4_t *ctx, mram4_cfg_t *cfg)
MRAM 4 initialization function.
mram4_block_erase
err_t mram4_block_erase(mram4_t *ctx, uint8_t cmd_block_erase, uint32_t mem_addr)
MRAM 4 block erase function.
mram4_memory_read
err_t mram4_memory_read(mram4_t *ctx, uint32_t mem_addr, uint8_t *data_out, uint8_t len)
MRAM 4 memory read function.
mram4_set_command
err_t mram4_set_command(mram4_t *ctx, uint8_t cmd)
MRAM 4 set the command function.
mram4_cfg_t::spi_mode
spi_master_mode_t spi_mode
Definition: mram4.h:250
mram4_cfg_t::cs_polarity
spi_master_chip_select_polarity_t cs_polarity
Definition: mram4.h:251
mram4_generic_read
err_t mram4_generic_read(mram4_t *ctx, uint8_t reg, uint8_t *data_out, uint8_t len)
MRAM 4 data reading function.
mram4_memory_write
err_t mram4_memory_write(mram4_t *ctx, uint32_t mem_addr, uint8_t *data_in, uint8_t len)
MRAM 4 memory write function.
mram4_get_status
err_t mram4_get_status(mram4_t *ctx, uint8_t *status)
MRAM 4 get the status function.
mram4_cfg_t::hld
pin_name_t hld
Definition: mram4.h:246
mram4_set_status
err_t mram4_set_status(mram4_t *ctx, uint8_t st_reg, uint8_t status)
MRAM 4 set status function.
mram4_t
MRAM 4 Click context object.
Definition: mram4.h:220
mram4_cfg_t::cs
pin_name_t cs
Definition: mram4.h:242
mram4_generic_write
err_t mram4_generic_write(mram4_t *ctx, uint8_t reg, uint8_t *data_in, uint8_t len)
MRAM 4 data writing function.
mram4_cfg_t::wp
pin_name_t wp
Definition: mram4.h:245
mram4_write_cmd_addr_data
err_t mram4_write_cmd_addr_data(mram4_t *ctx, uint8_t cmd, uint32_t addr, uint8_t *data_in, uint32_t len)
MRAM 4 write command adress data function.
mram4_cfg_setup
void mram4_cfg_setup(mram4_cfg_t *cfg)
MRAM 4 configuration object setup function.
mram4_write_disable
err_t mram4_write_disable(mram4_t *ctx)
MRAM 4 write disable function.
mram4_t::chip_select
pin_name_t chip_select
Definition: mram4.h:228
mram4_t::wp
digital_out_t wp
Definition: mram4.h:222
mram4_write_enable
err_t mram4_write_enable(mram4_t *ctx)
MRAM 4 write enable function.
mram4_default_cfg
err_t mram4_default_cfg(mram4_t *ctx)
MRAM 4 default configuration function.
mram4_memory_reset
err_t mram4_memory_reset(mram4_t *ctx)
MRAM 4 memory reset function.
mram4_cfg_t::sck
pin_name_t sck
Definition: mram4.h:241
MRAM4_ERROR
@ MRAM4_ERROR
Definition: mram4.h:262
mram4_cfg_t::miso
pin_name_t miso
Definition: mram4.h:239
mram4_cfg_t::spi_speed
uint32_t spi_speed
Definition: mram4.h:249
mram4_return_value_t
mram4_return_value_t
MRAM 4 Click return value data.
Definition: mram4.h:260
mram4_chip_erase
err_t mram4_chip_erase(mram4_t *ctx)
MRAM 4 chip erase function.