c3dhall4  2.1.0.0
c3dhall4.h
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22 
28 #ifndef C3DHALL4_H
29 #define C3DHALL4_H
30 
31 #ifdef __cplusplus
32 extern "C"{
33 #endif
34 
39 #ifdef PREINIT_SUPPORTED
40 #include "preinit.h"
41 #endif
42 
43 #ifdef MikroCCoreVersion
44  #if MikroCCoreVersion >= 1
45  #include "delays.h"
46  #endif
47 #endif
48 
49 #include "drv_digital_out.h"
50 #include "drv_digital_in.h"
51 #include "drv_spi_master.h"
52 #include "spi_specifics.h"
53 #include "drv_analog_in.h"
54 
75 #define C3DHALL4_REG_0 0x00
76 #define C3DHALL4_REG_1 0x01
77 #define C3DHALL4_REG_2 0x02
78 #define C3DHALL4_REG_3 0x03
79 #define C3DHALL4_REG_4 0x04
80 #define C3DHALL4_REG_5 0x05
81 #define C3DHALL4_REG_6 0x06
82 #define C3DHALL4_REG_7 0x07
83 #define C3DHALL4_REG_PWM_CTRL 0x08
84 #define C3DHALL4_REG_CHANNEL_CTRL 0x09
85 #define C3DHALL4_REG_OSC_TRIM 0x0A
86 #define C3DHALL4_REG_THRES_X 0x0B
87 #define C3DHALL4_REG_THRES_Z 0x0C
88 #define C3DHALL4_REG_THRES_Y 0x0D
89 #define C3DHALL4_REG_G_CTRL_X 0x0E
90 #define C3DHALL4_REG_G_CTRL_Z 0x0F
91 #define C3DHALL4_REG_G_CTRL_Y 0x10
92 #define C3DHALL4_REG_DAC_X 0x11
93 #define C3DHALL4_REG_DAC_Z 0x12
94 #define C3DHALL4_REG_DAC_Y 0x13
95 #define C3DHALL4_REG_SENS_X 0x14
96 #define C3DHALL4_REG_SENS_Z 0x15
97 #define C3DHALL4_REG_SENS_Y 0x16
98 #define C3DHALL4_REG_SENS_TC_X 0x17
99 #define C3DHALL4_REG_SENS_TC_Z 0x18
100 #define C3DHALL4_REG_SENS_TC_Y 0x19
101 #define C3DHALL4_REG_OFFSET_X 0x1A
102 #define C3DHALL4_REG_OFFSET_Z 0x1B
103 #define C3DHALL4_REG_OFFSET_Y 0x1C
104 #define C3DHALL4_REG_OFFSET_TC_X 0x1D
105 #define C3DHALL4_REG_OFFSET_TC_Z 0x1E
106 #define C3DHALL4_REG_OFFSET_TC_Y 0x1F
107 #define C3DHALL4_REG_STATUS 0x3F
108 #define C3DHALL4_REG_ADC_DATAXL 0x40
109 #define C3DHALL4_REG_ADC_DATAXH 0x41
110 #define C3DHALL4_REG_ADC_DATAZL 0x42
111 #define C3DHALL4_REG_ADC_DATAZH 0x43
112 #define C3DHALL4_REG_ADC_DATAYL 0x44
113 #define C3DHALL4_REG_ADC_DATAYH 0x45
114 #define C3DHALL4_REG_ADC_DATATL 0x46
115 #define C3DHALL4_REG_ADC_DATATH 0x47
116 
121 #define C3DHALL4_EREG_0 0x00
122 #define C3DHALL4_EREG_1 0x01
123 #define C3DHALL4_EREG_2 0x02
124 #define C3DHALL4_EREG_3 0x03
125 #define C3DHALL4_EREG_4 0x04
126 #define C3DHALL4_EREG_5 0x05
127 #define C3DHALL4_EREG_6 0x06
128 #define C3DHALL4_EREG_7 0x07
129 #define C3DHALL4_EREG_PWM_CTRL 0x08
130 #define C3DHALL4_EREG_CHANNEL_CTRL 0x09
131 #define C3DHALL4_EREG_OSC_TRIM 0x0A
132 #define C3DHALL4_EREG_THRES_Y 0x0B
133 #define C3DHALL4_EREG_THRES_X 0x0C
134 #define C3DHALL4_EREG_THRES_Z 0x0D
135 #define C3DHALL4_EREG_GAIN_SEL 0x0E
136 #define C3DHALL4_EREG_DAC_Y_G0 0x40
137 #define C3DHALL4_EREG_DAC_X_G0 0x41
138 #define C3DHALL4_EREG_DAC_Z_G0 0x42
139 #define C3DHALL4_EREG_SENS_Y_G0 0x43
140 #define C3DHALL4_EREG_SENS_X_G0 0x44
141 #define C3DHALL4_EREG_SENS_Z_G0 0x45
142 #define C3DHALL4_EREG_SENS_TC_Y_G0 0x46
143 #define C3DHALL4_EREG_SENS_TC_X_G0 0x47
144 #define C3DHALL4_EREG_SENS_TC_Z_G0 0x48
145 #define C3DHALL4_EREG_OFFSET_Y_G0 0x49
146 #define C3DHALL4_EREG_OFFSET_X_G0 0x4A
147 #define C3DHALL4_EREG_OFFSET_Z_G0 0x4B
148 #define C3DHALL4_EREG_OFFSET_TC_Y_G0 0x4C
149 #define C3DHALL4_EREG_OFFSET_TC_X_G0 0x4D
150 #define C3DHALL4_EREG_OFFSET_TC_Z_G0 0x4E
151 #define C3DHALL4_EREG_DAC_Y_G1 0x50
152 #define C3DHALL4_EREG_DAC_X_G1 0x51
153 #define C3DHALL4_EREG_DAC_Z_G1 0x52
154 #define C3DHALL4_EREG_SENS_Y_G1 0x53
155 #define C3DHALL4_EREG_SENS_X_G1 0x54
156 #define C3DHALL4_EREG_SENS_Z_G1 0x55
157 #define C3DHALL4_EREG_SENS_TC_Y_G1 0x56
158 #define C3DHALL4_EREG_SENS_TC_X_G1 0x57
159 #define C3DHALL4_EREG_SENS_TC_Z_G1 0x58
160 #define C3DHALL4_EREG_OFFSET_Y_G1 0x59
161 #define C3DHALL4_EREG_OFFSET_X_G1 0x5A
162 #define C3DHALL4_EREG_OFFSET_Z_G1 0x5B
163 #define C3DHALL4_EREG_OFFSET_TC_Y_G1 0x5C
164 #define C3DHALL4_EREG_OFFSET_TC_X_G1 0x5D
165 #define C3DHALL4_EREG_OFFSET_TC_Z_G1 0x5E
166 #define C3DHALL4_EREG_DAC_Y_G2 0x60
167 #define C3DHALL4_EREG_DAC_X_G2 0x61
168 #define C3DHALL4_EREG_DAC_Z_G2 0x62
169 #define C3DHALL4_EREG_SENS_Y_G2 0x63
170 #define C3DHALL4_EREG_SENS_X_G2 0x64
171 #define C3DHALL4_EREG_SENS_Z_G2 0x65
172 #define C3DHALL4_EREG_SENS_TC_Y_G2 0x66
173 #define C3DHALL4_EREG_SENS_TC_X_G2 0x67
174 #define C3DHALL4_EREG_SENS_TC_Z_G2 0x68
175 #define C3DHALL4_EREG_OFFSET_Y_G2 0x69
176 #define C3DHALL4_EREG_OFFSET_X_G2 0x6A
177 #define C3DHALL4_EREG_OFFSET_Z_G2 0x6B
178 #define C3DHALL4_EREG_OFFSET_TC_Y_G2 0x6C
179 #define C3DHALL4_EREG_OFFSET_TC_X_G2 0x6D
180 #define C3DHALL4_EREG_OFFSET_TC_Z_G2 0x6E
181 #define C3DHALL4_EREG_DAC_Y_G3 0x70
182 #define C3DHALL4_EREG_DAC_X_G3 0x71
183 #define C3DHALL4_EREG_DAC_Z_G3 0x72
184 #define C3DHALL4_EREG_SENS_Y_G3 0x73
185 #define C3DHALL4_EREG_SENS_X_G3 0x74
186 #define C3DHALL4_EREG_SENS_Z_G3 0x75
187 #define C3DHALL4_EREG_SENS_TC_Y_G3 0x76
188 #define C3DHALL4_EREG_SENS_TC_X_G3 0x77
189 #define C3DHALL4_EREG_SENS_TC_Z_G3 0x78
190 #define C3DHALL4_EREG_OFFSET_Y_G3 0x79
191 #define C3DHALL4_EREG_OFFSET_X_G3 0x7A
192 #define C3DHALL4_EREG_OFFSET_Z_G3 0x7B
193 #define C3DHALL4_EREG_OFFSET_TC_Y_G3 0x7C
194 #define C3DHALL4_EREG_OFFSET_TC_X_G3 0x7D
195 #define C3DHALL4_EREG_OFFSET_TC_Z_G3 0x7E
196 #define C3DHALL4_EREG_KEY 0xFE
197 #define C3DHALL4_EREG_CHECKSUM 0xFF
198  // c3dhall4_reg
200 
215 #define C3DHALL4_CMD_REG_WRITE 0x00
216 #define C3DHALL4_CMD_REG_READ 0x80
217 #define C3DHALL4_CMD_EREG_WRITE 0x01
218 #define C3DHALL4_CMD_EREG_READ 0x81
219 #define C3DHALL4_CMD_SPECIAL_KEY 0xA5
220 
225 #define C3DHALL4_ADC_VREF_3V3 3.3f
226 #define C3DHALL4_ADC_VREF_5V 5.0f
227 
232 #define C3DHALL4_RANGE_20 0x00
233 #define C3DHALL4_RANGE_40 0x01
234 #define C3DHALL4_RANGE_350 0x02
235 #define C3DHALL4_RANGE_3000 0x03
236 #define C3DHALL4_RANGE_MASK 0x03
237 #define C3DHALL4_SENS_RANGE_3000 6.0f
238 #define C3DHALL4_SENS_RANGE_350 60.0f
239 #define C3DHALL4_SENS_RANGE_40 550.0f
240 #define C3DHALL4_SENS_RANGE_20 1000.0f
241 #define C3DHALL4_SENS_TEMPERATURE 168.0f
242 #define C3DHALL4_OFFSET_XYZ 32768
243 #define C3DHALL4_OFFSET_TEMPERATURE 19913
244 
253 #define C3DHALL4_SET_DATA_SAMPLE_EDGE SET_SPI_DATA_SAMPLE_EDGE
254 #define C3DHALL4_SET_DATA_SAMPLE_MIDDLE SET_SPI_DATA_SAMPLE_MIDDLE
255  // c3dhall4_set
257 
272 #define C3DHALL4_MAP_MIKROBUS( cfg, mikrobus ) \
273  cfg.miso = MIKROBUS( mikrobus, MIKROBUS_MISO ); \
274  cfg.mosi = MIKROBUS( mikrobus, MIKROBUS_MOSI ); \
275  cfg.sck = MIKROBUS( mikrobus, MIKROBUS_SCK ); \
276  cfg.cs = MIKROBUS( mikrobus, MIKROBUS_CS ); \
277  cfg.tan = MIKROBUS( mikrobus, MIKROBUS_AN );
278  // c3dhall4_map // c3dhall4
281 
286 typedef struct
287 {
288  spi_master_t spi;
289  analog_in_t adc;
291  pin_name_t chip_select;
293  float x_sens;
294  float y_sens;
295  float z_sens;
297 } c3dhall4_t;
298 
303 typedef struct
304 {
305  pin_name_t miso;
306  pin_name_t mosi;
307  pin_name_t sck;
308  pin_name_t cs;
309  pin_name_t tan;
311  uint32_t spi_speed;
312  spi_master_mode_t spi_mode;
313  spi_master_chip_select_polarity_t cs_polarity;
315  analog_in_resolution_t resolution;
316  float vref;
319 
324 typedef struct
325 {
326  uint8_t status;
327  float x_data;
328  float y_data;
329  float z_data;
330  float chip_temp;
333 
338 typedef enum
339 {
341  C3DHALL4_ERROR = -1
342 
344 
361 
376 
390 
405 err_t c3dhall4_reg_write ( c3dhall4_t *ctx, uint8_t reg, uint8_t *data_in, uint8_t len );
406 
421 err_t c3dhall4_reg_read ( c3dhall4_t *ctx, uint8_t reg, uint8_t *data_out, uint8_t len );
422 
437 err_t c3dhall4_eeprom_write ( c3dhall4_t *ctx, uint8_t address, uint8_t data_in );
438 
451 err_t c3dhall4_eeprom_read ( c3dhall4_t *ctx, uint8_t address, uint8_t *data_out );
452 
465 
477 err_t c3dhall4_read_an_pin_value ( c3dhall4_t *ctx, uint16_t *data_out );
478 
492 err_t c3dhall4_read_an_pin_voltage ( c3dhall4_t *ctx, float *data_out );
493 
508 
509 #ifdef __cplusplus
510 }
511 #endif
512 #endif // C3DHALL4_H
513  // c3dhall4
515 
516 // ------------------------------------------------------------------------ END
c3dhall4_data_t::status
uint8_t status
Definition: c3dhall4.h:326
c3dhall4_init
err_t c3dhall4_init(c3dhall4_t *ctx, c3dhall4_cfg_t *cfg)
3D Hall 4 initialization function.
c3dhall4_cfg_t::sck
pin_name_t sck
Definition: c3dhall4.h:307
c3dhall4_data_t::y_data
float y_data
Definition: c3dhall4.h:328
c3dhall4_reg_write
err_t c3dhall4_reg_write(c3dhall4_t *ctx, uint8_t reg, uint8_t *data_in, uint8_t len)
3D Hall 4 reg write function.
c3dhall4_t::spi
spi_master_t spi
Definition: c3dhall4.h:288
c3dhall4_t::chip_select
pin_name_t chip_select
Definition: c3dhall4.h:291
spi_specifics.h
This file contains SPI specific macros, functions, etc.
c3dhall4_default_cfg
err_t c3dhall4_default_cfg(c3dhall4_t *ctx)
3D Hall 4 default configuration function.
c3dhall4_t
3D Hall 4 Click context object.
Definition: c3dhall4.h:287
c3dhall4_read_an_pin_voltage
err_t c3dhall4_read_an_pin_voltage(c3dhall4_t *ctx, float *data_out)
3D Hall 4 read AN pin voltage level function.
c3dhall4_cfg_t::spi_speed
uint32_t spi_speed
Definition: c3dhall4.h:311
c3dhall4_cfg_t::cs_polarity
spi_master_chip_select_polarity_t cs_polarity
Definition: c3dhall4.h:313
c3dhall4_cfg_t::cs
pin_name_t cs
Definition: c3dhall4.h:308
c3dhall4_cfg_setup
void c3dhall4_cfg_setup(c3dhall4_cfg_t *cfg)
3D Hall 4 configuration object setup function.
c3dhall4_return_value_t
c3dhall4_return_value_t
3D Hall 4 Click return value data.
Definition: c3dhall4.h:339
c3dhall4_data_t::z_data
float z_data
Definition: c3dhall4.h:329
c3dhall4_cfg_t::tan
pin_name_t tan
Definition: c3dhall4.h:309
c3dhall4_eeprom_write
err_t c3dhall4_eeprom_write(c3dhall4_t *ctx, uint8_t address, uint8_t data_in)
3D Hall 4 EEPROM write function.
c3dhall4_t::y_sens
float y_sens
Definition: c3dhall4.h:294
c3dhall4_cfg_t::vref
float vref
Definition: c3dhall4.h:316
c3dhall4_cfg_t::resolution
analog_in_resolution_t resolution
Definition: c3dhall4.h:315
c3dhall4_reg_read
err_t c3dhall4_reg_read(c3dhall4_t *ctx, uint8_t reg, uint8_t *data_out, uint8_t len)
3D Hall 4 reg read function.
c3dhall4_read_an_pin_value
err_t c3dhall4_read_an_pin_value(c3dhall4_t *ctx, uint16_t *data_out)
3D Hall 4 read AN pin value function.
c3dhall4_data_t
3D Hall 4 Click data object.
Definition: c3dhall4.h:325
c3dhall4_t::x_sens
float x_sens
Definition: c3dhall4.h:293
c3dhall4_cfg_t::miso
pin_name_t miso
Definition: c3dhall4.h:305
C3DHALL4_ERROR
@ C3DHALL4_ERROR
Definition: c3dhall4.h:341
c3dhall4_data_t::chip_temp
float chip_temp
Definition: c3dhall4.h:330
c3dhall4_cfg_t
3D Hall 4 Click configuration object.
Definition: c3dhall4.h:304
C3DHALL4_OK
@ C3DHALL4_OK
Definition: c3dhall4.h:340
c3dhall4_data_t::x_data
float x_data
Definition: c3dhall4.h:327
c3dhall4_eeprom_read
err_t c3dhall4_eeprom_read(c3dhall4_t *ctx, uint8_t address, uint8_t *data_out)
3D Hall 4 EEPROM read function.
c3dhall4_cfg_t::spi_mode
spi_master_mode_t spi_mode
Definition: c3dhall4.h:312
c3dhall4_read_data
err_t c3dhall4_read_data(c3dhall4_t *ctx, c3dhall4_data_t *data_out)
3D Hall 4 read data function.
c3dhall4_eeprom_update_cksum
err_t c3dhall4_eeprom_update_cksum(c3dhall4_t *ctx)
3D Hall 4 EEPROM update cksum function.
c3dhall4_t::adc
analog_in_t adc
Definition: c3dhall4.h:289
c3dhall4_cfg_t::mosi
pin_name_t mosi
Definition: c3dhall4.h:306
c3dhall4_t::z_sens
float z_sens
Definition: c3dhall4.h:295