ism5  2.1.0.0
ism5.h
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2 ** Copyright (C) 2020 MikroElektronika d.o.o.
3 ** Contact: https://www.mikroe.com/contact
4 **
5 ** Permission is hereby granted, free of charge, to any person obtaining a copy
6 ** of this software and associated documentation files (the "Software"), to deal
7 ** in the Software without restriction, including without limitation the rights
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9 ** copies of the Software, and to permit persons to whom the Software is
10 ** furnished to do so, subject to the following conditions:
11 ** The above copyright notice and this permission notice shall be
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13 **
14 ** THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
15 ** EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
16 ** OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
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19 ** OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
20 ** USE OR OTHER DEALINGS IN THE SOFTWARE.
21 ****************************************************************************/
22 
28 #ifndef ISM5_H
29 #define ISM5_H
30 
31 #ifdef __cplusplus
32 extern "C"{
33 #endif
34 
35 #include "drv_digital_out.h"
36 #include "drv_digital_in.h"
37 #include "drv_spi_master.h"
38 #include "spi_specifics.h"
39 
60 #define ISM5_CMD_POWER_UP 0x02
61 #define ISM5_CMD_NOP 0x00
62 #define ISM5_CMD_PART_INFO 0x01
63 #define ISM5_CMD_FUNC_INFO 0x10
64 #define ISM5_CMD_SET_PROPERTY 0x11
65 #define ISM5_CMD_GET_PROPERTY 0x12
66 #define ISM5_CMD_GPIO_PIN_CFG 0x13
67 #define ISM5_CMD_FIFO_INFO 0x15
68 #define ISM5_CMD_GET_INT_STATUS 0x20
69 #define ISM5_CMD_REQUEST_DEVICE_STATE 0x33
70 #define ISM5_CMD_CHANGE_STATE 0x34
71 #define ISM5_CMD_OFFLINE_RECAL 0x38
72 #define ISM5_CMD_READ_CMD_BUFF 0x44
73 #define ISM5_CMD_FRR_A_READ 0x50
74 #define ISM5_CMD_FRR_B_READ 0x51
75 #define ISM5_CMD_FRR_C_READ 0x53
76 #define ISM5_CMD_FRR_D_READ 0x57
77 #define ISM5_CMD_IRCAL 0x17
78 #define ISM5_CMD_START_TX 0x31
79 #define ISM5_CMD_TX_HOP 0x37
80 #define ISM5_CMD_WRITE_TX_FIFO 0x66
81 #define ISM5_CMD_PACKET_INFO 0x16
82 #define ISM5_CMD_GET_MODEM_STATUS 0x22
83 #define ISM5_CMD_START_RX 0x32
84 #define ISM5_CMD_RX_HOP 0x36
85 #define ISM5_CMD_READ_RX_FIFO 0x77
86 #define ISM5_CMD_GET_ADC_READING 0x14
87 #define ISM5_CMD_GET_PH_STATUS 0x21
88 #define ISM5_CMD_GET_CHIP_STATUS 0x23
89  // ism5_cmd
91 
106 #define ISM5_CTS_READY_BYTE 0xFF
107 #define ISM5_CTS_READY_TIMEOUT 5000ul
108 
113 #define ISM5_PART_NUMBER 0x4461u
114 
119 #define ISM5_POWER_UP_BOOT_FUNCTIONAL 1
120 #define ISM5_POWER_UP_SELECT_TCXO 1
121 #define ISM5_POWER_UP_TCXO_26MHZ 26000000ul
122 
127 #define ISM5_PROPERTY_GLOBAL_XO_TUNE 0x0000
128 #define ISM5_PROPERTY_GLOBAL_CLK_CFG 0x0001
129 #define ISM5_PROPERTY_GLOBAL_LOW_BATT_THRESH 0x0001
130 #define ISM5_PROPERTY_GLOBAL_CONFIG 0x0003
131 #define ISM5_PROPERTY_GLOBAL_WUT_CONFIG 0x0004
132 #define ISM5_PROPERTY_GLOBAL_WUT_M_15_8 0x0005
133 #define ISM5_PROPERTY_GLOBAL_WUT_M_7_0 0x0006
134 #define ISM5_PROPERTY_GLOBAL_WUT_R 0x0007
135 #define ISM5_PROPERTY_GLOBAL_WUT_LDC 0x0008
136 #define ISM5_PROPERTY_GLOBAL_WUT_CAL 0x0009
137 #define ISM5_PROPERTY_INT_CTL_ENABLE 0x0100
138 #define ISM5_PROPERTY_INT_CTL_PH_ENABLE 0x0101
139 #define ISM5_PROPERTY_INT_CTL_MODEM_ENABLE 0x0102
140 #define ISM5_PROPERTY_INT_CTL_CHIP_ENABLE 0x0103
141 #define ISM5_PROPERTY_FRR_CTL_A_MODE 0x0200
142 #define ISM5_PROPERTY_FRR_CTL_B_MODE 0x0201
143 #define ISM5_PROPERTY_FRR_CTL_C_MODE 0x0202
144 #define ISM5_PROPERTY_FRR_CTL_D_MODE 0x0203
145 #define ISM5_PROPERTY_PREAMBLE_TX_LENGTH 0x1000
146 #define ISM5_PROPERTY_PREAMBLE_CONFIG_STD_1 0x1001
147 #define ISM5_PROPERTY_PREAMBLE_CONFIG_NSTD 0x1002
148 #define ISM5_PROPERTY_PREAMBLE_CONFIG_STD_2 0x1003
149 #define ISM5_PROPERTY_PREAMBLE_CONFIG 0x1004
150 #define ISM5_PROPERTY_PREAMBLE_PATTERN_31_24 0x1005
151 #define ISM5_PROPERTY_PREAMBLE_PATTERN_23_16 0x1006
152 #define ISM5_PROPERTY_PREAMBLE_PATTERN_15_8 0x1007
153 #define ISM5_PROPERTY_PREAMBLE_PATTERN_7_0 0x1008
154 #define ISM5_PROPERTY_PREAMBLE_POSTAMBLE_CONFIG 0x1009
155 #define ISM5_PROPERTY_PREAMBLE_POSTAMBLE_PATTERN_31_24 0x100A
156 #define ISM5_PROPERTY_PREAMBLE_POSTAMBLE_PATTERN_23_16 0x100B
157 #define ISM5_PROPERTY_PREAMBLE_POSTAMBLE_PATTERN_15_8 0x100C
158 #define ISM5_PROPERTY_PREAMBLE_POSTAMBLE_PATTERN_7_0 0x100D
159 #define ISM5_PROPERTY_SYNC_CONFIG 0x1100
160 #define ISM5_PROPERTY_SYNC_BITS_31_24 0x1101
161 #define ISM5_PROPERTY_SYNC_BITS_23_16 0x1102
162 #define ISM5_PROPERTY_SYNC_BITS_15_8 0x1103
163 #define ISM5_PROPERTY_SYNC_BITS_7_0 0x1104
164 #define ISM5_PROPERTY_PKT_CRC_CONFIG 0x1200
165 #define ISM5_PROPERTY_PKT_CONFIG1 0x1206
166 #define ISM5_PROPERTY_PKT_LEN 0x1208
167 #define ISM5_PROPERTY_PKT_LEN_FIELD_SOURCE 0x1209
168 #define ISM5_PROPERTY_PKT_LEN_ADJUST 0x120A
169 #define ISM5_PROPERTY_PKT_TX_THRESHOLD 0x120B
170 #define ISM5_PROPERTY_PKT_RX_THRESHOLD 0x120C
171 #define ISM5_PROPERTY_PKT_FIELD_1_LENGTH_12_8 0x120D
172 #define ISM5_PROPERTY_PKT_FIELD_1_LENGTH_7_0 0x120E
173 #define ISM5_PROPERTY_PKT_FIELD_1_CONFIG 0x120F
174 #define ISM5_PROPERTY_PKT_FIELD_1_CRC_CONFIG 0x1210
175 #define ISM5_PROPERTY_PKT_FIELD_2_LENGTH_12_8 0x1211
176 #define ISM5_PROPERTY_PKT_FIELD_2_LENGTH_7_0 0x1212
177 #define ISM5_PROPERTY_PKT_FIELD_2_CONFIG 0x1213
178 #define ISM5_PROPERTY_PKT_FIELD_2_CRC_CONFIG 0x1214
179 #define ISM5_PROPERTY_PKT_FIELD_3_LENGTH_12_8 0x1215
180 #define ISM5_PROPERTY_PKT_FIELD_3_LENGTH_7_0 0x1216
181 #define ISM5_PROPERTY_PKT_FIELD_3_CONFIG 0x1217
182 #define ISM5_PROPERTY_PKT_FIELD_3_CRC_CONFIG 0x1218
183 #define ISM5_PROPERTY_PKT_FIELD_4_LENGTH_12_8 0x1219
184 #define ISM5_PROPERTY_PKT_FIELD_4_LENGTH_7_0 0x121A
185 #define ISM5_PROPERTY_PKT_FIELD_4_CONFIG 0x121B
186 #define ISM5_PROPERTY_PKT_FIELD_4_CRC_CONFIG 0x121C
187 #define ISM5_PROPERTY_PKT_FIELD_5_LENGTH_12_8 0x121D
188 #define ISM5_PROPERTY_PKT_FIELD_5_LENGTH_7_0 0x121E
189 #define ISM5_PROPERTY_PKT_FIELD_5_CONFIG 0x121F
190 #define ISM5_PROPERTY_PKT_FIELD_5_CRC_CONFIG 0x1220
191 #define ISM5_PROPERTY_PKT_RX_FIELD_1_LENGTH_12_8 0x1221
192 #define ISM5_PROPERTY_PKT_RX_FIELD_1_LENGTH_7_0 0x1222
193 #define ISM5_PROPERTY_PKT_RX_FIELD_1_CONFIG 0x1223
194 #define ISM5_PROPERTY_PKT_RX_FIELD_1_CRC_CONFIG 0x1224
195 #define ISM5_PROPERTY_PKT_RX_FIELD_2_LENGTH_12_8 0x1225
196 #define ISM5_PROPERTY_PKT_RX_FIELD_2_LENGTH_7_0 0x1226
197 #define ISM5_PROPERTY_PKT_RX_FIELD_2_CONFIG 0x1227
198 #define ISM5_PROPERTY_PKT_RX_FIELD_2_CRC_CONFIG 0x1228
199 #define ISM5_PROPERTY_PKT_RX_FIELD_3_LENGTH_12_8 0x1229
200 #define ISM5_PROPERTY_PKT_RX_FIELD_3_LENGTH_7_0 0x122A
201 #define ISM5_PROPERTY_PKT_RX_FIELD_3_CONFIG 0x122B
202 #define ISM5_PROPERTY_PKT_RX_FIELD_3_CRC_CONFIG 0x122C
203 #define ISM5_PROPERTY_PKT_RX_FIELD_4_LENGTH_12_8 0x122D
204 #define ISM5_PROPERTY_PKT_RX_FIELD_4_LENGTH_7_0 0x122E
205 #define ISM5_PROPERTY_PKT_RX_FIELD_4_CONFIG 0x122F
206 #define ISM5_PROPERTY_PKT_RX_FIELD_4_CRC_CONFIG 0x1230
207 #define ISM5_PROPERTY_PKT_RX_FIELD_5_LENGTH_12_8 0x1231
208 #define ISM5_PROPERTY_PKT_RX_FIELD_5_LENGTH_7_0 0x1232
209 #define ISM5_PROPERTY_PKT_RX_FIELD_5_CONFIG 0x1233
210 #define ISM5_PROPERTY_PKT_RX_FIELD_5_CRC_CONFIG 0x1234
211 #define ISM5_PROPERTY_MODEM_MOD_TYPE 0x2000
212 #define ISM5_PROPERTY_MODEM_MAP_CONTROL 0x2001
213 #define ISM5_PROPERTY_MODEM_DATA_RATE_2 0x2003
214 #define ISM5_PROPERTY_MODEM_DATA_RATE_1 0x2004
215 #define ISM5_PROPERTY_MODEM_DATA_RATE_0 0x2005
216 #define ISM5_PROPERTY_MODEM_TX_NCO_MODE_3 0x2006
217 #define ISM5_PROPERTY_MODEM_TX_NCO_MODE_2 0x2007
218 #define ISM5_PROPERTY_MODEM_TX_NCO_MODE_1 0x2008
219 #define ISM5_PROPERTY_MODEM_TX_NCO_MODE_0 0x2009
220 #define ISM5_PROPERTY_MODEM_FREQ_DEV_2 0x200A
221 #define ISM5_PROPERTY_MODEM_FREQ_DEV_1 0x200B
222 #define ISM5_PROPERTY_MODEM_FREQ_DEV_0 0x200C
223 #define ISM5_PROPERTY_MODEM_FREQ_OFFSET_1 0x200D
224 #define ISM5_PROPERTY_MODEM_FREQ_OFFSET_0 0x200E
225 #define ISM5_PROPERTY_MODEM_TX_FILTER_COEFF_8 0x200F
226 #define ISM5_PROPERTY_MODEM_TX_FILTER_COEFF_7 0x2010
227 #define ISM5_PROPERTY_MODEM_TX_FILTER_COEFF_6 0x2011
228 #define ISM5_PROPERTY_MODEM_TX_FILTER_COEFF_5 0x2012
229 #define ISM5_PROPERTY_MODEM_TX_FILTER_COEFF_4 0x2013
230 #define ISM5_PROPERTY_MODEM_TX_FILTER_COEFF_3 0x2014
231 #define ISM5_PROPERTY_MODEM_TX_FILTER_COEFF_2 0x2015
232 #define ISM5_PROPERTY_MODEM_TX_FILTER_COEFF_1 0x2016
233 #define ISM5_PROPERTY_MODEM_TX_FILTER_COEFF_0 0x2017
234 #define ISM5_PROPERTY_MODEM_TX_RAMP_DELAY 0x2018
235 #define ISM5_PROPERTY_MODEM_MDM_CTRL 0x2019
236 #define ISM5_PROPERTY_MODEM_IF_CONTROL 0x201A
237 #define ISM5_PROPERTY_MODEM_IF_FREQ_2 0x201B
238 #define ISM5_PROPERTY_MODEM_IF_FREQ_1 0x201C
239 #define ISM5_PROPERTY_MODEM_IF_FREQ_0 0x201D
240 #define ISM5_PROPERTY_MODEM_DECIMATION_CFG1 0x201E
241 #define ISM5_PROPERTY_MODEM_DECIMATION_CFG0 0x201F
242 #define ISM5_PROPERTY_MODEM_BCR_OSR_1 0x2022
243 #define ISM5_PROPERTY_MODEM_BCR_OSR_0 0x2023
244 #define ISM5_PROPERTY_MODEM_BCR_NCO_OFFSET_2 0x2024
245 #define ISM5_PROPERTY_MODEM_BCR_NCO_OFFSET_1 0x2025
246 #define ISM5_PROPERTY_MODEM_BCR_NCO_OFFSET_0 0x2026
247 #define ISM5_PROPERTY_MODEM_BCR_GAIN_1 0x2027
248 #define ISM5_PROPERTY_MODEM_BCR_GAIN_0 0x2028
249 #define ISM5_PROPERTY_MODEM_BCR_GEAR 0x2029
250 #define ISM5_PROPERTY_MODEM_BCR_MISC1 0x202A
251 #define ISM5_PROPERTY_MODEM_BCR_MISC0 0x202B
252 #define ISM5_PROPERTY_MODEM_AFC_GEAR 0x202C
253 #define ISM5_PROPERTY_MODEM_AFC_WAIT 0x202D
254 #define ISM5_PROPERTY_MODEM_AFC_GAIN_1 0x202E
255 #define ISM5_PROPERTY_MODEM_AFC_GAIN_0 0x202F
256 #define ISM5_PROPERTY_MODEM_AFC_LIMITER_1 0x2030
257 #define ISM5_PROPERTY_MODEM_AFC_LIMITER_0 0x2031
258 #define ISM5_PROPERTY_MODEM_AFC_MISC 0x2032
259 #define ISM5_PROPERTY_MODEM_AFC_ZIFOFF 0x2033
260 #define ISM5_PROPERTY_MODEM_ADC_CTRL 0x2034
261 #define ISM5_PROPERTY_MODEM_AGC_CONTROL 0x2035
262 #define ISM5_PROPERTY_MODEM_AGC_WINDOW_SIZE 0x2038
263 #define ISM5_PROPERTY_MODEM_AGC_RFPD_DECAY 0x2039
264 #define ISM5_PROPERTY_MODEM_AGC_IFPD_DECAY 0x203A
265 #define ISM5_PROPERTY_MODEM_FSK4_GAIN1 0x203B
266 #define ISM5_PROPERTY_MODEM_FSK4_GAIN0 0x203C
267 #define ISM5_PROPERTY_MODEM_FSK4_TH1 0x203D
268 #define ISM5_PROPERTY_MODEM_FSK4_TH0 0x203E
269 #define ISM5_PROPERTY_MODEM_FSK4_MAP 0x203F
270 #define ISM5_PROPERTY_MODEM_OOK_PDTC 0x2040
271 #define ISM5_PROPERTY_MODEM_OOK_BLOPK 0x2041
272 #define ISM5_PROPERTY_MODEM_OOK_CNT1 0x2042
273 #define ISM5_PROPERTY_MODEM_OOK_MISC 0x2043
274 #define ISM5_PROPERTY_MODEM_RAW_SEARCH 0x2044
275 #define ISM5_PROPERTY_MODEM_RAW_CONTROL 0x2045
276 #define ISM5_PROPERTY_MODEM_RAW_EYE_1 0x2046
277 #define ISM5_PROPERTY_MODEM_RAW_EYE_0 0x2047
278 #define ISM5_PROPERTY_MODEM_ANT_DIV_MODE 0x2048
279 #define ISM5_PROPERTY_MODEM_ANT_DIV_CONTROL 0x2049
280 #define ISM5_PROPERTY_MODEM_RSSI_THRESH 0x204A
281 #define ISM5_PROPERTY_MODEM_RSSI_JUMP_THRESH 0x204B
282 #define ISM5_PROPERTY_MODEM_RSSI_CONTROL 0x204C
283 #define ISM5_PROPERTY_MODEM_RSSI_CONTROL2 0x204D
284 #define ISM5_PROPERTY_MODEM_RSSI_COMP 0x204E
285 #define ISM5_PROPERTY_MODEM_CLKGEN_BAND 0x2051
286 #define ISM5_PROPERTY_MODEM_CHFLT_RX1_CHFLT_COE13_7_0 0x2100
287 #define ISM5_PROPERTY_MODEM_CHFLT_RX1_CHFLT_COE12_7_0 0x2101
288 #define ISM5_PROPERTY_MODEM_CHFLT_RX1_CHFLT_COE11_7_0 0x2102
289 #define ISM5_PROPERTY_MODEM_CHFLT_RX1_CHFLT_COE10_7_0 0x2103
290 #define ISM5_PROPERTY_MODEM_CHFLT_RX1_CHFLT_COE9_7_0 0x2104
291 #define ISM5_PROPERTY_MODEM_CHFLT_RX1_CHFLT_COE8_7_0 0x2105
292 #define ISM5_PROPERTY_MODEM_CHFLT_RX1_CHFLT_COE7_7_0 0x2106
293 #define ISM5_PROPERTY_MODEM_CHFLT_RX1_CHFLT_COE6_7_0 0x2107
294 #define ISM5_PROPERTY_MODEM_CHFLT_RX1_CHFLT_COE5_7_0 0x2108
295 #define ISM5_PROPERTY_MODEM_CHFLT_RX1_CHFLT_COE4_7_0 0x2109
296 #define ISM5_PROPERTY_MODEM_CHFLT_RX1_CHFLT_COE3_7_0 0x210A
297 #define ISM5_PROPERTY_MODEM_CHFLT_RX1_CHFLT_COE2_7_0 0x210B
298 #define ISM5_PROPERTY_MODEM_CHFLT_RX1_CHFLT_COE1_7_0 0x210C
299 #define ISM5_PROPERTY_MODEM_CHFLT_RX1_CHFLT_COE0_7_0 0x210D
300 #define ISM5_PROPERTY_MODEM_CHFLT_RX1_CHFLT_COEM0 0x210E
301 #define ISM5_PROPERTY_MODEM_CHFLT_RX1_CHFLT_COEM1 0x210F
302 #define ISM5_PROPERTY_MODEM_CHFLT_RX1_CHFLT_COEM2 0x2110
303 #define ISM5_PROPERTY_MODEM_CHFLT_RX1_CHFLT_COEM3 0x2111
304 #define ISM5_PROPERTY_MODEM_CHFLT_RX2_CHFLT_COE13_7_0 0x2112
305 #define ISM5_PROPERTY_MODEM_CHFLT_RX2_CHFLT_COE12_7_0 0x2113
306 #define ISM5_PROPERTY_MODEM_CHFLT_RX2_CHFLT_COE11_7_0 0x2114
307 #define ISM5_PROPERTY_MODEM_CHFLT_RX2_CHFLT_COE10_7_0 0x2115
308 #define ISM5_PROPERTY_MODEM_CHFLT_RX2_CHFLT_COE9_7_0 0x2116
309 #define ISM5_PROPERTY_MODEM_CHFLT_RX2_CHFLT_COE8_7_0 0x2117
310 #define ISM5_PROPERTY_MODEM_CHFLT_RX2_CHFLT_COE7_7_0 0x2118
311 #define ISM5_PROPERTY_MODEM_CHFLT_RX2_CHFLT_COE6_7_0 0x2119
312 #define ISM5_PROPERTY_MODEM_CHFLT_RX2_CHFLT_COE5_7_0 0x211A
313 #define ISM5_PROPERTY_MODEM_CHFLT_RX2_CHFLT_COE4_7_0 0x211B
314 #define ISM5_PROPERTY_MODEM_CHFLT_RX2_CHFLT_COE3_7_0 0x211C
315 #define ISM5_PROPERTY_MODEM_CHFLT_RX2_CHFLT_COE2_7_0 0x211D
316 #define ISM5_PROPERTY_MODEM_CHFLT_RX2_CHFLT_COE1_7_0 0x211E
317 #define ISM5_PROPERTY_MODEM_CHFLT_RX2_CHFLT_COE0_7_0 0x211F
318 #define ISM5_PROPERTY_MODEM_CHFLT_RX2_CHFLT_COEM0 0x2120
319 #define ISM5_PROPERTY_MODEM_CHFLT_RX2_CHFLT_COEM1 0x2121
320 #define ISM5_PROPERTY_MODEM_CHFLT_RX2_CHFLT_COEM2 0x2122
321 #define ISM5_PROPERTY_MODEM_CHFLT_RX2_CHFLT_COEM3 0x2123
322 #define ISM5_PROPERTY_PA_MODE 0x2200
323 #define ISM5_PROPERTY_PA_PWR_LVL 0x2201
324 #define ISM5_PROPERTY_PA_BIAS_CLKDUTY 0x2202
325 #define ISM5_PROPERTY_PA_TC 0x2203
326 #define ISM5_PROPERTY_PA_RAMP_EX 0x2204
327 #define ISM5_PROPERTY_PA_RAMP_DOWN_DELAY 0x2205
328 #define ISM5_PROPERTY_SYNTH_PFDCP_CPFF 0x2300
329 #define ISM5_PROPERTY_SYNTH_PFDCP_CPINT 0x2301
330 #define ISM5_PROPERTY_SYNTH_VCO_KV 0x2302
331 #define ISM5_PROPERTY_SYNTH_LPFILT3 0x2303
332 #define ISM5_PROPERTY_SYNTH_LPFILT2 0x2304
333 #define ISM5_PROPERTY_SYNTH_LPFILT1 0x2305
334 #define ISM5_PROPERTY_SYNTH_LPFILT0 0x2306
335 #define ISM5_PROPERTY_SYNTH_VCO_KVCAL 0x2307
336 #define ISM5_PROPERTY_MATCH_VALUE_1 0x3000
337 #define ISM5_PROPERTY_MATCH_MASK_1 0x3001
338 #define ISM5_PROPERTY_MATCH_CTRL_1 0x3002
339 #define ISM5_PROPERTY_MATCH_VALUE_2 0x3003
340 #define ISM5_PROPERTY_MATCH_MASK_2 0x3004
341 #define ISM5_PROPERTY_MATCH_CTRL_2 0x3005
342 #define ISM5_PROPERTY_MATCH_VALUE_3 0x3006
343 #define ISM5_PROPERTY_MATCH_MASK_3 0x3007
344 #define ISM5_PROPERTY_MATCH_CTRL_3 0x3008
345 #define ISM5_PROPERTY_MATCH_VALUE_4 0x3009
346 #define ISM5_PROPERTY_MATCH_MASK_4 0x300A
347 #define ISM5_PROPERTY_MATCH_CTRL_4 0x300B
348 #define ISM5_PROPERTY_FREQ_CONTROL_INTE 0x4000
349 #define ISM5_PROPERTY_FREQ_CONTROL_FRAC_2 0x4001
350 #define ISM5_PROPERTY_FREQ_CONTROL_FRAC_1 0x4002
351 #define ISM5_PROPERTY_FREQ_CONTROL_FRAC_0 0x4003
352 #define ISM5_PROPERTY_FREQ_CONTROL_CHANNEL_STEP_SIZE_1 0x4004
353 #define ISM5_PROPERTY_FREQ_CONTROL_CHANNEL_STEP_SIZE_0 0x4005
354 #define ISM5_PROPERTY_FREQ_CONTROL_W_SIZE 0x4006
355 #define ISM5_PROPERTY_FREQ_CONTROL_VCOCNT_RX_ADJ 0x4007
356 #define ISM5_PROPERTY_RX_HOP_CONTROL 0x5000
357 #define ISM5_PROPERTY_RX_HOP_TABLE_SIZE 0x5001
358 #define ISM5_PROPERTY_RX_HOP_TABLE_ENTRY_0 0x5002
359 #define ISM5_PROPERTY_RX_HOP_TABLE_ENTRY_1 0x5003
360 #define ISM5_PROPERTY_RX_HOP_TABLE_ENTRY_2 0x5004
361 #define ISM5_PROPERTY_RX_HOP_TABLE_ENTRY_3 0x5005
362 #define ISM5_PROPERTY_RX_HOP_TABLE_ENTRY_4 0x5006
363 #define ISM5_PROPERTY_RX_HOP_TABLE_ENTRY_5 0x5007
364 #define ISM5_PROPERTY_RX_HOP_TABLE_ENTRY_6 0x5008
365 #define ISM5_PROPERTY_RX_HOP_TABLE_ENTRY_7 0x5009
366 #define ISM5_PROPERTY_RX_HOP_TABLE_ENTRY_8 0x500A
367 #define ISM5_PROPERTY_RX_HOP_TABLE_ENTRY_9 0x500B
368 #define ISM5_PROPERTY_RX_HOP_TABLE_ENTRY_10 0x500C
369 #define ISM5_PROPERTY_RX_HOP_TABLE_ENTRY_11 0x500D
370 #define ISM5_PROPERTY_RX_HOP_TABLE_ENTRY_12 0x500E
371 #define ISM5_PROPERTY_RX_HOP_TABLE_ENTRY_13 0x500F
372 #define ISM5_PROPERTY_RX_HOP_TABLE_ENTRY_14 0x5010
373 #define ISM5_PROPERTY_RX_HOP_TABLE_ENTRY_15 0x5011
374 #define ISM5_PROPERTY_RX_HOP_TABLE_ENTRY_16 0x5012
375 #define ISM5_PROPERTY_RX_HOP_TABLE_ENTRY_17 0x5013
376 #define ISM5_PROPERTY_RX_HOP_TABLE_ENTRY_18 0x5014
377 #define ISM5_PROPERTY_RX_HOP_TABLE_ENTRY_19 0x5015
378 #define ISM5_PROPERTY_RX_HOP_TABLE_ENTRY_20 0x5016
379 #define ISM5_PROPERTY_RX_HOP_TABLE_ENTRY_21 0x5017
380 #define ISM5_PROPERTY_RX_HOP_TABLE_ENTRY_22 0x5018
381 #define ISM5_PROPERTY_RX_HOP_TABLE_ENTRY_23 0x5019
382 #define ISM5_PROPERTY_RX_HOP_TABLE_ENTRY_24 0x501A
383 #define ISM5_PROPERTY_RX_HOP_TABLE_ENTRY_25 0x501B
384 #define ISM5_PROPERTY_RX_HOP_TABLE_ENTRY_26 0x501C
385 #define ISM5_PROPERTY_RX_HOP_TABLE_ENTRY_27 0x501D
386 #define ISM5_PROPERTY_RX_HOP_TABLE_ENTRY_28 0x501E
387 #define ISM5_PROPERTY_RX_HOP_TABLE_ENTRY_29 0x501F
388 #define ISM5_PROPERTY_RX_HOP_TABLE_ENTRY_30 0x5020
389 #define ISM5_PROPERTY_RX_HOP_TABLE_ENTRY_31 0x5021
390 #define ISM5_PROPERTY_RX_HOP_TABLE_ENTRY_32 0x5022
391 #define ISM5_PROPERTY_RX_HOP_TABLE_ENTRY_33 0x5023
392 #define ISM5_PROPERTY_RX_HOP_TABLE_ENTRY_34 0x5024
393 #define ISM5_PROPERTY_RX_HOP_TABLE_ENTRY_35 0x5025
394 #define ISM5_PROPERTY_RX_HOP_TABLE_ENTRY_36 0x5026
395 #define ISM5_PROPERTY_RX_HOP_TABLE_ENTRY_37 0x5027
396 #define ISM5_PROPERTY_RX_HOP_TABLE_ENTRY_38 0x5028
397 #define ISM5_PROPERTY_RX_HOP_TABLE_ENTRY_39 0x5029
398 #define ISM5_PROPERTY_RX_HOP_TABLE_ENTRY_40 0x502A
399 #define ISM5_PROPERTY_RX_HOP_TABLE_ENTRY_41 0x502B
400 #define ISM5_PROPERTY_RX_HOP_TABLE_ENTRY_42 0x502C
401 #define ISM5_PROPERTY_RX_HOP_TABLE_ENTRY_43 0x502D
402 #define ISM5_PROPERTY_RX_HOP_TABLE_ENTRY_44 0x502E
403 #define ISM5_PROPERTY_RX_HOP_TABLE_ENTRY_45 0x502F
404 #define ISM5_PROPERTY_RX_HOP_TABLE_ENTRY_46 0x5030
405 #define ISM5_PROPERTY_RX_HOP_TABLE_ENTRY_47 0x5031
406 #define ISM5_PROPERTY_RX_HOP_TABLE_ENTRY_48 0x5032
407 #define ISM5_PROPERTY_RX_HOP_TABLE_ENTRY_49 0x5033
408 #define ISM5_PROPERTY_RX_HOP_TABLE_ENTRY_50 0x5034
409 #define ISM5_PROPERTY_RX_HOP_TABLE_ENTRY_51 0x5035
410 #define ISM5_PROPERTY_RX_HOP_TABLE_ENTRY_52 0x5036
411 #define ISM5_PROPERTY_RX_HOP_TABLE_ENTRY_53 0x5037
412 #define ISM5_PROPERTY_RX_HOP_TABLE_ENTRY_54 0x5038
413 #define ISM5_PROPERTY_RX_HOP_TABLE_ENTRY_55 0x5039
414 #define ISM5_PROPERTY_RX_HOP_TABLE_ENTRY_56 0x503A
415 #define ISM5_PROPERTY_RX_HOP_TABLE_ENTRY_57 0x503B
416 #define ISM5_PROPERTY_RX_HOP_TABLE_ENTRY_58 0x503C
417 #define ISM5_PROPERTY_RX_HOP_TABLE_ENTRY_59 0x503D
418 #define ISM5_PROPERTY_RX_HOP_TABLE_ENTRY_60 0x503E
419 #define ISM5_PROPERTY_RX_HOP_TABLE_ENTRY_61 0x503F
420 #define ISM5_PROPERTY_RX_HOP_TABLE_ENTRY_62 0x5040
421 #define ISM5_PROPERTY_RX_HOP_TABLE_ENTRY_63 0x5041
422 
427 #define ISM5_FIFO_RESET_NONE 0x00
428 #define ISM5_FIFO_RESET_TX 0x01
429 #define ISM5_FIFO_RESET_RX 0x02
430 #define ISM5_FIFO_RESET_TX_RX 0x03
431 #define ISM5_FIFO_RESET_MASK 0x03
432 
437 #define ISM5_STATE_NO_CHANGE 0x00
438 #define ISM5_STATE_SLEEP 0x01
439 #define ISM5_STATE_SPI_ACTIVE 0x02
440 #define ISM5_STATE_READY 0x03
441 #define ISM5_STATE_TX_TUNE 0x05
442 #define ISM5_STATE_RX_TUNE 0x06
443 #define ISM5_STATE_TX 0x07
444 #define ISM5_STATE_RX 0x08
445 #define ISM5_STATE_MASK 0x0F
446 
451 #define ISM5_INT_CLEAR 0x00
452 #define ISM5_INT_PEND_PH 0x01
453 #define ISM5_INT_PEND_MODEM 0x02
454 #define ISM5_INT_PEND_CHIP 0x04
455 #define ISM5_INT_STATUS_PH 0x01
456 #define ISM5_INT_STATUS_MODEM 0x02
457 #define ISM5_INT_STATUS_CHIP 0x04
458 #define ISM5_PH_PEND_RX_FIFO_ALMOST_FULL 0x01
459 #define ISM5_PH_PEND_TX_FIFO_ALMOST_EMPTY 0x02
460 #define ISM5_PH_PEND_ALT_CRC_ERROR 0x04
461 #define ISM5_PH_PEND_CRC_ERROR 0x08
462 #define ISM5_PH_PEND_PACKET_RX 0x10
463 #define ISM5_PH_PEND_PACKET_SEND 0x20
464 #define ISM5_PH_PEND_FILTER_MISS 0x40
465 #define ISM5_PH_PEND_FILTER_MATCH 0x80
466 #define ISM5_PH_STATUS_RX_FIFO_ALMOST_FULL 0x01
467 #define ISM5_PH_STATUS_TX_FIFO_ALMOST_EMPTY 0x02
468 #define ISM5_PH_STATUS_ALT_CRC_ERROR 0x04
469 #define ISM5_PH_STATUS_CRC_ERROR 0x08
470 #define ISM5_PH_STATUS_PACKET_RX 0x10
471 #define ISM5_PH_STATUS_PACKET_SEND 0x20
472 #define ISM5_PH_STATUS_FILTER_MISS 0x40
473 #define ISM5_PH_STATUS_FILTER_MATCH 0x80
474 #define ISM5_MODEM_PEND_SYNC_DETECT 0x01
475 #define ISM5_MODEM_PEND_PREAMBLE_DETECT 0x02
476 #define ISM5_MODEM_PEND_INVALID_PREAMBLE 0x04
477 #define ISM5_MODEM_PEND_RSSI 0x08
478 #define ISM5_MODEM_PEND_RSSI_JUMP 0x10
479 #define ISM5_MODEM_PEND_INVALID_SYNC 0x20
480 #define ISM5_MODEM_PEND_POSTAMBLE_DETECT 0x40
481 #define ISM5_MODEM_PEND_RSSI_LATCH 0x80
482 #define ISM5_MODEM_STATUS_SYNC_DETECT 0x01
483 #define ISM5_MODEM_STATUS_PREAMBLE_DETECT 0x02
484 #define ISM5_MODEM_STATUS_INVALID_PREAMBLE 0x04
485 #define ISM5_MODEM_STATUS_RSSI 0x08
486 #define ISM5_MODEM_STATUS_RSSI_JUMP 0x10
487 #define ISM5_MODEM_STATUS_INVALID_SYNC 0x20
488 #define ISM5_MODEM_STATUS_POSTAMBLE_DETECT 0x40
489 #define ISM5_MODEM_STATUS_RSSI_LATCH 0x80
490 #define ISM5_CHIP_PEND_WUT 0x01
491 #define ISM5_CHIP_PEND_LOW_BATT 0x02
492 #define ISM5_CHIP_PEND_CHIP_READY 0x04
493 #define ISM5_CHIP_PEND_CMD_ERROR 0x08
494 #define ISM5_CHIP_PEND_STATE_CHANGE 0x10
495 #define ISM5_CHIP_PEND_FIFO_UNDERFLOW_OVERFLOW_ERROR 0x20
496 #define ISM5_CHIP_PEND_CAL 0x40
497 #define ISM5_CHIP_STATUS_WUT 0x01
498 #define ISM5_CHIP_STATUS_LOW_BATT 0x02
499 #define ISM5_CHIP_STATUS_CHIP_READY 0x04
500 #define ISM5_CHIP_STATUS_CMD_ERROR 0x08
501 #define ISM5_CHIP_STATUS_STATE_CHANGE 0x10
502 #define ISM5_CHIP_STATUS_FIFO_UNDERFLOW_OVERFLOW_ERROR 0x20
503 #define ISM5_CHIP_STATUS_CAL 0x40
504 
509 #define ISM5_PA_PWR_LVL_MIN 0x00
510 #define ISM5_PA_PWR_LVL_MAX 0x7F
511 
516 #define ISM5_PACKET_MAX_SIZE 64
517 #define ISM5_PACKET_FIXED_SIZE 0
518 #define ISM5_PACKET_TIMEOUT_DISABLE 0
519 #define ISM5_PACKET_TIMEOUT_1_SEC 1000
520 
529 #define ISM5_SET_DATA_SAMPLE_EDGE SET_SPI_DATA_SAMPLE_EDGE
530 #define ISM5_SET_DATA_SAMPLE_MIDDLE SET_SPI_DATA_SAMPLE_MIDDLE
531  // ism5_set
533 
548 #define ISM5_MAP_MIKROBUS( cfg, mikrobus ) \
549  cfg.miso = MIKROBUS( mikrobus, MIKROBUS_MISO ); \
550  cfg.mosi = MIKROBUS( mikrobus, MIKROBUS_MOSI ); \
551  cfg.sck = MIKROBUS( mikrobus, MIKROBUS_SCK ); \
552  cfg.cs = MIKROBUS( mikrobus, MIKROBUS_CS ); \
553  cfg.shd = MIKROBUS( mikrobus, MIKROBUS_RST ); \
554  cfg.int_pin = MIKROBUS( mikrobus, MIKROBUS_INT )
555  // ism5_map // ism5
558 
563 typedef struct
564 {
565  // Output pins
566  digital_out_t shd;
568  // Input pins
569  digital_in_t int_pin;
571  // Modules
572  spi_master_t spi;
574  pin_name_t chip_select;
576 } ism5_t;
577 
582 typedef struct
583 {
584  // Communication gpio pins
585  pin_name_t miso;
586  pin_name_t mosi;
587  pin_name_t sck;
588  pin_name_t cs;
590  // Additional gpio pins
591  pin_name_t shd;
592  pin_name_t int_pin;
594  // static variable
595  uint32_t spi_speed;
596  spi_master_mode_t spi_mode;
597  spi_master_chip_select_polarity_t cs_polarity;
599 } ism5_cfg_t;
600 
605 typedef struct
606 {
607  uint8_t chip_rev;
608  uint16_t part;
609  uint8_t part_build;
610  uint16_t id;
611  uint8_t customer;
612  uint8_t rom_id;
615 
620 typedef struct
621 {
622  uint8_t gpio_0;
623  uint8_t gpio_1;
624  uint8_t gpio_2;
625  uint8_t gpio_3;
626  uint8_t nirq;
627  uint8_t sdo;
628  uint8_t gen_config;
631 
636 typedef struct
637 {
638  uint8_t int_pend;
639  uint8_t int_status;
640  uint8_t ph_pend;
641  uint8_t ph_status;
642  uint8_t modem_pend;
643  uint8_t modem_status;
644  uint8_t chip_pend;
645  uint8_t chip_status;
648 
653 typedef enum
654 {
655  ISM5_OK = 0,
657  ISM5_TIMEOUT = -2
658 
660 
677 
691 err_t ism5_init ( ism5_t *ctx, ism5_cfg_t *cfg );
692 
705 err_t ism5_default_cfg ( ism5_t *ctx );
706 
722 err_t ism5_send_cmd ( ism5_t *ctx, uint8_t cmd, uint8_t *data_in, uint8_t len );
723 
736 err_t ism5_read_rsp ( ism5_t *ctx, uint8_t *data_out, uint8_t len );
737 
751 err_t ism5_send_fast_cmd ( ism5_t *ctx, uint8_t cmd, uint8_t *data_in, uint8_t len );
752 
767 err_t ism5_read_fast_cmd ( ism5_t *ctx, uint8_t cmd, uint8_t *data_out, uint8_t len );
768 
779 err_t ism5_wait_ready ( ism5_t *ctx );
780 
791 err_t ism5_check_ready ( ism5_t *ctx );
792 
802 
812 
821 uint8_t ism5_get_int_pin ( ism5_t *ctx );
822 
834 
846 err_t ism5_config_init ( ism5_t *ctx );
847 
859 err_t ism5_power_up ( ism5_t *ctx );
860 
874 err_t ism5_get_part_info ( ism5_t *ctx, ism5_part_info_t *part_info );
875 
890 err_t ism5_set_property ( ism5_t *ctx, uint16_t prop_idx, uint8_t *data_in, uint8_t num_props );
891 
906 err_t ism5_get_property ( ism5_t *ctx, uint16_t prop_idx, uint8_t *data_out, uint8_t num_props );
907 
921 err_t ism5_set_property_byte ( ism5_t *ctx, uint16_t prop_idx, uint8_t data_in );
922 
936 err_t ism5_get_property_byte ( ism5_t *ctx, uint16_t prop_idx, uint8_t *data_out );
937 
951 err_t ism5_gpio_config ( ism5_t *ctx, ism5_gpio_config_t *gpio_cfg );
952 
967 err_t ism5_fifo_info ( ism5_t *ctx, uint8_t fifo_reset, uint8_t *rx_fifo_count, uint8_t *tx_fifo_space );
968 
983 
997 err_t ism5_get_device_state ( ism5_t *ctx, uint8_t *state, uint8_t *channel );
998 
1011 err_t ism5_change_state ( ism5_t *ctx, uint8_t state );
1012 
1027 err_t ism5_start_tx ( ism5_t *ctx, uint8_t channel, uint8_t condition, uint16_t len );
1028 
1042 err_t ism5_write_tx_fifo ( ism5_t *ctx, uint8_t *data_in, uint8_t len );
1043 
1058 err_t ism5_start_rx ( ism5_t *ctx, uint8_t channel, uint8_t condition, uint16_t len );
1059 
1073 err_t ism5_read_rx_fifo ( ism5_t *ctx, uint8_t *data_out, uint8_t len );
1074 
1087 err_t ism5_wait_tx_finish ( ism5_t *ctx, uint32_t timeout );
1088 
1103 err_t ism5_transmit_packet ( ism5_t *ctx, uint8_t channel, uint8_t *data_in, uint8_t len );
1104 
1120 err_t ism5_receive_packet ( ism5_t *ctx, uint8_t channel, uint8_t *data_out, uint8_t *len, uint32_t timeout );
1121 
1122 #ifdef __cplusplus
1123 }
1124 #endif
1125 #endif // ISM5_H
1126  // ism5
1128 
1129 // ------------------------------------------------------------------------ END
ism5_config_init
err_t ism5_config_init(ism5_t *ctx)
ISM 5 config init function.
ism5_wait_tx_finish
err_t ism5_wait_tx_finish(ism5_t *ctx, uint32_t timeout)
ISM 5 wait tx finish function.
ism5_part_info_t::chip_rev
uint8_t chip_rev
Definition: ism5.h:607
ism5_disable_device
void ism5_disable_device(ism5_t *ctx)
ISM 5 disable device function.
ism5_check_ready
err_t ism5_check_ready(ism5_t *ctx)
ISM 5 check ready function.
ism5_int_status_t::chip_pend
uint8_t chip_pend
Definition: ism5.h:644
ism5_cfg_t::cs
pin_name_t cs
Definition: ism5.h:588
ism5_cfg_setup
void ism5_cfg_setup(ism5_cfg_t *cfg)
ISM 5 configuration object setup function.
ism5_check_communication
err_t ism5_check_communication(ism5_t *ctx)
ISM 5 check communication function.
spi_specifics.h
This file contains SPI specific macros, functions, etc.
ism5_gpio_config
err_t ism5_gpio_config(ism5_t *ctx, ism5_gpio_config_t *gpio_cfg)
ISM 5 gpio config function.
ism5_t::chip_select
pin_name_t chip_select
Definition: ism5.h:574
ism5_get_property
err_t ism5_get_property(ism5_t *ctx, uint16_t prop_idx, uint8_t *data_out, uint8_t num_props)
ISM 5 get property function.
ism5_gpio_config_t::gpio_2
uint8_t gpio_2
Definition: ism5.h:624
ism5_gpio_config_t::gpio_1
uint8_t gpio_1
Definition: ism5.h:623
ism5_receive_packet
err_t ism5_receive_packet(ism5_t *ctx, uint8_t channel, uint8_t *data_out, uint8_t *len, uint32_t timeout)
ISM 5 receive packet function.
ism5_int_status_t::modem_status
uint8_t modem_status
Definition: ism5.h:643
ism5_get_int_status
err_t ism5_get_int_status(ism5_t *ctx, ism5_int_status_t *status)
ISM 5 get int status function.
ism5_part_info_t::customer
uint8_t customer
Definition: ism5.h:611
ism5_part_info_t::part
uint16_t part
Definition: ism5.h:608
ism5_write_tx_fifo
err_t ism5_write_tx_fifo(ism5_t *ctx, uint8_t *data_in, uint8_t len)
ISM 5 write tx fifo function.
ism5_cfg_t::mosi
pin_name_t mosi
Definition: ism5.h:586
ism5_fifo_info
err_t ism5_fifo_info(ism5_t *ctx, uint8_t fifo_reset, uint8_t *rx_fifo_count, uint8_t *tx_fifo_space)
ISM 5 fifo info function.
ISM5_ERROR
@ ISM5_ERROR
Definition: ism5.h:656
ism5_get_property_byte
err_t ism5_get_property_byte(ism5_t *ctx, uint16_t prop_idx, uint8_t *data_out)
ISM 5 get property byte function.
ism5_part_info_t::part_build
uint8_t part_build
Definition: ism5.h:609
ism5_send_fast_cmd
err_t ism5_send_fast_cmd(ism5_t *ctx, uint8_t cmd, uint8_t *data_in, uint8_t len)
ISM 5 send fast cmd function.
ism5_set_property_byte
err_t ism5_set_property_byte(ism5_t *ctx, uint16_t prop_idx, uint8_t data_in)
ISM 5 set property byte function.
ism5_send_cmd
err_t ism5_send_cmd(ism5_t *ctx, uint8_t cmd, uint8_t *data_in, uint8_t len)
ISM 5 send cmd function.
ism5_set_property
err_t ism5_set_property(ism5_t *ctx, uint16_t prop_idx, uint8_t *data_in, uint8_t num_props)
ISM 5 set property function.
ism5_gpio_config_t::nirq
uint8_t nirq
Definition: ism5.h:626
ism5_gpio_config_t::sdo
uint8_t sdo
Definition: ism5.h:627
ism5_transmit_packet
err_t ism5_transmit_packet(ism5_t *ctx, uint8_t channel, uint8_t *data_in, uint8_t len)
ISM 5 transmit packet function.
ism5_int_status_t::chip_status
uint8_t chip_status
Definition: ism5.h:645
ism5_enable_device
void ism5_enable_device(ism5_t *ctx)
ISM 5 enable device function.
ism5_cfg_t::miso
pin_name_t miso
Definition: ism5.h:585
ism5_start_rx
err_t ism5_start_rx(ism5_t *ctx, uint8_t channel, uint8_t condition, uint16_t len)
ISM 5 start rx function.
ism5_read_rx_fifo
err_t ism5_read_rx_fifo(ism5_t *ctx, uint8_t *data_out, uint8_t len)
ISM 5 read rx fifo function.
ism5_get_device_state
err_t ism5_get_device_state(ism5_t *ctx, uint8_t *state, uint8_t *channel)
ISM 5 get device state function.
ism5_cfg_t::spi_mode
spi_master_mode_t spi_mode
Definition: ism5.h:596
ism5_part_info_t::id
uint16_t id
Definition: ism5.h:610
ISM5_TIMEOUT
@ ISM5_TIMEOUT
Definition: ism5.h:657
ism5_cfg_t::cs_polarity
spi_master_chip_select_polarity_t cs_polarity
Definition: ism5.h:597
ism5_cfg_t::sck
pin_name_t sck
Definition: ism5.h:587
ism5_default_cfg
err_t ism5_default_cfg(ism5_t *ctx)
ISM 5 default configuration function.
ism5_gpio_config_t::gen_config
uint8_t gen_config
Definition: ism5.h:628
ism5_cfg_t::shd
pin_name_t shd
Definition: ism5.h:591
ism5_cfg_t
ISM 5 Click configuration object.
Definition: ism5.h:583
ism5_read_rsp
err_t ism5_read_rsp(ism5_t *ctx, uint8_t *data_out, uint8_t len)
ISM 5 read resp function.
ism5_cfg_t::spi_speed
uint32_t spi_speed
Definition: ism5.h:595
ism5_part_info_t
ISM 5 Click part info object.
Definition: ism5.h:606
ism5_start_tx
err_t ism5_start_tx(ism5_t *ctx, uint8_t channel, uint8_t condition, uint16_t len)
ISM 5 start tx function.
ism5_int_status_t
ISM 5 Click int status object.
Definition: ism5.h:637
ism5_int_status_t::ph_status
uint8_t ph_status
Definition: ism5.h:641
ism5_init
err_t ism5_init(ism5_t *ctx, ism5_cfg_t *cfg)
ISM 5 initialization function.
ism5_get_part_info
err_t ism5_get_part_info(ism5_t *ctx, ism5_part_info_t *part_info)
ISM 5 get part info function.
ism5_gpio_config_t::gpio_3
uint8_t gpio_3
Definition: ism5.h:625
ism5_cfg_t::int_pin
pin_name_t int_pin
Definition: ism5.h:592
ism5_gpio_config_t
ISM 5 Click gpio config object.
Definition: ism5.h:621
ism5_t::shd
digital_out_t shd
Definition: ism5.h:566
ism5_gpio_config_t::gpio_0
uint8_t gpio_0
Definition: ism5.h:622
ism5_return_value_t
ism5_return_value_t
ISM 5 Click return value data.
Definition: ism5.h:654
ism5_t::int_pin
digital_in_t int_pin
Definition: ism5.h:569
ism5_t
ISM 5 Click context object.
Definition: ism5.h:564
ism5_wait_ready
err_t ism5_wait_ready(ism5_t *ctx)
ISM 5 wait ready function.
ISM5_OK
@ ISM5_OK
Definition: ism5.h:655
ism5_change_state
err_t ism5_change_state(ism5_t *ctx, uint8_t state)
ISM 5 change state function.
ism5_read_fast_cmd
err_t ism5_read_fast_cmd(ism5_t *ctx, uint8_t cmd, uint8_t *data_out, uint8_t len)
ISM 5 read fast cmd function.
ism5_int_status_t::int_status
uint8_t int_status
Definition: ism5.h:639
ism5_power_up
err_t ism5_power_up(ism5_t *ctx)
ISM 5 power up function.
ism5_int_status_t::ph_pend
uint8_t ph_pend
Definition: ism5.h:640
ism5_int_status_t::modem_pend
uint8_t modem_pend
Definition: ism5.h:642
ism5_t::spi
spi_master_t spi
Definition: ism5.h:572
ism5_int_status_t::int_pend
uint8_t int_pend
Definition: ism5.h:638
ism5_get_int_pin
uint8_t ism5_get_int_pin(ism5_t *ctx)
ISM 5 get int pin function.
ism5_part_info_t::rom_id
uint8_t rom_id
Definition: ism5.h:612