accelqvar  2.1.0.0
Macros
AccelQvar Registers Settings

Settings for registers of AccelQvar Click driver. More...

Macros

#define ACCELQVAR_WHO_AM_I   0x47
 AccelQvar device ID data value. More...
 
#define ACCELQVAR_CTRL1_INT1_ON_RES   0x40
 AccelQvar CTRL1 register description bitmask. More...
 
#define ACCELQVAR_CTRL1_SW_RESET   0x20
 
#define ACCELQVAR_CTRL1_IF_ADD_INC   0x10
 
#define ACCELQVAR_CTRL1_DRDY_PULSED   0x08
 
#define ACCELQVAR_CTRL1_WU_X_EN   0x04
 
#define ACCELQVAR_CTRL1_WU_Y_EN   0x02
 
#define ACCELQVAR_CTRL1_WU_Z_EN   0x01
 
#define ACCELQVAR_CTRL2_INT1_BOOT   0x80
 AccelQvar CTRL2 register description bitmask. More...
 
#define ACCELQVAR_CTRL2_INT1_FIFO_FULL   0x40
 
#define ACCELQVAR_CTRL2_INT1_FIFO_TH   0x20
 
#define ACCELQVAR_CTRL2_INT1_FIFO_OVR   0x10
 
#define ACCELQVAR_CTRL2_INT1_DRDY   0x08
 
#define ACCELQVAR_CTRL3_INT2_BOOT   0x80
 AccelQvar CTRL3 register description bitmask. More...
 
#define ACCELQVAR_CTRL3_INT2_FIFO_FULL   0x40
 
#define ACCELQVAR_CTRL3_INT2_FIFO_TH   0x20
 
#define ACCELQVAR_CTRL3_INT2_FIFO_OVR   0x10
 
#define ACCELQVAR_CTRL3_INT2_DRDY   0x08
 
#define ACCELQVAR_CTRL3_HP_EN   0x04
 
#define ACCELQVAR_CTRL3_ST_SIGN_Y   0x02
 
#define ACCELQVAR_CTRL3_ST_SIGN_X   0x01
 
#define ACCELQVAR_CTRL4_INACT_ODR_25   0xC0
 AccelQvar CTRL4 register description bitmask. More...
 
#define ACCELQVAR_CTRL4_INACT_ODR_3   0x80
 
#define ACCELQVAR_CTRL4_INACT_ODR1_6   0x40
 
#define ACCELQVAR_CTRL4_INACT_ODR1_STAT   0x00
 
#define ACCELQVAR_CTRL4_BDU   0x20
 
#define ACCELQVAR_CTRL4_EMB_FUNC_EN   0x10
 
#define ACCELQVAR_CTRL4_FIFO_EN   0x08
 
#define ACCELQVAR_CTRL4_SOC   0x02
 
#define ACCELQVAR_CTRL4_BOOT   0x01
 
#define ACCELQVAR_CTRL5_ODR_ONE_SHOT_IFACE   0xF0
 AccelQvar CTRL5 register description bitmask. More...
 
#define ACCELQVAR_CTRL5_ODR_ONE_SHOT_INT2   0xE0
 
#define ACCELQVAR_CTRL5_ODR_800_HZ   0xB0
 
#define ACCELQVAR_CTRL5_ODR_400_HZ   0xA0
 
#define ACCELQVAR_CTRL5_ODR_200_HZ   0x90
 
#define ACCELQVAR_CTRL5_ODR_100_HZ   0x80
 
#define ACCELQVAR_CTRL5_ODR_50_HZ   0x70
 
#define ACCELQVAR_CTRL5_ODR_25_HZ   0x60
 
#define ACCELQVAR_CTRL5_ODR_12_5_HZ   0x50
 
#define ACCELQVAR_CTRL5_ODR_6_HZ   0x40
 
#define ACCELQVAR_CTRL5_ODR_ULP_25_HZ   0x30
 
#define ACCELQVAR_CTRL5_ODR_ULP_3_HZ   0x20
 
#define ACCELQVAR_CTRL5_ODR_ULP_1_6_HZ   0x10
 
#define ACCELQVAR_CTRL5_ODR_PWR_DOWN   0x00
 
#define ACCELQVAR_CTRL5_BW_ODR_16   0x0C
 
#define ACCELQVAR_CTRL5_BW_ODR_8   0x08
 
#define ACCELQVAR_CTRL5_BW_ODR_4   0x04
 
#define ACCELQVAR_CTRL5_BW_ODR_2   0x00
 
#define ACCELQVAR_CTRL5_FS_16_G   0x03
 
#define ACCELQVAR_CTRL5_FS_8_G   0x02
 
#define ACCELQVAR_CTRL5_FS_4_G   0x01
 
#define ACCELQVAR_CTRL5_FS_2_G   0x00
 
#define ACCELQVAR_AH_QVAR_CFG_AH_QVAR_EN   0x80
 AccelQvar AH_QVAR_CFG register description bitmask. More...
 
#define ACCELQVAR_AH_QVAR_CFG_AH_QVAR_NOTCH_EN   0x40
 
#define ACCELQVAR_AH_QVAR_CFG_AH_QVAR_NOTCH_CUTOFF   0x00
 
#define ACCELQVAR_AH_QVAR_CFG_AH_QVAR_C_ZIN_75_MOHM   0x0C
 
#define ACCELQVAR_AH_QVAR_CFG_AH_QVAR_C_ZIN_310_MOHM   0x08
 
#define ACCELQVAR_AH_QVAR_CFG_AH_QVAR_C_ZIN_175_MOHM   0x04
 
#define ACCELQVAR_AH_QVAR_CFG_AH_QVAR_C_ZIN_520_MOHM   0x00
 
#define ACCELQVAR_AH_QVAR_CFG_AH_QVAR_GAIN_4   0x03
 
#define ACCELQVAR_AH_QVAR_CFG_AH_QVAR_GAIN_2   0x02
 
#define ACCELQVAR_AH_QVAR_CFG_AH_QVAR_GAIN_1   0x01
 
#define ACCELQVAR_AH_QVAR_CFG_AH_QVAR_GAIN_0_5   0x00
 
#define ACCELQVAR_IF_WAKE_UP_SOFT_PD   0x01
 AccelQvar IF_WAKE_UP register description bitmask. More...
 
#define ACCELQVAR_SENSITIVITY_FS_2G   0.061f
 AccelQvar full scale sensitivity data value. More...
 
#define ACCELQVAR_SENSITIVITY_FS_4G   0.122f
 
#define ACCELQVAR_SENSITIVITY_FS_8G   0.244f
 
#define ACCELQVAR_SENSITIVITY_FS_16G   0.488f
 
#define ACCELQVAR_QVAR_DIVIDER   74.4f
 AccelQvar calculation data value. More...
 
#define ACCELQVAR_TEMP_DIVIDER   355.5f
 
#define ACCELQVAR_TEMP_ZERO_VAL   25.0f
 
#define ACCELQVAR_DEVICE_ADDRESS_GND   0x18
 AccelQvar device address setting. More...
 
#define ACCELQVAR_DEVICE_ADDRESS_VCC   0x19
 
#define ACCELQVAR_SET_DATA_SAMPLE_EDGE   SET_SPI_DATA_SAMPLE_EDGE
 Data sample selection. More...
 
#define ACCELQVAR_SET_DATA_SAMPLE_MIDDLE   SET_SPI_DATA_SAMPLE_MIDDLE
 

Detailed Description

Settings for registers of AccelQvar Click driver.

Macro Definition Documentation

◆ ACCELQVAR_AH_QVAR_CFG_AH_QVAR_C_ZIN_175_MOHM

#define ACCELQVAR_AH_QVAR_CFG_AH_QVAR_C_ZIN_175_MOHM   0x04

◆ ACCELQVAR_AH_QVAR_CFG_AH_QVAR_C_ZIN_310_MOHM

#define ACCELQVAR_AH_QVAR_CFG_AH_QVAR_C_ZIN_310_MOHM   0x08

◆ ACCELQVAR_AH_QVAR_CFG_AH_QVAR_C_ZIN_520_MOHM

#define ACCELQVAR_AH_QVAR_CFG_AH_QVAR_C_ZIN_520_MOHM   0x00

◆ ACCELQVAR_AH_QVAR_CFG_AH_QVAR_C_ZIN_75_MOHM

#define ACCELQVAR_AH_QVAR_CFG_AH_QVAR_C_ZIN_75_MOHM   0x0C

◆ ACCELQVAR_AH_QVAR_CFG_AH_QVAR_EN

#define ACCELQVAR_AH_QVAR_CFG_AH_QVAR_EN   0x80

AccelQvar AH_QVAR_CFG register description bitmask.

AH_QVAR_CFG register description bitmask of AccelQvar Click driver.

◆ ACCELQVAR_AH_QVAR_CFG_AH_QVAR_GAIN_0_5

#define ACCELQVAR_AH_QVAR_CFG_AH_QVAR_GAIN_0_5   0x00

◆ ACCELQVAR_AH_QVAR_CFG_AH_QVAR_GAIN_1

#define ACCELQVAR_AH_QVAR_CFG_AH_QVAR_GAIN_1   0x01

◆ ACCELQVAR_AH_QVAR_CFG_AH_QVAR_GAIN_2

#define ACCELQVAR_AH_QVAR_CFG_AH_QVAR_GAIN_2   0x02

◆ ACCELQVAR_AH_QVAR_CFG_AH_QVAR_GAIN_4

#define ACCELQVAR_AH_QVAR_CFG_AH_QVAR_GAIN_4   0x03

◆ ACCELQVAR_AH_QVAR_CFG_AH_QVAR_NOTCH_CUTOFF

#define ACCELQVAR_AH_QVAR_CFG_AH_QVAR_NOTCH_CUTOFF   0x00

◆ ACCELQVAR_AH_QVAR_CFG_AH_QVAR_NOTCH_EN

#define ACCELQVAR_AH_QVAR_CFG_AH_QVAR_NOTCH_EN   0x40

◆ ACCELQVAR_CTRL1_DRDY_PULSED

#define ACCELQVAR_CTRL1_DRDY_PULSED   0x08

◆ ACCELQVAR_CTRL1_IF_ADD_INC

#define ACCELQVAR_CTRL1_IF_ADD_INC   0x10

◆ ACCELQVAR_CTRL1_INT1_ON_RES

#define ACCELQVAR_CTRL1_INT1_ON_RES   0x40

AccelQvar CTRL1 register description bitmask.

CTRL1 register description bitmask of AccelQvar Click driver.

◆ ACCELQVAR_CTRL1_SW_RESET

#define ACCELQVAR_CTRL1_SW_RESET   0x20

◆ ACCELQVAR_CTRL1_WU_X_EN

#define ACCELQVAR_CTRL1_WU_X_EN   0x04

◆ ACCELQVAR_CTRL1_WU_Y_EN

#define ACCELQVAR_CTRL1_WU_Y_EN   0x02

◆ ACCELQVAR_CTRL1_WU_Z_EN

#define ACCELQVAR_CTRL1_WU_Z_EN   0x01

◆ ACCELQVAR_CTRL2_INT1_BOOT

#define ACCELQVAR_CTRL2_INT1_BOOT   0x80

AccelQvar CTRL2 register description bitmask.

CTRL2 register description bitmask of AccelQvar Click driver.

◆ ACCELQVAR_CTRL2_INT1_DRDY

#define ACCELQVAR_CTRL2_INT1_DRDY   0x08

◆ ACCELQVAR_CTRL2_INT1_FIFO_FULL

#define ACCELQVAR_CTRL2_INT1_FIFO_FULL   0x40

◆ ACCELQVAR_CTRL2_INT1_FIFO_OVR

#define ACCELQVAR_CTRL2_INT1_FIFO_OVR   0x10

◆ ACCELQVAR_CTRL2_INT1_FIFO_TH

#define ACCELQVAR_CTRL2_INT1_FIFO_TH   0x20

◆ ACCELQVAR_CTRL3_HP_EN

#define ACCELQVAR_CTRL3_HP_EN   0x04

◆ ACCELQVAR_CTRL3_INT2_BOOT

#define ACCELQVAR_CTRL3_INT2_BOOT   0x80

AccelQvar CTRL3 register description bitmask.

CTRL3 register description bitmask of AccelQvar Click driver.

◆ ACCELQVAR_CTRL3_INT2_DRDY

#define ACCELQVAR_CTRL3_INT2_DRDY   0x08

◆ ACCELQVAR_CTRL3_INT2_FIFO_FULL

#define ACCELQVAR_CTRL3_INT2_FIFO_FULL   0x40

◆ ACCELQVAR_CTRL3_INT2_FIFO_OVR

#define ACCELQVAR_CTRL3_INT2_FIFO_OVR   0x10

◆ ACCELQVAR_CTRL3_INT2_FIFO_TH

#define ACCELQVAR_CTRL3_INT2_FIFO_TH   0x20

◆ ACCELQVAR_CTRL3_ST_SIGN_X

#define ACCELQVAR_CTRL3_ST_SIGN_X   0x01

◆ ACCELQVAR_CTRL3_ST_SIGN_Y

#define ACCELQVAR_CTRL3_ST_SIGN_Y   0x02

◆ ACCELQVAR_CTRL4_BDU

#define ACCELQVAR_CTRL4_BDU   0x20

◆ ACCELQVAR_CTRL4_BOOT

#define ACCELQVAR_CTRL4_BOOT   0x01

◆ ACCELQVAR_CTRL4_EMB_FUNC_EN

#define ACCELQVAR_CTRL4_EMB_FUNC_EN   0x10

◆ ACCELQVAR_CTRL4_FIFO_EN

#define ACCELQVAR_CTRL4_FIFO_EN   0x08

◆ ACCELQVAR_CTRL4_INACT_ODR1_6

#define ACCELQVAR_CTRL4_INACT_ODR1_6   0x40

◆ ACCELQVAR_CTRL4_INACT_ODR1_STAT

#define ACCELQVAR_CTRL4_INACT_ODR1_STAT   0x00

◆ ACCELQVAR_CTRL4_INACT_ODR_25

#define ACCELQVAR_CTRL4_INACT_ODR_25   0xC0

AccelQvar CTRL4 register description bitmask.

CTRL4 register description bitmask of AccelQvar Click driver.

◆ ACCELQVAR_CTRL4_INACT_ODR_3

#define ACCELQVAR_CTRL4_INACT_ODR_3   0x80

◆ ACCELQVAR_CTRL4_SOC

#define ACCELQVAR_CTRL4_SOC   0x02

◆ ACCELQVAR_CTRL5_BW_ODR_16

#define ACCELQVAR_CTRL5_BW_ODR_16   0x0C

◆ ACCELQVAR_CTRL5_BW_ODR_2

#define ACCELQVAR_CTRL5_BW_ODR_2   0x00

◆ ACCELQVAR_CTRL5_BW_ODR_4

#define ACCELQVAR_CTRL5_BW_ODR_4   0x04

◆ ACCELQVAR_CTRL5_BW_ODR_8

#define ACCELQVAR_CTRL5_BW_ODR_8   0x08

◆ ACCELQVAR_CTRL5_FS_16_G

#define ACCELQVAR_CTRL5_FS_16_G   0x03

◆ ACCELQVAR_CTRL5_FS_2_G

#define ACCELQVAR_CTRL5_FS_2_G   0x00

◆ ACCELQVAR_CTRL5_FS_4_G

#define ACCELQVAR_CTRL5_FS_4_G   0x01

◆ ACCELQVAR_CTRL5_FS_8_G

#define ACCELQVAR_CTRL5_FS_8_G   0x02

◆ ACCELQVAR_CTRL5_ODR_100_HZ

#define ACCELQVAR_CTRL5_ODR_100_HZ   0x80

◆ ACCELQVAR_CTRL5_ODR_12_5_HZ

#define ACCELQVAR_CTRL5_ODR_12_5_HZ   0x50

◆ ACCELQVAR_CTRL5_ODR_200_HZ

#define ACCELQVAR_CTRL5_ODR_200_HZ   0x90

◆ ACCELQVAR_CTRL5_ODR_25_HZ

#define ACCELQVAR_CTRL5_ODR_25_HZ   0x60

◆ ACCELQVAR_CTRL5_ODR_400_HZ

#define ACCELQVAR_CTRL5_ODR_400_HZ   0xA0

◆ ACCELQVAR_CTRL5_ODR_50_HZ

#define ACCELQVAR_CTRL5_ODR_50_HZ   0x70

◆ ACCELQVAR_CTRL5_ODR_6_HZ

#define ACCELQVAR_CTRL5_ODR_6_HZ   0x40

◆ ACCELQVAR_CTRL5_ODR_800_HZ

#define ACCELQVAR_CTRL5_ODR_800_HZ   0xB0

◆ ACCELQVAR_CTRL5_ODR_ONE_SHOT_IFACE

#define ACCELQVAR_CTRL5_ODR_ONE_SHOT_IFACE   0xF0

AccelQvar CTRL5 register description bitmask.

CTRL5 register description bitmask of AccelQvar Click driver.

◆ ACCELQVAR_CTRL5_ODR_ONE_SHOT_INT2

#define ACCELQVAR_CTRL5_ODR_ONE_SHOT_INT2   0xE0

◆ ACCELQVAR_CTRL5_ODR_PWR_DOWN

#define ACCELQVAR_CTRL5_ODR_PWR_DOWN   0x00

◆ ACCELQVAR_CTRL5_ODR_ULP_1_6_HZ

#define ACCELQVAR_CTRL5_ODR_ULP_1_6_HZ   0x10

◆ ACCELQVAR_CTRL5_ODR_ULP_25_HZ

#define ACCELQVAR_CTRL5_ODR_ULP_25_HZ   0x30

◆ ACCELQVAR_CTRL5_ODR_ULP_3_HZ

#define ACCELQVAR_CTRL5_ODR_ULP_3_HZ   0x20

◆ ACCELQVAR_DEVICE_ADDRESS_GND

#define ACCELQVAR_DEVICE_ADDRESS_GND   0x18

AccelQvar device address setting.

Specified setting for device slave address selection of AccelQvar Click driver.

◆ ACCELQVAR_DEVICE_ADDRESS_VCC

#define ACCELQVAR_DEVICE_ADDRESS_VCC   0x19

◆ ACCELQVAR_IF_WAKE_UP_SOFT_PD

#define ACCELQVAR_IF_WAKE_UP_SOFT_PD   0x01

AccelQvar IF_WAKE_UP register description bitmask.

IF_WAKE_UP register description bitmask of AccelQvar Click driver.

◆ ACCELQVAR_QVAR_DIVIDER

#define ACCELQVAR_QVAR_DIVIDER   74.4f

AccelQvar calculation data value.

Calculation data value of AccelQvar Click driver.

◆ ACCELQVAR_SENSITIVITY_FS_16G

#define ACCELQVAR_SENSITIVITY_FS_16G   0.488f

◆ ACCELQVAR_SENSITIVITY_FS_2G

#define ACCELQVAR_SENSITIVITY_FS_2G   0.061f

AccelQvar full scale sensitivity data value.

Full scale sensitivity data value of AccelQvar Click driver.

◆ ACCELQVAR_SENSITIVITY_FS_4G

#define ACCELQVAR_SENSITIVITY_FS_4G   0.122f

◆ ACCELQVAR_SENSITIVITY_FS_8G

#define ACCELQVAR_SENSITIVITY_FS_8G   0.244f

◆ ACCELQVAR_SET_DATA_SAMPLE_EDGE

#define ACCELQVAR_SET_DATA_SAMPLE_EDGE   SET_SPI_DATA_SAMPLE_EDGE

Data sample selection.

This macro sets data samples for SPI modules.

Note
Available only on Microchip PIC family devices. This macro will set data sampling for all SPI modules on MCU. Can be overwritten with accelqvar_init which will set SET_SPI_DATA_SAMPLE_MIDDLE by default on the mapped mikrobus.

◆ ACCELQVAR_SET_DATA_SAMPLE_MIDDLE

#define ACCELQVAR_SET_DATA_SAMPLE_MIDDLE   SET_SPI_DATA_SAMPLE_MIDDLE

◆ ACCELQVAR_TEMP_DIVIDER

#define ACCELQVAR_TEMP_DIVIDER   355.5f

◆ ACCELQVAR_TEMP_ZERO_VAL

#define ACCELQVAR_TEMP_ZERO_VAL   25.0f

◆ ACCELQVAR_WHO_AM_I

#define ACCELQVAR_WHO_AM_I   0x47

AccelQvar device ID data value.

Device ID data value of AccelQvar Click driver.