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35 #include "drv_digital_out.h"
36 #include "drv_digital_in.h"
37 #include "drv_i2c_master.h"
38 #include "drv_spi_master.h"
61 #define NFC5_REG_IO_CFG_1 0x00
62 #define NFC5_REG_IO_CFG_2 0x01
63 #define NFC5_REG_OP_CTRL 0x02
64 #define NFC5_REG_MODE 0x03
65 #define NFC5_REG_BIT_RATE 0x04
66 #define NFC5_REG_ISO14443A_NFC 0x05
67 #define NFC5_REG_ISO14443B 0x06
68 #define NFC5_REG_ISO14443B_FELICA 0x07
69 #define NFC5_REG_PASSIVE_TARGET 0x08
70 #define NFC5_REG_STREAM_MODE 0x09
71 #define NFC5_REG_AUX 0x0A
72 #define NFC5_REG_RX_CFG_1 0x0B
73 #define NFC5_REG_RX_CFG_2 0x0C
74 #define NFC5_REG_RX_CFG_3 0x0D
75 #define NFC5_REG_RX_CFG_4 0x0E
76 #define NFC5_REG_MASK_RX_TIMER 0x0F
77 #define NFC5_REG_NO_RESPONSE_TIMER_1 0x10
78 #define NFC5_REG_NO_RESPONSE_TIMER_2 0x11
79 #define NFC5_REG_TIMER_EMV_CTRL 0x12
80 #define NFC5_REG_GPT_1 0x13
81 #define NFC5_REG_GPT_2 0x14
82 #define NFC5_REG_PPON2 0x15
83 #define NFC5_REG_IRQ_MASK_MAIN 0x16
84 #define NFC5_REG_IRQ_MASK_TIMER_NFC 0x17
85 #define NFC5_REG_IRQ_MASK_ERROR_WUP 0x18
86 #define NFC5_REG_IRQ_MASK_TARGET 0x19
87 #define NFC5_REG_IRQ_MAIN 0x1A
88 #define NFC5_REG_IRQ_TIMER_NFC 0x1B
89 #define NFC5_REG_IRQ_ERROR_WUP 0x1C
90 #define NFC5_REG_IRQ_TARGET 0x1D
91 #define NFC5_REG_FIFO_STATUS_1 0x1E
92 #define NFC5_REG_FIFO_STATUS_2 0x1F
93 #define NFC5_REG_COLLISION_STATUS 0x20
94 #define NFC5_REG_PASSIVE_TARGET_STATUS 0x21
95 #define NFC5_REG_NUM_TX_BYTES_1 0x22
96 #define NFC5_REG_NUM_TX_BYTES_2 0x23
97 #define NFC5_REG_NFCIP1_BIT_RATE 0x24
98 #define NFC5_REG_ADC_OUTPUT 0x25
99 #define NFC5_REG_ANT_TUNE_1 0x26
100 #define NFC5_REG_ANT_TUNE_2 0x27
101 #define NFC5_REG_TX_DRIVER 0x28
102 #define NFC5_REG_PT_MOD 0x29
103 #define NFC5_REG_FIELD_THLD_ACT 0x2A
104 #define NFC5_REG_FIELD_THLD_DEACT 0x2B
105 #define NFC5_REG_REGULATOR_CTRL 0x2C
106 #define NFC5_REG_RSSI_DISPLAY 0x2D
107 #define NFC5_REG_GAIN_REDUCTION_STATE 0x2E
108 #define NFC5_REG_CAP_SENSOR_CTRL 0x2F
109 #define NFC5_REG_CAP_SENSOR_DISPLAY 0x30
110 #define NFC5_REG_AUX_DISPLAY 0x31
111 #define NFC5_REG_WUP_TIMER_CTRL 0x32
112 #define NFC5_REG_AMPLITUDE_MEAS_CFG 0x33
113 #define NFC5_REG_AMPLITUDE_MEAS_REF 0x34
114 #define NFC5_REG_AMPLITUDE_MEAS_AA_DISPLAY 0x35
115 #define NFC5_REG_AMPLITUDE_MEAS_DISPLAY 0x36
116 #define NFC5_REG_PHASE_MEAS_CFG 0x37
117 #define NFC5_REG_PHASE_MEAS_REF 0x38
118 #define NFC5_REG_PHASE_MEAS_AA_DISPLAY 0x39
119 #define NFC5_REG_PHASE_MEAS_DISPLAY 0x3A
120 #define NFC5_REG_CAP_MEAS_CFG 0x3B
121 #define NFC5_REG_CAP_MEAS_REF 0x3C
122 #define NFC5_REG_CAP_MEAS_AA_DISPLAY 0x3D
123 #define NFC5_REG_CAP_MEAS_DISPLAY 0x3E
124 #define NFC5_REG_IC_IDENTITY 0x3F
130 #define NFC5_REG_SPACE_B_MASK 0x40
131 #define NFC5_REG_EMD_SUP_CFG 0x45
132 #define NFC5_REG_SUBC_START_TIME 0x46
133 #define NFC5_REG_P2P_RX_CFG 0x4B
134 #define NFC5_REG_CORR_CFG_1 0x4C
135 #define NFC5_REG_CORR_CFG_2 0x4D
136 #define NFC5_REG_SQUELCH_TIMER 0x4F
137 #define NFC5_REG_FIELD_ON_GT 0x55
138 #define NFC5_REG_AUX_MOD 0x68
139 #define NFC5_REG_TX_DRIVER_TIMING 0x69
140 #define NFC5_REG_RES_AM_MOD 0x6A
141 #define NFC5_REG_TX_DRIVER_TIMING_DISPLAY 0x6B
142 #define NFC5_REG_REGULATOR_DISPLAY 0x6C
143 #define NFC5_REG_OVERSHOOT_CFG_1 0x70
144 #define NFC5_REG_OVERSHOOT_CFG_2 0x71
145 #define NFC5_REG_UNDERSHOOT_CFG_1 0x72
146 #define NFC5_REG_UNDERSHOOT_CFG_2 0x73
152 #define NFC5_CMD_SET_DEFAULT 0xC1
153 #define NFC5_CMD_STOP 0xC2
154 #define NFC5_CMD_TRANSMIT_WITH_CRC 0xC4
155 #define NFC5_CMD_TRANSMIT_WITHOUT_CRC 0xC5
156 #define NFC5_CMD_TRANSMIT_REQA 0xC6
157 #define NFC5_CMD_TRANSMIT_WUPA 0xC7
158 #define NFC5_CMD_NFC_INITIAL_FIELD_ON 0xC8
159 #define NFC5_CMD_NFC_RESPONSE_FIELD_ON 0xC9
160 #define NFC5_CMD_GOTO_SENSE 0xCD
161 #define NFC5_CMD_GOTO_SLEEP 0xCE
162 #define NFC5_CMD_MASK_RECEIVE_DATA 0xD0
163 #define NFC5_CMD_UNMASK_RECEIVE_DATA 0xD1
164 #define NFC5_CMD_CHANGE_AM_MOD_STATE 0xD2
165 #define NFC5_CMD_MEAS_AMPLITUDE 0xD3
166 #define NFC5_CMD_RESET_RX_GAIN 0xD5
167 #define NFC5_CMD_ADJUST_REGULATORS 0xD6
168 #define NFC5_CMD_CALIBRATE_DRIVER_TIMING 0xD8
169 #define NFC5_CMD_MEAS_PHASE 0xD9
170 #define NFC5_CMD_CLEAR_RSSI 0xDA
171 #define NFC5_CMD_CLEAR_FIFO 0xDB
172 #define NFC5_CMD_TRANSPARENT_MODE 0xDC
173 #define NFC5_CMD_CALIBRATE_CAP_SENSOR 0xDD
174 #define NFC5_CMD_MEAS_CAPACITANCE 0xDE
175 #define NFC5_CMD_MEAS_POWER_SUPPLY 0xDF
176 #define NFC5_CMD_START_GP_TIMER 0xE0
177 #define NFC5_CMD_START_WUP_TIMER 0xE1
178 #define NFC5_CMD_START_MASK_RECEIVE_TIMER 0xE2
179 #define NFC5_CMD_START_NO_RESPONSE_TIMER 0xE3
180 #define NFC5_CMD_START_PPON2_TIMER 0xE4
181 #define NFC5_CMD_STOP_NO_RESPONSE_TIMER 0xE8
182 #define NFC5_CMD_SPACE_B_ACCESS 0xFB
183 #define NFC5_CMD_TEST_ACCESS 0xFC
201 #define NFC5_MODE_REG_WRITE 0x00
202 #define NFC5_MODE_REG_READ 0x40
203 #define NFC5_MODE_FIFO_LOAD 0x80
204 #define NFC5_MODE_PT_MEM_LOAD_A_CFG 0xA0
205 #define NFC5_MODE_PT_MEM_LOAD_F_CFG 0xA8
206 #define NFC5_MODE_PT_MEM_LOAD_TSN_DATA 0xAC
207 #define NFC5_MODE_PT_MEM_READ 0xBF
208 #define NFC5_MODE_FIFO_READ 0x9F
209 #define NFC5_MODE_DIRECT_COMMAND 0xC0
215 #define NFC5_IC_TYPE_CODE 0x05
216 #define NFC5_IC_REVISION_CODE_MASK 0x07
222 #define NFC5_IRQ_MASK_ALL 0xFFFFFFFFul
223 #define NFC5_IRQ_MASK_NONE 0x00000000ul
224 #define NFC5_IRQ_MASK_OSC 0x00000080ul
225 #define NFC5_IRQ_MASK_FWL 0x00000040ul
226 #define NFC5_IRQ_MASK_RXS 0x00000020ul
227 #define NFC5_IRQ_MASK_RXE 0x00000010ul
228 #define NFC5_IRQ_MASK_TXE 0x00000008ul
229 #define NFC5_IRQ_MASK_COL 0x00000004ul
230 #define NFC5_IRQ_MASK_RX_REST 0x00000002ul
231 #define NFC5_IRQ_MASK_RFU 0x00000001ul
232 #define NFC5_IRQ_MASK_DCT 0x00008000ul
233 #define NFC5_IRQ_MASK_NRE 0x00004000ul
234 #define NFC5_IRQ_MASK_GPE 0x00002000ul
235 #define NFC5_IRQ_MASK_EON 0x00001000ul
236 #define NFC5_IRQ_MASK_EOF 0x00000800ul
237 #define NFC5_IRQ_MASK_CAC 0x00000400ul
238 #define NFC5_IRQ_MASK_CAT 0x00000200ul
239 #define NFC5_IRQ_MASK_NFCT 0x00000100ul
240 #define NFC5_IRQ_MASK_CRC 0x00800000ul
241 #define NFC5_IRQ_MASK_PAR 0x00400000ul
242 #define NFC5_IRQ_MASK_ERR2 0x00200000ul
243 #define NFC5_IRQ_MASK_ERR1 0x00100000ul
244 #define NFC5_IRQ_MASK_WT 0x00080000ul
245 #define NFC5_IRQ_MASK_WAM 0x00040000ul
246 #define NFC5_IRQ_MASK_WPH 0x00020000ul
247 #define NFC5_IRQ_MASK_WCAP 0x00010000ul
248 #define NFC5_IRQ_MASK_PPON2 0x80000000ul
249 #define NFC5_IRQ_MASK_SL_WL 0x40000000ul
250 #define NFC5_IRQ_MASK_APON 0x20000000ul
251 #define NFC5_IRQ_MASK_RXE_PTA 0x10000000ul
252 #define NFC5_IRQ_MASK_WU_F 0x08000000ul
253 #define NFC5_IRQ_MASK_RFU2 0x04000000ul
254 #define NFC5_IRQ_MASK_WU_A_X 0x02000000ul
255 #define NFC5_IRQ_MASK_WU_A 0x01000000ul
261 #define NFC5_TEST_REG_INDICATOR 0x0080
262 #define NFC5_ANALOG_CONFIG_LUT_NOT_FOUND 0xFF
263 #define NFC5_ANALOG_CONFIG_BITRATE_MASK 0x00F0
264 #define NFC5_ANALOG_CONFIG_DIRECTION_MASK 0x000F
265 #define NFC5_ANALOG_CONFIG_BITRATE_SHIFT 4
266 #define NFC5_ANALOG_CONFIG_DIRECTION_SHIFT 0
267 #define NFC5_ANALOG_CONFIG_POLL 0x0000
268 #define NFC5_ANALOG_CONFIG_LISTEN 0x8000
269 #define NFC5_ANALOG_CONFIG_TECH_CHIP 0x0000
270 #define NFC5_ANALOG_CONFIG_TECH_NFCA 0x0100
271 #define NFC5_ANALOG_CONFIG_BITRATE_COMMON 0x0000
272 #define NFC5_ANALOG_CONFIG_BITRATE_106 0x0010
273 #define NFC5_ANALOG_CONFIG_TX 0x0001
274 #define NFC5_ANALOG_CONFIG_RX 0x0002
275 #define NFC5_ANALOG_CONFIG_ANTICOL 0x0003
276 #define NFC5_ANALOG_CONFIG_CHIP_INIT 0x0000
277 #define NFC5_ANALOG_CONFIG_CHIP_DEINIT 0x0001
278 #define NFC5_ANALOG_CONFIG_CHIP_FIELD_ON 0x0002
279 #define NFC5_ANALOG_CONFIG_CHIP_FIELD_OFF 0x0003
280 #define NFC5_ANALOG_CONFIG_CHIP_POLL_COMMON 0x0008
286 #define NFC5_1FC_IN_4096FC 4096u
287 #define NFC5_1FC_IN_512FC 512u
288 #define NFC5_1FC_IN_64FC 64u
289 #define NFC5_1FC_IN_8FC 8u
290 #define NFC5_US_IN_MS 1000u
291 #define NFC5_1MS_IN_1FC 13560u
292 #define NFC5_BITS_IN_BYTE 8u
293 #define NFC5_CRC_LEN 2u
295 #define NFC5_RFAL_CONV_1FC_TO_64FC( T ) ( uint32_t ) ( ( uint32_t ) ( T ) / NFC5_1FC_IN_64FC )
297 #define NFC5_RFAL_CONV_64FC_TO_1FC( T ) ( uint32_t ) ( ( uint32_t ) ( T ) * NFC5_1FC_IN_64FC )
299 #define NFC5_RFAL_CONV_BITS_TO_BYTES( N ) ( uint16_t ) ( ( ( uint16_t ) ( N )+ ( NFC5_BITS_IN_BYTE-1u ) ) \
300 / ( NFC5_BITS_IN_BYTE ) )
302 #define NFC5_RFAL_CONV_BYTES_TO_BITS( N ) ( uint32_t ) ( ( uint32_t) ( N ) * ( NFC5_BITS_IN_BYTE ) )
304 #define NFC5_RFAL_CONV_1FC_TO_4096FC( T ) ( uint32_t ) ( ( uint32_t) ( T ) / NFC5_1FC_IN_4096FC )
306 #define NFC5_RFAL_CONV_4096FC_TO_1FC( T ) ( uint32_t ) ( ( uint32_t) ( T ) * NFC5_1FC_IN_4096FC )
308 #define NFC5_RFAL_CONV_1FC_TO_MS( T ) ( uint32_t ) ( ( uint32_t) ( T ) / NFC5_1MS_IN_1FC )
310 #define NFC5_RFAL_CONV_MS_TO_1FC( T ) ( uint32_t ) ( ( uint32_t) ( T ) * NFC5_1MS_IN_1FC )
312 #define NFC5_FWT_NONE 0xFFFFFFFFul
314 #define NFC5_FWT_ADJUSTMENT 64u
316 #define NFC5_FWT_A_ADJUSTMENT ( 512u + 64u )
318 #define NFC5_NRT_MAX_1FC NFC5_RFAL_CONV_4096FC_TO_1FC( 0xFFFFu )
320 #define NFC5_MRT_MIN_1FC NFC5_RFAL_CONV_64FC_TO_1FC( 0x0004u )
322 #define NFC5_NRT_DISABLED 0u
324 #define NFC5_NRT_MAX 0xFFFFu
326 #define NFC5_RFAL_CALC_NUM_BYTES( NBITS ) ( ( ( uint32_t )( NBITS ) + 7u ) / 8u )
341 #define NFC5_RFAL_CREATE_BYTE_FLAGS_TX_RX_CONTEXT( CTX, TB, TBL, RB, RBL, RDL, FL, T ) \
342 ( CTX ).tx_buf = ( uint8_t* ) ( TB ); \
343 ( CTX ).tx_buf_len = ( uint16_t) NFC5_RFAL_CONV_BYTES_TO_BITS ( TBL ); \
344 ( CTX ).rx_buf = ( uint8_t* ) ( RB ); \
345 ( CTX ).rx_buf_len = ( uint16_t ) NFC5_RFAL_CONV_BYTES_TO_BITS ( RBL ); \
346 ( CTX ).rx_rcvd_len = ( uint16_t* ) ( RDL ); \
347 ( CTX ).flags = ( uint32_t ) ( FL ); \
348 ( CTX ).fwt = ( uint32_t ) ( T );
354 #define NFC5_NFCA_CASCADE_1_UID_LEN 4u
355 #define NFC5_NFCA_CASCADE_2_UID_LEN 7u
356 #define NFC5_NFCA_CASCADE_3_UID_LEN 10u
357 #define NFC5_NFC_MAX_DEVICES 5u
358 #define NFC5_THLD_DO_NOT_SET 0xFFu
363 #define NFC5_NFCA_FDTMIN 1620u
366 #define NFC5_RFAL_NFCA_CLN2_SEL_CMD( CL ) ( uint8_t )( ( uint8_t )( NFC5_NFCA_CMD_SEL_CL1 ) + ( 2u * ( CL ) ) )
369 #define NFC5_RFAL_NFCA_SEL_PAR( NBY, NBI ) ( uint8_t )( ( ( ( NBY ) << 4u ) & 0xF0u ) | ( ( NBI ) &0x0Fu ) )
370 #define NFC5_RFAL_NFCA_NFC_ID_LEN_2CL( LEN ) ( ( LEN ) / 5u )
371 #define NFC5_NFCA_SLP_FWT NFC5_RFAL_CONV_MS_TO_1FC ( 1 )
372 #define NFC5_NFCA_SLP_CMD 0x50u
373 #define NFC5_NFCA_SLP_BYTE2 0x00u
374 #define NFC5_NFCA_SLP_CMD_POS 0u
375 #define NFC5_NFCA_SLP_BYTE2_POS 1u
376 #define NFC5_NFCA_SDD_CT 0x88u
377 #define NFC5_NFCA_SDD_CT_LEN 1u
378 #define NFC5_NFCA_SLP_REQ_LEN 2u
379 #define NFC5_NFCA_SEL_CMD_LEN 1u
380 #define NFC5_NFCA_SEL_PAR_LEN 1u
381 #define NFC5_NFCA_SEL_SELPAR NFC5_RFAL_NFCA_SEL_PAR( 7u, 0u )
382 #define NFC5_NFCA_BCC_LEN 1u
383 #define NFC5_NFCA_SDD_REQ_LEN ( NFC5_NFCA_SEL_CMD_LEN + NFC5_NFCA_SEL_PAR_LEN )
384 #define NFC5_NFCA_SDD_RES_LEN ( NFC5_NFCA_CASCADE_1_UID_LEN + NFC5_NFCA_BCC_LEN )
385 #define NFC5_NFCA_N_RETRANS 2u
386 #define NFC5_ISO14443A_SDD_RES_LEN 5u
388 #define NFC5_TXRX_FLAGS_DEFAULT ( ( uint32_t ) NFC5_TXRX_FLAGS_CRC_TX_AUTO | ( uint32_t ) NFC5_TXRX_FLAGS_CRC_RX_REMV | \
389 ( uint32_t ) NFC5_TXRX_FLAGS_NFCIP1_OFF | ( uint32_t ) NFC5_TXRX_FLAGS_AGC_ON | \
390 ( uint32_t ) NFC5_TXRX_FLAGS_PAR_RX_REMV | ( uint32_t ) NFC5_TXRX_FLAGS_PAR_TX_AUTO | \
391 ( uint32_t ) NFC5_TXRX_FLAGS_NFCV_FLAG_AUTO )
397 #define NFC5_FIFO_DEPTH 512u
398 #define NFC5_FIFO_STATUS_REG1 0u
399 #define NFC5_FIFO_STATUS_REG2 1u
400 #define NFC5_FIFO_STATUS_INVALID 0xFFu
401 #define NFC5_FIFO_IN_WL 200u
402 #define NFC5_FIFO_OUT_WL ( NFC5_FIFO_DEPTH - NFC5_FIFO_IN_WL )
409 #define NFC5_IO_CFG_1_SINGLE ( 1u << 7 )
410 #define NFC5_IO_CFG_1_RFO2 ( 1u << 6 )
411 #define NFC5_IO_CFG_1_I2C_THD1 ( 1u << 5 )
412 #define NFC5_IO_CFG_1_I2C_THD0 ( 1u << 4 )
413 #define NFC5_IO_CFG_1_I2C_THD_MASK ( 3u << 4 )
414 #define NFC5_IO_CFG_1_I2C_THD_SHIFT ( 4u )
415 #define NFC5_IO_CFG_1_RFU ( 1u << 3 )
416 #define NFC5_IO_CFG_1_OUT_CL1 ( 1u << 2 )
417 #define NFC5_IO_CFG_1_OUT_CL0 ( 1u << 1 )
418 #define NFC5_IO_CFG_1_OUT_CL_DISABLED ( 3u << 1 )
419 #define NFC5_IO_CFG_1_OUT_CL_13_56MHZ ( 2u << 1 )
420 #define NFC5_IO_CFG_1_OUT_CL_4_78MHZ ( 1u << 1 )
421 #define NFC5_IO_CFG_1_OUT_CL_3_39MHZ ( 0u << 1 )
422 #define NFC5_IO_CFG_1_OUT_CL_MASK ( 3u << 1 )
423 #define NFC5_IO_CFG_1_OUT_CL_SHIFT ( 1u )
424 #define NFC5_IO_CFG_1_LF_CLK_OFF ( 1u << 0 )
425 #define NFC5_IO_CFG_1_LF_CLK_OFF_ON ( 1u << 0 )
426 #define NFC5_IO_CFG_1_LF_CLK_OFF_OFF ( 0u << 0 )
427 #define NFC5_IO_CFG_2_SUP3V ( 1u << 7 )
428 #define NFC5_IO_CFG_2_SUP3V_3V ( 1u << 7 )
429 #define NFC5_IO_CFG_2_SUP3V_5V ( 0u << 7 )
430 #define NFC5_IO_CFG_2_VSPD_OFF ( 1u << 6 )
431 #define NFC5_IO_CFG_2_AAT_EN ( 1u << 5 )
432 #define NFC5_IO_CFG_2_MISO_PD2 ( 1u << 4 )
433 #define NFC5_IO_CFG_2_MISO_PD1 ( 1u << 3 )
434 #define NFC5_IO_CFG_2_IO_DRV_LVL ( 1u << 2 )
435 #define NFC5_IO_CFG_2_SLOW_UP ( 1u << 0 )
436 #define NFC5_ISO14443A_NFC_NO_TX_PAR ( 1u << 7 )
437 #define NFC5_ISO14443A_NFC_NO_TX_PAR_OFF ( 0u << 7 )
438 #define NFC5_ISO14443A_NFC_NO_RX_PAR ( 1u << 6 )
439 #define NFC5_ISO14443A_NFC_NO_RX_PAR_OFF ( 0u << 6 )
440 #define NFC5_ISO14443A_NFC_NFC_F0 ( 1u << 5 )
441 #define NFC5_ISO14443A_NFC_NFC_F0_OFF ( 0u << 5 )
442 #define NFC5_ISO14443A_NFC_P_LEN3 ( 1u << 4 )
443 #define NFC5_ISO14443A_NFC_P_LEN2 ( 1u << 3 )
444 #define NFC5_ISO14443A_NFC_P_LEN1 ( 1u << 2 )
445 #define NFC5_ISO14443A_NFC_P_LEN0 ( 1u << 1 )
446 #define NFC5_ISO14443A_NFC_P_LEN_MASK ( 0xFu << 1 )
447 #define NFC5_ISO14443A_NFC_P_LEN_SHIFT ( 1u )
448 #define NFC5_ISO14443A_NFC_ANTCL ( 1u << 0 )
449 #define NFC5_RX_CFG_2_DEMOD_MODE ( 1u << 7 )
450 #define NFC5_RX_CFG_2_AMD_SEL ( 1u << 6 )
451 #define NFC5_RX_CFG_2_AMD_SEL_MIXER ( 1u << 6 )
452 #define NFC5_RX_CFG_2_AMD_SEL_PEAK ( 0u << 6 )
453 #define NFC5_RX_CFG_2_SQM_DYN ( 1u << 5 )
454 #define NFC5_RX_CFG_2_PULZ_61 ( 1u << 4 )
455 #define NFC5_RX_CFG_2_AGC_EN ( 1u << 3 )
456 #define NFC5_RX_CFG_2_AGC_M ( 1u << 2 )
457 #define NFC5_RX_CFG_2_AGC_ALG ( 1u << 1 )
458 #define NFC5_RX_CFG_2_AGC6_3 ( 1u << 0 )
459 #define NFC5_OP_CTRL_EN ( 1u << 7 )
460 #define NFC5_OP_CTRL_RX_EN ( 1u << 6 )
461 #define NFC5_OP_CTRL_RX_CHN ( 1u << 5 )
462 #define NFC5_OP_CTRL_RX_MAN ( 1u << 4 )
463 #define NFC5_OP_CTRL_TX_EN ( 1u << 3 )
464 #define NFC5_OP_CTRL_WU ( 1u << 2 )
465 #define NFC5_OP_CTRL_EN_FD_C1 ( 1u << 1 )
466 #define NFC5_OP_CTRL_EN_FD_C0 ( 1u << 0 )
467 #define NFC5_OP_CTRL_EN_FD_EFD_OFF ( 0u << 0 )
468 #define NFC5_OP_CTRL_EN_FD_MANUAL_EFD_CA ( 1u << 0 )
469 #define NFC5_OP_CTRL_EN_FD_MANUAL_EFD_PDT ( 2u << 0 )
470 #define NFC5_OP_CTRL_EN_FD_AUTO_EFD ( 3u << 0 )
471 #define NFC5_OP_CTRL_EN_FD_SHIFT ( 0u )
472 #define NFC5_OP_CTRL_EN_FD_MASK ( 3u << 0 )
473 #define NFC5_NFCIP1_BIT_RATE_NFC_RFU1 ( 1u << 7 )
474 #define NFC5_NFCIP1_BIT_RATE_NFC_RFU0 ( 1u << 6 )
475 #define NFC5_NFCIP1_BIT_RATE_NFC_RATE1 ( 1u << 5 )
476 #define NFC5_NFCIP1_BIT_RATE_NFC_RATE0 ( 1u << 4 )
477 #define NFC5_NFCIP1_BIT_RATE_NFC_RATE_MASK ( 0x3u << 4 )
478 #define NFC5_NFCIP1_BIT_RATE_NFC_RATE_SHIFT ( 4u )
479 #define NFC5_NFCIP1_BIT_RATE_PPT2_ON ( 1u << 3 )
480 #define NFC5_NFCIP1_BIT_RATE_GPT_ON ( 1u << 2 )
481 #define NFC5_NFCIP1_BIT_RATE_NRT_ON ( 1u << 1 )
482 #define NFC5_NFCIP1_BIT_RATE_MRT_ON ( 1u << 0 )
483 #define NFC5_AUX_DISPLAY_A_CHA ( 1u << 7 )
484 #define NFC5_AUX_DISPLAY_EFD_O ( 1u << 6 )
485 #define NFC5_AUX_DISPLAY_TX_ON ( 1u << 5 )
486 #define NFC5_AUX_DISPLAY_OSC_OK ( 1u << 4 )
487 #define NFC5_AUX_DISPLAY_RX_ON ( 1u << 3 )
488 #define NFC5_AUX_DISPLAY_RX_ACT ( 1u << 2 )
489 #define NFC5_AUX_DISPLAY_EN_PEER ( 1u << 1 )
490 #define NFC5_AUX_DISPLAY_EN_AC ( 1u << 0 )
491 #define NFC5_FIFO_STATUS2_FIFO_B9 ( 1u << 7 )
492 #define NFC5_FIFO_STATUS2_FIFO_B8 ( 1u << 6 )
493 #define NFC5_FIFO_STATUS2_FIFO_B_MASK ( 3u << 6 )
494 #define NFC5_FIFO_STATUS2_FIFO_B_SHIFT ( 6u )
495 #define NFC5_FIFO_STATUS2_FIFO_UNF ( 1u << 5 )
496 #define NFC5_FIFO_STATUS2_FIFO_OVR ( 1u << 4 )
497 #define NFC5_FIFO_STATUS2_FIFO_LB2 ( 1u << 3 )
498 #define NFC5_FIFO_STATUS2_FIFO_LB1 ( 1u << 2 )
499 #define NFC5_FIFO_STATUS2_FIFO_LB0 ( 1u << 1 )
500 #define NFC5_FIFO_STATUS2_FIFO_LB_MASK ( 7u << 1 )
501 #define NFC5_FIFO_STATUS2_FIFO_LB_SHIFT ( 1u )
502 #define NFC5_FIFO_STATUS2_NP_LB ( 1u << 0 )
503 #define NFC5_MODE_TARG ( 1u << 7 )
504 #define NFC5_MODE_TARG_TARG ( 1u << 7 )
505 #define NFC5_MODE_TARG_INIT ( 0u << 7 )
506 #define NFC5_MODE_OM3 ( 1u << 6 )
507 #define NFC5_MODE_OM2 ( 1u << 5 )
508 #define NFC5_MODE_OM1 ( 1u << 4 )
509 #define NFC5_MODE_OM0 ( 1u << 3 )
510 #define NFC5_MODE_OM_BPSK_STREAM ( 0xFu << 3 )
511 #define NFC5_MODE_OM_SUBCARRIER_STREAM ( 0xEu << 3 )
512 #define NFC5_MODE_OM_TOPAZ ( 0x4u << 3 )
513 #define NFC5_MODE_OM_FELICA ( 0x3u << 3 )
514 #define NFC5_MODE_OM_ISO14443B ( 0x2u << 3 )
515 #define NFC5_MODE_OM_ISO14443A ( 0x1u << 3 )
516 #define NFC5_MODE_OM_TARG_NFCA ( 0x1u << 3 )
517 #define NFC5_MODE_OM_TARG_NFCB ( 0x2u << 3 )
518 #define NFC5_MODE_OM_TARG_NFCF ( 0x4u << 3 )
519 #define NFC5_MODE_OM_TARG_NFCIP ( 0x7u << 3 )
520 #define NFC5_MODE_OM_NFC ( 0x0u << 3 )
521 #define NFC5_MODE_OM_MASK ( 0xFu << 3 )
522 #define NFC5_MODE_OM_SHIFT ( 3u )
523 #define NFC5_MODE_TR_AM ( 1u << 2 )
524 #define NFC5_MODE_TR_AM_OOK ( 0u << 2 )
525 #define NFC5_MODE_TR_AM_AM ( 1u << 2 )
526 #define NFC5_MODE_NFC_AR1 ( 1u << 1 )
527 #define NFC5_MODE_NFC_AR0 ( 1u << 0 )
528 #define NFC5_MODE_NFC_AR_OFF ( 0u << 0 )
529 #define NFC5_MODE_NFC_AR_AUTO_RX ( 1u << 0 )
530 #define NFC5_MODE_NFC_AR_EOF ( 2u << 0 )
531 #define NFC5_MODE_NFC_AR_RFU ( 3u << 0 )
532 #define NFC5_MODE_NFC_AR_MASK ( 3u << 0 )
533 #define NFC5_MODE_NFC_AR_SHIFT ( 0u )
534 #define NFC5_BIT_RATE_TXRATE_106 ( 0x0u << 4 )
535 #define NFC5_BIT_RATE_TXRATE_212 ( 0x1u << 4 )
536 #define NFC5_BIT_RATE_TXRATE_424 ( 0x2u << 4 )
537 #define NFC5_BIT_RATE_TXRATE_848 ( 0x3u << 4 )
538 #define NFC5_BIT_RATE_TXRATE_MASK ( 0x3u << 4 )
539 #define NFC5_BIT_RATE_TXRATE_SHIFT ( 4u )
540 #define NFC5_BIT_RATE_RXRATE_106 ( 0x0u << 0 )
541 #define NFC5_BIT_RATE_RXRATE_212 ( 0x1u << 0 )
542 #define NFC5_BIT_RATE_RXRATE_424 ( 0x2u << 0 )
543 #define NFC5_BIT_RATE_RXRATE_848 ( 0x3u << 0 )
544 #define NFC5_BIT_RATE_RXRATE_MASK ( 0x3u << 0 )
545 #define NFC5_BIT_RATE_RXRATE_SHIFT ( 0u )
546 #define NFC5_AUX_MOD_DIS_REG_AM ( 1u << 7 )
547 #define NFC5_AUX_MOD_LM_EXT_POL ( 1u << 6 )
548 #define NFC5_AUX_MOD_LM_EXT ( 1u << 5 )
549 #define NFC5_AUX_MOD_LM_DRI ( 1u << 4 )
550 #define NFC5_AUX_MOD_RES_AM ( 1u << 3 )
551 #define NFC5_AUX_MOD_RFU2 ( 1u << 2 )
552 #define NFC5_AUX_MOD_RFU1 ( 1u << 1 )
553 #define NFC5_AUX_MOD_RFU0 ( 1u << 0 )
554 #define NFC5_PASSIVE_TARGET_FDEL_3 ( 1u << 7 )
555 #define NFC5_PASSIVE_TARGET_FDEL_2 ( 1u << 6 )
556 #define NFC5_PASSIVE_TARGET_FDEL_1 ( 1u << 5 )
557 #define NFC5_PASSIVE_TARGET_FDEL_0 ( 1u << 4 )
558 #define NFC5_PASSIVE_TARGET_FDEL_MASK ( 0xFu << 4 )
559 #define NFC5_PASSIVE_TARGET_FDEL_SHIFT ( 4u )
560 #define NFC5_PASSIVE_TARGET_D_AC_AP2P ( 1u << 3 )
561 #define NFC5_PASSIVE_TARGET_D_212_424_1R ( 1u << 2 )
562 #define NFC5_PASSIVE_TARGET_RFU ( 1u << 1 )
563 #define NFC5_PASSIVE_TARGET_D_106_AC_A ( 1u << 0 )
564 #define NFC5_PT_MOD_PTM_RES3 ( 1u << 7 )
565 #define NFC5_PT_MOD_PTM_RES2 ( 1u << 6 )
566 #define NFC5_PT_MOD_PTM_RES1 ( 1u << 5 )
567 #define NFC5_PT_MOD_PTM_RES0 ( 1u << 4 )
568 #define NFC5_PT_MOD_PTM_RES_MASK ( 0xFu << 4 )
569 #define NFC5_PT_MOD_PTM_RES_SHIFT ( 4u )
570 #define NFC5_PT_MOD_PT_RES3 ( 1u << 3 )
571 #define NFC5_PT_MOD_PT_RES2 ( 1u << 2 )
572 #define NFC5_PT_MOD_PT_RES1 ( 1u << 1 )
573 #define NFC5_PT_MOD_PT_RES0 ( 1u << 0 )
574 #define NFC5_PT_MOD_PT_RES_MASK ( 0xFu << 0 )
575 #define NFC5_PT_MOD_PT_RES_SHIFT ( 0u )
576 #define NFC5_EMD_SUP_CFG_EMD_EMV ( 1u << 7 )
577 #define NFC5_EMD_SUP_CFG_EMD_EMV_ON ( 1u << 7 )
578 #define NFC5_EMD_SUP_CFG_EMD_EMV_OFF ( 0u << 7 )
579 #define NFC5_EMD_SUP_CFG_RX_START_EMV ( 1u << 6 )
580 #define NFC5_EMD_SUP_CFG_RX_START_EMV_ON ( 1u << 6 )
581 #define NFC5_EMD_SUP_CFG_RX_START_EMV_OFF ( 0u << 6 )
582 #define NFC5_EMD_SUP_CFG_RFU1 ( 1u << 5 )
583 #define NFC5_EMD_SUP_CFG_RFU0 ( 1u << 4 )
584 #define NFC5_EMD_SUP_CFG_EMD_THLD3 ( 1u << 3 )
585 #define NFC5_EMD_SUP_CFG_EMD_THLD2 ( 1u << 2 )
586 #define NFC5_EMD_SUP_CFG_EMD_THLD1 ( 1u << 1 )
587 #define NFC5_EMD_SUP_CFG_EMD_THLD0 ( 1u << 0 )
588 #define NFC5_EMD_SUP_CFG_EMD_THLD_MASK ( 0xFu << 0 )
589 #define NFC5_EMD_SUP_CFG_EMD_THLD_SHIFT ( 0u )
590 #define NFC5_AUX_NO_CRC_RX ( 1u << 7 )
591 #define NFC5_AUX_RFU ( 1u << 6 )
592 #define NFC5_AUX_NFC_ID1 ( 1u << 5 )
593 #define NFC5_AUX_NFC_ID0 ( 1u << 4 )
594 #define NFC5_AUX_NFC_ID_7BYTES ( 1u << 4 )
595 #define NFC5_AUX_NFC_ID_4BYTES ( 0u << 4 )
596 #define NFC5_AUX_NFC_ID_MASK ( 3u << 4 )
597 #define NFC5_AUX_NFC_ID_SHIFT ( 4u )
598 #define NFC5_AUX_MFAZ_CL90 ( 1u << 3 )
599 #define NFC5_AUX_DIS_CORR ( 1u << 2 )
600 #define NFC5_AUX_DIS_CORR_COHERENT ( 1u << 2 )
601 #define NFC5_AUX_DIS_CORR_CORRELATOR ( 0u << 2 )
602 #define NFC5_AUX_NFC_N1 ( 1u << 1 )
603 #define NFC5_AUX_NFC_N0 ( 1u << 0 )
604 #define NFC5_AUX_NFC_N_MASK ( 3u << 0 )
605 #define NFC5_AUX_NFC_N_SHIFT ( 0u )
606 #define NFC5_TIMER_EMV_CONTROL_GPTC2 ( 1u << 7 )
607 #define NFC5_TIMER_EMV_CONTROL_GPTC1 ( 1u << 6 )
608 #define NFC5_TIMER_EMV_CONTROL_GPTC0 ( 1u << 5 )
609 #define NFC5_TIMER_EMV_CONTROL_GPTC_NO_TRIGGER ( 0u << 5 )
610 #define NFC5_TIMER_EMV_CONTROL_GPTC_ERX ( 1u << 5 )
611 #define NFC5_TIMER_EMV_CONTROL_GPTC_SRX ( 2u << 5 )
612 #define NFC5_TIMER_EMV_CONTROL_GPTC_ETX_NFC ( 3u << 5 )
613 #define NFC5_TIMER_EMV_CONTROL_GPTC_MASK ( 7u << 5 )
614 #define NFC5_TIMER_EMV_CONTROL_GPTC_SHIFT ( 5u )
615 #define NFC5_TIMER_EMV_CONTROL_RFU ( 1u << 4 )
616 #define NFC5_TIMER_EMV_CONTROL_MRT_STEP ( 1u << 3 )
617 #define NFC5_TIMER_EMV_CONTROL_MRT_STEP_512 ( 1u << 3 )
618 #define NFC5_TIMER_EMV_CONTROL_MRT_STEP_64 ( 0u << 3 )
619 #define NFC5_TIMER_EMV_CONTROL_NRT_NFC ( 1u << 2 )
620 #define NFC5_TIMER_EMV_CONTROL_NRT_NFC_ON ( 1u << 2 )
621 #define NFC5_TIMER_EMV_CONTROL_NRT_NFC_OFF ( 0u << 2 )
622 #define NFC5_TIMER_EMV_CONTROL_NRT_EMV ( 1u << 1 )
623 #define NFC5_TIMER_EMV_CONTROL_NRT_EMV_ON ( 1u << 1 )
624 #define NFC5_TIMER_EMV_CONTROL_NRT_EMV_OFF ( 0u << 1 )
625 #define NFC5_TIMER_EMV_CONTROL_NRT_STEP ( 1u << 0 )
626 #define NFC5_TIMER_EMV_CONTROL_NRT_STEP_64FC ( 0u << 0 )
627 #define NFC5_TIMER_EMV_CONTROL_NRT_STEP_4096_FC ( 1u << 0 )
628 #define NFC5_COLLISION_STATUS_C_BYTE3 ( 1u << 7 )
629 #define NFC5_COLLISION_STATUS_C_BYTE2 ( 1u << 6 )
630 #define NFC5_COLLISION_STATUS_C_BYTE1 ( 1u << 5 )
631 #define NFC5_COLLISION_STATUS_C_BYTE0 ( 1u << 4 )
632 #define NFC5_COLLISION_STATUS_C_BYTE_MASK ( 0xFu << 4 )
633 #define NFC5_COLLISION_STATUS_C_BYTE_SHIFT ( 4u )
634 #define NFC5_COLLISION_STATUS_C_BIT2 ( 1u << 3 )
635 #define NFC5_COLLISION_STATUS_C_BIT1 ( 1u << 2 )
636 #define NFC5_COLLISION_STATUS_C_BIT0 ( 1u << 1 )
637 #define NFC5_COLLISION_STATUS_C_PB ( 1u << 0 )
638 #define NFC5_COLLISION_STATUS_C_BIT_MASK ( 3u << 1 )
639 #define NFC5_COLLISION_STATUS_C_BIT_SHIFT ( 1u )
640 #define NFC5_CORR_CFG_1_CORR_S7 ( 1u << 7 )
641 #define NFC5_CORR_CFG_1_CORR_S6 ( 1u << 6 )
642 #define NFC5_CORR_CFG_1_CORR_S5 ( 1u << 5 )
643 #define NFC5_CORR_CFG_1_CORR_S4 ( 1u << 4 )
644 #define NFC5_CORR_CFG_1_CORR_S3 ( 1u << 3 )
645 #define NFC5_CORR_CFG_1_CORR_S2 ( 1u << 2 )
646 #define NFC5_CORR_CFG_1_CORR_S1 ( 1u << 1 )
647 #define NFC5_CORR_CFG_1_CORR_S0 ( 1u << 0 )
648 #define NFC5_TX_DRIVER_AM_MOD3 ( 1u << 7 )
649 #define NFC5_TX_DRIVER_AM_MOD2 ( 1u << 6 )
650 #define NFC5_TX_DRIVER_AM_MOD1 ( 1u << 5 )
651 #define NFC5_TX_DRIVER_AM_MOD0 ( 1u << 4 )
652 #define NFC5_TX_DRIVER_AM_MOD_5PERCENT ( 0x0u << 4 )
653 #define NFC5_TX_DRIVER_AM_MOD_6PERCENT ( 0x1u << 4 )
654 #define NFC5_TX_DRIVER_AM_MOD_7PERCENT ( 0x2u << 4 )
655 #define NFC5_TX_DRIVER_AM_MOD_8PERCENT ( 0x3u << 4 )
656 #define NFC5_TX_DRIVER_AM_MOD_9PERCENT ( 0x4u << 4 )
657 #define NFC5_TX_DRIVER_AM_MOD_10PERCENT ( 0x5u << 4 )
658 #define NFC5_TX_DRIVER_AM_MOD_11PERCENT ( 0x6u << 4 )
659 #define NFC5_TX_DRIVER_AM_MOD_12PERCENT ( 0x7u << 4 )
660 #define NFC5_TX_DRIVER_AM_MOD_13PERCENT ( 0x8u << 4 )
661 #define NFC5_TX_DRIVER_AM_MOD_14PERCENT ( 0x9u << 4 )
662 #define NFC5_TX_DRIVER_AM_MOD_15PERCENT ( 0xAu << 4 )
663 #define NFC5_TX_DRIVER_AM_MOD_17PERCENT ( 0xBu << 4 )
664 #define NFC5_TX_DRIVER_AM_MOD_19PERCENT ( 0xCu << 4 )
665 #define NFC5_TX_DRIVER_AM_MOD_22PERCENT ( 0xDu << 4 )
666 #define NFC5_TX_DRIVER_AM_MOD_26PERCENT ( 0xEu << 4 )
667 #define NFC5_TX_DRIVER_AM_MOD_40PERCENT ( 0xFu << 4 )
668 #define NFC5_TX_DRIVER_AM_MOD_MASK ( 0xFu << 4 )
669 #define NFC5_TX_DRIVER_AM_MOD_SHIFT ( 4u )
670 #define NFC5_TX_DRIVER_D_RES3 ( 1u << 3 )
671 #define NFC5_TX_DRIVER_D_RES2 ( 1u << 2 )
672 #define NFC5_TX_DRIVER_D_RES1 ( 1u << 1 )
673 #define NFC5_TX_DRIVER_D_RES0 ( 1u << 0 )
674 #define NFC5_TX_DRIVER_D_RES_MASK ( 0xFu << 0 )
675 #define NFC5_TX_DRIVER_D_RES_SHIFT ( 0u )
676 #define NFC5_FIELD_THLD_ACT_TRG_L2A ( 1u << 6 )
677 #define NFC5_FIELD_THLD_ACT_TRG_L1A ( 1u << 5 )
678 #define NFC5_FIELD_THLD_ACT_TRG_L0A ( 1u << 4 )
679 #define NFC5_FIELD_THLD_ACT_TRG_75MV ( 0x0u << 4 )
680 #define NFC5_FIELD_THLD_ACT_TRG_105MV ( 0x1u << 4 )
681 #define NFC5_FIELD_THLD_ACT_TRG_150MV ( 0x2u << 4 )
682 #define NFC5_FIELD_THLD_ACT_TRG_205MV ( 0x3u << 4 )
683 #define NFC5_FIELD_THLD_ACT_TRG_290MV ( 0x4u << 4 )
684 #define NFC5_FIELD_THLD_ACT_TRG_400MV ( 0x5u << 4 )
685 #define NFC5_FIELD_THLD_ACT_TRG_560MV ( 0x6u << 4 )
686 #define NFC5_FIELD_THLD_ACT_TRG_800MV ( 0x7u << 4 )
687 #define NFC5_FIELD_THLD_ACT_TRG_MASK ( 7u << 4 )
688 #define NFC5_FIELD_THLD_ACT_TRG_SHIFT ( 4u )
689 #define NFC5_FIELD_THLD_ACT_RFE_T3A ( 1u << 3 )
690 #define NFC5_FIELD_THLD_ACT_RFE_T2A ( 1u << 2 )
691 #define NFC5_FIELD_THLD_ACT_RFE_T1A ( 1u << 1 )
692 #define NFC5_FIELD_THLD_ACT_RFE_T0A ( 1u << 0 )
693 #define NFC5_FIELD_THLD_ACT_RFE_75MV ( 0x0u << 0 )
694 #define NFC5_FIELD_THLD_ACT_RFE_105MV ( 0x1u << 0 )
695 #define NFC5_FIELD_THLD_ACT_RFE_150MV ( 0x2u << 0 )
696 #define NFC5_FIELD_THLD_ACT_RFE_205MV ( 0x3u << 0 )
697 #define NFC5_FIELD_THLD_ACT_RFE_290MV ( 0x4u << 0 )
698 #define NFC5_FIELD_THLD_ACT_RFE_400MV ( 0x5u << 0 )
699 #define NFC5_FIELD_THLD_ACT_RFE_560MV ( 0x6u << 0 )
700 #define NFC5_FIELD_THLD_ACT_RFE_800MV ( 0x7u << 0 )
701 #define NFC5_FIELD_THLD_ACT_RFE_25MV ( 0x8u << 0 )
702 #define NFC5_FIELD_THLD_ACT_RFE_33MV ( 0x9u << 0 )
703 #define NFC5_FIELD_THLD_ACT_RFE_47MV ( 0xAu << 0 )
704 #define NFC5_FIELD_THLD_ACT_RFE_64MV ( 0xBu << 0 )
705 #define NFC5_FIELD_THLD_ACT_RFE_90MV ( 0xCu << 0 )
706 #define NFC5_FIELD_THLD_ACT_RFE_125MV ( 0xDu << 0 )
707 #define NFC5_FIELD_THLD_ACT_RFE_175MV ( 0xEu << 0 )
708 #define NFC5_FIELD_THLD_ACT_RFE_250MV ( 0xFu << 0 )
709 #define NFC5_FIELD_THLD_ACT_RFE_MASK ( 0xFu << 0 )
710 #define NFC5_FIELD_THLD_ACT_RFE_SHIFT ( 0u )
711 #define NFC5_FIELD_THLD_DEACT_TRG_L2D ( 1u << 6 )
712 #define NFC5_FIELD_THLD_DEACT_TRG_L1D ( 1u << 5 )
713 #define NFC5_FIELD_THLD_DEACT_TRG_L0D ( 1u << 4 )
714 #define NFC5_FIELD_THLD_DEACT_TRG_75MV ( 0x0u << 4 )
715 #define NFC5_FIELD_THLD_DEACT_TRG_105MV ( 0x1u << 4 )
716 #define NFC5_FIELD_THLD_DEACT_TRG_150MV ( 0x2u << 4 )
717 #define NFC5_FIELD_THLD_DEACT_TRG_205MV ( 0x3u << 4 )
718 #define NFC5_FIELD_THLD_DEACT_TRG_290MV ( 0x4u << 4 )
719 #define NFC5_FIELD_THLD_DEACT_TRG_400MV ( 0x5u << 4 )
720 #define NFC5_FIELD_THLD_DEACT_TRG_560MV ( 0x6u << 4 )
721 #define NFC5_FIELD_THLD_DEACT_TRG_800MV ( 0x7u << 4 )
722 #define NFC5_FIELD_THLD_DEACT_TRG_MASK ( 7u << 4 )
723 #define NFC5_FIELD_THLD_DEACT_TRG_SHIFT ( 4u )
724 #define NFC5_FIELD_THLD_DEACT_RFE_T3D ( 1u << 3 )
725 #define NFC5_FIELD_THLD_DEACT_RFE_T2D ( 1u << 2 )
726 #define NFC5_FIELD_THLD_DEACT_RFE_T1D ( 1u << 1 )
727 #define NFC5_FIELD_THLD_DEACT_RFE_T0D ( 1u << 0 )
728 #define NFC5_FIELD_THLD_DEACT_RFE_75MV ( 0x0u << 0 )
729 #define NFC5_FIELD_THLD_DEACT_RFE_105MV ( 0x1u << 0 )
730 #define NFC5_FIELD_THLD_DEACT_RFE_150MV ( 0x2u << 0 )
731 #define NFC5_FIELD_THLD_DEACT_RFE_205MV ( 0x3u << 0 )
732 #define NFC5_FIELD_THLD_DEACT_RFE_290MV ( 0x4u << 0 )
733 #define NFC5_FIELD_THLD_DEACT_RFE_400MV ( 0x5u << 0 )
734 #define NFC5_FIELD_THLD_DEACT_RFE_560MV ( 0x6u << 0 )
735 #define NFC5_FIELD_THLD_DEACT_RFE_800MV ( 0x7u << 0 )
736 #define NFC5_FIELD_THLD_DEACT_RFE_25MV ( 0x8u << 0 )
737 #define NFC5_FIELD_THLD_DEACT_RFE_33MV ( 0x9u << 0 )
738 #define NFC5_FIELD_THLD_DEACT_RFE_47MV ( 0xAu << 0 )
739 #define NFC5_FIELD_THLD_DEACT_RFE_64MV ( 0xBu << 0 )
740 #define NFC5_FIELD_THLD_DEACT_RFE_90MV ( 0xCu << 0 )
741 #define NFC5_FIELD_THLD_DEACT_RFE_125MV ( 0xDu << 0 )
742 #define NFC5_FIELD_THLD_DEACT_RFE_175MV ( 0xEu << 0 )
743 #define NFC5_FIELD_THLD_DEACT_RFE_250MV ( 0xFu << 0 )
744 #define NFC5_FIELD_THLD_DEACT_RFE_MASK ( 0xFu << 0 )
745 #define NFC5_FIELD_THLD_DEACT_RFE_SHIFT ( 0u )
746 #define NFC5_REGULATOR_CTRL_REG_S ( 1u << 7 )
747 #define NFC5_REGULATOR_CTRL_REGE_3 ( 1u << 6 )
748 #define NFC5_REGULATOR_CTRL_REGE_2 ( 1u << 5 )
749 #define NFC5_REGULATOR_CTRL_REGE_1 ( 1u << 4 )
750 #define NFC5_REGULATOR_CTRL_REGE_0 ( 1u << 3 )
751 #define NFC5_REGULATOR_CTRL_REGE_MASK ( 0xFu << 3 )
752 #define NFC5_REGULATOR_CTRL_REGE_SHIFT ( 3u )
753 #define NFC5_REGULATOR_CTRL_MPSV2 ( 2u << 2 )
754 #define NFC5_REGULATOR_CTRL_MPSV1 ( 1u << 1 )
755 #define NFC5_REGULATOR_CTRL_MPSV0 ( 1u << 0 )
756 #define NFC5_REGULATOR_CTRL_MPSV_VDD ( 0u )
757 #define NFC5_REGULATOR_CTRL_MPSV_VDD_A ( 1u )
758 #define NFC5_REGULATOR_CTRL_MPSV_VDD_D ( 2u )
759 #define NFC5_REGULATOR_CTRL_MPSV_VDD_RF ( 3u )
760 #define NFC5_REGULATOR_CTRL_MPSV_VDD_AM ( 4u )
761 #define NFC5_REGULATOR_CTRL_RFU ( 5u )
762 #define NFC5_REGULATOR_CTRL_RFU1 ( 6u )
763 #define NFC5_REGULATOR_CTRL_RFU2 ( 7u )
764 #define NFC5_REGULATOR_CTRL_MPSV_MASK ( 7u )
765 #define NFC5_REGULATOR_CTRL_MPSV_SHIFT ( 0u )
772 #define NFC5_DEVICE_ADDRESS 0x50
782 #define NFC5_SET_DATA_SAMPLE_EDGE SET_SPI_DATA_SAMPLE_EDGE
783 #define NFC5_SET_DATA_SAMPLE_MIDDLE SET_SPI_DATA_SAMPLE_MIDDLE
801 #define NFC5_MAP_MIKROBUS( cfg, mikrobus ) \
802 cfg.scl = MIKROBUS( mikrobus, MIKROBUS_SCL ); \
803 cfg.sda = MIKROBUS( mikrobus, MIKROBUS_SDA ); \
804 cfg.miso = MIKROBUS( mikrobus, MIKROBUS_MISO ); \
805 cfg.mosi = MIKROBUS( mikrobus, MIKROBUS_MOSI ); \
806 cfg.sck = MIKROBUS( mikrobus, MIKROBUS_SCK ); \
807 cfg.cs = MIKROBUS( mikrobus, MIKROBUS_CS ); \
808 cfg.irq = MIKROBUS( mikrobus, MIKROBUS_INT )
837 const uint8_t *an_cfg_table;
838 uint16_t an_cfg_table_size;
867 uint16_t* rx_rcvd_len;
925 uint16_t bytes_total;
926 uint16_t bytes_written;
949 uint8_t anticollision_info;
950 uint8_t platform_info;
1013 uint8_t sel_dev_idx;
1018 bool is_oper_ongoing;
1061 uint8_t* nfc_id1_len;
1062 uint8_t cascade_lvl;
1064 uint8_t bytes_tx_rx;
1122 uint8_t i2c_address;
1125 spi_master_mode_t spi_mode;
1126 spi_master_chip_select_polarity_t cs_polarity;
nfc5_rfal_return_t
NFC 5 Click RFAL library return value data.
Definition: nfc5.h:1159
err_t nfc5_send_cmd(nfc5_t *ctx, uint8_t cmd)
NFC 5 send direct command function.
@ NFC5_RFAL_ERR_HW_MISMATCH
Definition: nfc5.h:1197
nfc5_rfal_nfca_t nfca
Definition: nfc5.h:1114
@ NFC5_NFCA_CR_CL
Definition: nfc5.h:1052
@ NFC5_RFAL_ERR_INVALID_HANDLE
Definition: nfc5.h:1200
@ NFC5_TXRX_FLAGS_NFCIP1_ON
Definition: nfc5.h:1223
@ NFC5_NFC_STATE_ACTIVATED
Definition: nfc5.h:1012
@ NFC5_NFCA_CR_DONE
Definition: nfc5.h:1055
err_t nfc5_modify_test_reg_bits(nfc5_t *ctx, uint8_t reg, uint8_t clr_mask, uint8_t set_mask)
NFC 5 modify test register bits function.
@ NFC5_RFAL_ERR_INCOMPLETE_BYTE_07
Definition: nfc5.h:1208
@ NFC5_TXRX_STATE_RX_WAIT_RXE
Definition: nfc5.h:906
nfc5_rfal_14443a_short_frame_cmd_t
NFC 5 Click RFAL ISO 14443A Short Frame Command values.
Definition: nfc5.h:1250
@ NFC5_TXRX_STATE_TX_WAIT_FDT
Definition: nfc5.h:896
nfc5_col_res_state_t
NFC 5 Click Colission Resolution states enum.
Definition: nfc5.h:1051
@ NFC5_NFC_STATE_POLL_COLAVOIDANCE
Definition: nfc5.h:1010
@ NFC5_TXRX_STATE_INIT
Definition: nfc5.h:892
@ NFC5_RFAL_ERR_SEMANTIC
Definition: nfc5.h:1180
@ NFC5_RFAL_ERR_NOT_IMPLEMENTED
Definition: nfc5.h:1175
NFC 5 Click configuration object.
Definition: nfc5.h:1123
@ NFC5_TXRX_STATE_TX_WAIT_GT
Definition: nfc5.h:895
err_t nfc5_init(nfc5_t *ctx, nfc5_cfg_t *cfg)
NFC 5 initialization function.
#define NFC5_NFCA_SLP_REQ_LEN
Definition: nfc5.h:389
@ NFC5_RFAL_ERR_OVERRUN
Definition: nfc5.h:1170
@ NFC5_RFAL_ERR_PAR
Definition: nfc5.h:1188
i2c_master_t i2c
Definition: nfc5.h:1100
NFC 5 Click Struct for Analog Config Look Up Table Update.
Definition: nfc5.h:847
@ NFC5_RFAL_ERR_SYNTAX
Definition: nfc5.h:1181
@ NFC5_RFAL_ERR_TIMEOUT
Definition: nfc5.h:1164
This file contains SPI specific macros, functions, etc.
@ NFC5_TXRX_STATE_TX_WAIT_TXE
Definition: nfc5.h:900
err_t nfc5_measure_voltage(nfc5_t *ctx, uint8_t mpsv_src, uint16_t *res_mv)
NFC 5 measure voltage function.
@ NFC5_TXRX_FLAGS_CRC_RX_REMV
Definition: nfc5.h:1222
spi_master_t spi
Definition: nfc5.h:1101
@ NFC5_NFCA_CR_SDD
Definition: nfc5.h:1053
@ NFC5_TXRX_STATE_TX_FAIL
Definition: nfc5.h:902
NFC 5 Click Colission Resolution context structure.
Definition: nfc5.h:1064
void nfc5_drv_interface_sel(nfc5_cfg_t *cfg, nfc5_drv_t drv_sel)
NFC 5 driver interface setup function.
@ NFC5_RFAL_ERR_IO
Definition: nfc5.h:1163
err_t nfc5_enable_osc(nfc5_t *ctx)
NFC 5 enable oscillator and regulator function.
@ NFC5_RFAL_ERR_WRONG_STATE
Definition: nfc5.h:1194
uint32_t nfc5_wait_interrupt(nfc5_t *ctx, uint32_t mask, uint32_t timeout)
NFC 5 wait for interrupt function.
@ NFC5_RFAL_ERR_NOTUNIQUE
Definition: nfc5.h:1184
@ NFC5_DRV_SEL_I2C
Definition: nfc5.h:831
@ NFC5_NFCA_SEL_CASCADE_L3
Definition: nfc5.h:1264
nfc5_rfal_trx_state_t
NFC 5 Click rfal transceive states enum.
Definition: nfc5.h:890
nfc5_an_cfg_mgmt_t an_cfg_mgmt
Definition: nfc5.h:1111
NFC 5 Click RFAL NFC device structure.
Definition: nfc5.h:994
#define NFC5_NFCA_CASCADE_3_UID_LEN
Definition: nfc5.h:365
nfc5_nfca_cmd_t
NFC 5 Click SDD_REQ (Select) request Cascade Level command values.
Definition: nfc5.h:1273
err_t nfc5_clear_reg_bits(nfc5_t *ctx, uint8_t reg, uint8_t clr_mask)
NFC 5 clear register bits function.
err_t nfc5_generic_read(nfc5_t *ctx, uint8_t reg, uint8_t *data_out, uint16_t len)
NFC 5 data reading function.
@ NFC5_RFAL_ERR_DISABLED
Definition: nfc5.h:1196
@ NFC5_14443A_SHORTFRAME_CMD_WUPA
Definition: nfc5.h:1251
err_t nfc5_write_test_register(nfc5_t *ctx, uint8_t reg, uint8_t data_in)
NFC 5 write test register function.
NFC 5 Click RFAL NFCA listen device structure.
Definition: nfc5.h:980
err_t nfc5_default_cfg(nfc5_t *ctx)
NFC 5 default configuration function.
@ NFC5_RFAL_ERR_NOMEM
Definition: nfc5.h:1161
@ NFC5_ERROR
Definition: nfc5.h:1150
@ NFC5_RFAL_ERR_INCOMPLETE_BYTE_01
Definition: nfc5.h:1202
NFC 5 Click rfal transceive context structure.
Definition: nfc5.h:872
@ NFC5_TXRX_STATE_TX_WAIT_WL
Definition: nfc5.h:898
uint32_t int_status
Definition: nfc5.h:1110
@ NFC5_TXRX_STATE_RX_READ_DATA
Definition: nfc5.h:909
@ NFC5_RFAL_ERR_INTERNAL
Definition: nfc5.h:1172
@ NFC5_RFAL_ERR_AGAIN
Definition: nfc5.h:1173
@ NFC5_NFC_STATE_DEACTIVATION
Definition: nfc5.h:1013
@ NFC5_RFAL_ERR_INCOMPLETE_BYTE_02
Definition: nfc5.h:1203
nfc5_tx_rx_flags_t
NFC 5 Click TXRX flags values.
Definition: nfc5.h:1217
@ NFC5_NFCA_CR_SEL
Definition: nfc5.h:1054
@ NFC5_TXRX_FLAGS_PAR_TX_AUTO
Definition: nfc5.h:1237
NFC 5 Click RFAL RX TX structure.
Definition: nfc5.h:921
@ NFC5_TXRX_STATE_TX_TRANSMIT
Definition: nfc5.h:897
@ NFC5_RFAL_ERR_SLEEP_REQ
Definition: nfc5.h:1193
@ NFC5_TXRX_STATE_RX_IDLE
Definition: nfc5.h:903
@ NFC5_RFAL_ERR_IGNORE
Definition: nfc5.h:1179
err_t nfc5_check_interrupts(nfc5_t *ctx)
NFC 5 check for received interrupts function.
uint8_t slave_address
Definition: nfc5.h:1103
@ NFC5_NFCA_SEL_CASCADE_L2
Definition: nfc5.h:1263
@ NFC5_RFAL_ERR_INCOMPLETE_BYTE_03
Definition: nfc5.h:1204
@ NFC5_TXRX_FLAGS_PAR_RX_REMV
Definition: nfc5.h:1233
err_t nfc5_modify_reg_bits(nfc5_t *ctx, uint8_t reg, uint8_t clr_mask, uint8_t set_mask)
NFC 5 modify register bits function.
nfc5_rfal_nfc_t nfc_dev
Definition: nfc5.h:1113
struct nfc5_s nfc5_t
NFC 5 Click context object.
@ NFC5_RFAL_ERR_INCOMPLETE_BYTE_04
Definition: nfc5.h:1205
err_t nfc5_disable_interrupt(nfc5_t *ctx, uint32_t mask)
NFC 5 disable interrupt function.
@ NFC5_TXRX_STATE_RX_WAIT_EON
Definition: nfc5.h:904
@ NFC5_RFAL_ERR_CRC
Definition: nfc5.h:1182
err_t nfc5_set_reg_bits(nfc5_t *ctx, uint8_t reg, uint8_t set_mask)
NFC 5 set register bits function.
NFC 5 Click SLP_REQ (HLTA) format structure.
Definition: nfc5.h:1285
@ NFC5_TXRX_STATE_RX_WAIT_RXS
Definition: nfc5.h:905
@ NFC5_RFAL_ERR_BUSY
Definition: nfc5.h:1162
@ NFC5_TXRX_STATE_IDLE
Definition: nfc5.h:891
@ NFC5_RFAL_ERR_SEND
Definition: nfc5.h:1178
@ NFC5_TXRX_STATE_RX_ERR_CHECK
Definition: nfc5.h:908
@ NFC5_14443A_SHORTFRAME_CMD_REQA
Definition: nfc5.h:1252
NFC 5 Click RFAL NFCA sens res structure.
Definition: nfc5.h:959
@ NFC5_RFAL_ERR_RELEASE_REQ
Definition: nfc5.h:1192
err_t nfc5_write_reg(nfc5_t *ctx, uint8_t reg, uint8_t data_in)
NFC 5 write register function.
@ NFC5_RFAL_ERR_NOTFOUND
Definition: nfc5.h:1183
NFC 5 Click RFAL NFCA sel req structure.
Definition: nfc5.h:1038
err_t nfc5_check_chip_id(nfc5_t *ctx, uint8_t *revision)
NFC 5 check chip ID function.
@ NFC5_TXRX_FLAGS_NFCV_FLAG_AUTO
Definition: nfc5.h:1240
NFC 5 Click context object.
Definition: nfc5.h:1097
@ NFC5_RFAL_ERR_PROTO
Definition: nfc5.h:1171
@ NFC5_TXRX_FLAGS_CRC_TX_AUTO
Definition: nfc5.h:1218
@ NFC5_TXRX_STATE_RX_READ_FIFO
Definition: nfc5.h:907
@ NFC5_NFC_STATE_POLL_ACTIVATION
Definition: nfc5.h:1011
@ NFC5_TXRX_STATE_RX_WAIT_EOF
Definition: nfc5.h:910
nfc5_rfal_nfc_state_t
NFC 5 Click RFAL NFC state enum.
Definition: nfc5.h:1006
@ NFC5_RFAL_ERR_LINK_LOSS
Definition: nfc5.h:1198
@ NFC5_RFAL_ERR_NOTSUPP
Definition: nfc5.h:1185
@ NFC5_TXRX_STATE_TX_DONE
Definition: nfc5.h:901
err_t nfc5_generic_write(nfc5_t *ctx, uint8_t reg, uint8_t *data_in, uint16_t len)
NFC 5 data writing function.
@ NFC5_RFAL_ERR_MEM_CORRUPT
Definition: nfc5.h:1174
@ NFC5_OK
Definition: nfc5.h:1149
err_t nfc5_read_fifo(nfc5_t *ctx, uint8_t *data_out, uint16_t len)
NFC 5 read fifo function.
nfc5_nfca_sel_t
NFC 5 Click SDD_REQ (Select) Cascade Levels values.
Definition: nfc5.h:1261
@ NFC5_NFCA_CMD_SEL_CL1
Definition: nfc5.h:1274
err_t nfc5_write_fifo(nfc5_t *ctx, uint8_t *data_in, uint16_t len)
NFC 5 write fifo function.
@ NFC5_RFAL_ERR_INCOMPLETE_BYTE_06
Definition: nfc5.h:1207
@ NFC5_TXRX_FLAGS_CRC_RX_KEEP
Definition: nfc5.h:1220
@ NFC5_RFAL_ERR_RF_COLLISION
Definition: nfc5.h:1190
@ NFC5_RFAL_ERR_INCOMPLETE_BYTE
Definition: nfc5.h:1201
err_t(* nfc5_master_io_t)(struct nfc5_s *, uint8_t, uint8_t *, uint16_t)
Definition: nfc5.h:840
@ NFC5_RFAL_ERR_NONE
Definition: nfc5.h:1160
#define NFC5_NFCA_CASCADE_1_UID_LEN
NFC 5 Click RFAL NFC macros.
Definition: nfc5.h:363
NFC 5 Click RFAL NFCA sel res structure.
Definition: nfc5.h:970
@ NFC5_RFAL_ERR_WRITE
Definition: nfc5.h:1186
@ NFC5_NFC_STATE_IDLE
Definition: nfc5.h:1008
void nfc5_cfg_setup(nfc5_cfg_t *cfg)
NFC 5 configuration object setup function.
@ NFC5_TXRX_FLAGS_NFCIP1_OFF
Definition: nfc5.h:1225
@ NFC5_RFAL_ERR_INCOMPLETE_BYTE_05
Definition: nfc5.h:1206
err_t nfc5_enable_interrupt(nfc5_t *ctx, uint32_t mask)
NFC 5 enable interrupt function.
pin_name_t chip_select
Definition: nfc5.h:1104
@ NFC5_TXRX_STATE_TX_RELOAD_FIFO
Definition: nfc5.h:899
@ NFC5_NFC_STATE_START_DISCOVERY
Definition: nfc5.h:1009
@ NFC5_RFAL_ERR_FIFO
Definition: nfc5.h:1187
nfc5_drv_t drv_sel
Definition: nfc5.h:1105
NFC 5 Click RFAL structure.
Definition: nfc5.h:947
err_t nfc5_get_mifare_tag_uid(nfc5_t *ctx, uint8_t *uid, uint8_t *uid_len)
NFC 5 get mifare tag UID function.
nfc5_drv_t
NFC 5 Click driver selector.
Definition: nfc5.h:829
@ NFC5_TXRX_FLAGS_NFCV_FLAG_MANUAL
Definition: nfc5.h:1238
NFC 5 Click RFAL NFC-A instance structure.
Definition: nfc5.h:1086
#define NFC5_NFC_MAX_DEVICES
Definition: nfc5.h:366
uint32_t nfc5_get_interrupt(nfc5_t *ctx, uint32_t mask)
NFC 5 get interrupt function.
@ NFC5_TXRX_FLAGS_AGC_ON
Definition: nfc5.h:1229
@ NFC5_TXRX_FLAGS_CRC_TX_MANUAL
Definition: nfc5.h:1219
@ NFC5_NFCA_CMD_SEL_CL3
Definition: nfc5.h:1276
nfc5_rfal_t rfal
Definition: nfc5.h:1112
@ NFC5_RFAL_ERR_REQUEST
Definition: nfc5.h:1165
NFC 5 Click RFAL NFC structure.
Definition: nfc5.h:1022
nfc5_return_value_t
NFC 5 Click return value data.
Definition: nfc5.h:1148
@ NFC5_RFAL_ERR_DONE
Definition: nfc5.h:1189
err_t nfc5_read_regs(nfc5_t *ctx, uint8_t reg, uint8_t *data_out, uint16_t len)
NFC 5 read multiple registers function.
err_t nfc5_write_regs(nfc5_t *ctx, uint8_t reg, uint8_t *data_in, uint16_t len)
NFC 5 write multiple registers function.
NFC 5 Click Struct for Analog Config Reg Address Mask values.
Definition: nfc5.h:860
@ NFC5_RFAL_ERR_FRAMING
Definition: nfc5.h:1169
err_t nfc5_send_cmd_with_res(nfc5_t *ctx, uint8_t cmd, uint8_t result_reg, uint32_t timeout, uint8_t *result)
NFC 5 send direct command with result function.
@ NFC5_TXRX_FLAGS_PAR_RX_KEEP
Definition: nfc5.h:1231
@ NFC5_RFAL_ERR_HW_OVERRUN
Definition: nfc5.h:1191
@ NFC5_RFAL_ERR_NOMSG
Definition: nfc5.h:1166
err_t nfc5_clear_interrupts(nfc5_t *ctx)
NFC 5 clear interrupts function.
@ NFC5_NFC_STATE_NOTINIT
Definition: nfc5.h:1007
err_t nfc5_read_reg(nfc5_t *ctx, uint8_t reg, uint8_t *data_out)
NFC 5 read register function.
@ NFC5_NFCA_CMD_SEL_CL2
Definition: nfc5.h:1275
@ NFC5_TXRX_FLAGS_AGC_OFF
Definition: nfc5.h:1227
nfc5_master_io_t write_f
Definition: nfc5.h:1107
@ NFC5_TXRX_STATE_RX_DONE
Definition: nfc5.h:911
@ NFC5_RFAL_ERR_PC_CORRUPT
Definition: nfc5.h:1176
@ NFC5_DRV_SEL_SPI
Definition: nfc5.h:830
err_t nfc5_read_test_register(nfc5_t *ctx, uint8_t reg, uint8_t *data_out)
NFC 5 read test register function.
@ NFC5_TXRX_STATE_TX_IDLE
Definition: nfc5.h:894
digital_in_t irq
Definition: nfc5.h:1098
@ NFC5_NFCA_SEL_CASCADE_L1
Definition: nfc5.h:1262
@ NFC5_RFAL_ERR_PARAM
Definition: nfc5.h:1167
@ NFC5_TXRX_STATE_START
Definition: nfc5.h:893
@ NFC5_TXRX_STATE_RX_FAIL
Definition: nfc5.h:912
@ NFC5_RFAL_ERR_MAX_RERUNS
Definition: nfc5.h:1195
uint8_t nfc5_get_irq_pin(nfc5_t *ctx)
NFC 5 get irq pin function.
NFC 5 Click RFAL FIFO structure.
Definition: nfc5.h:934
@ NFC5_TXRX_FLAGS_PAR_TX_NONE
Definition: nfc5.h:1235
@ NFC5_RFAL_ERR_SYSTEM
Definition: nfc5.h:1168
nfc5_master_io_t read_f
Definition: nfc5.h:1108