List of registers of 6DOF IMU 21 Click driver.
More...
List of registers of 6DOF IMU 21 Click driver.
◆ C6DOFIMU21_REG_CTRL10_C
#define C6DOFIMU21_REG_CTRL10_C 0x19 |
◆ C6DOFIMU21_REG_CTRL1_XL
#define C6DOFIMU21_REG_CTRL1_XL 0x10 |
◆ C6DOFIMU21_REG_CTRL2_G
#define C6DOFIMU21_REG_CTRL2_G 0x11 |
◆ C6DOFIMU21_REG_CTRL3_C
#define C6DOFIMU21_REG_CTRL3_C 0x12 |
◆ C6DOFIMU21_REG_CTRL4_C
#define C6DOFIMU21_REG_CTRL4_C 0x13 |
◆ C6DOFIMU21_REG_CTRL5_C
#define C6DOFIMU21_REG_CTRL5_C 0x14 |
◆ C6DOFIMU21_REG_CTRL6_C
#define C6DOFIMU21_REG_CTRL6_C 0x15 |
◆ C6DOFIMU21_REG_CTRL7_G
#define C6DOFIMU21_REG_CTRL7_G 0x16 |
◆ C6DOFIMU21_REG_CTRL8_XL
#define C6DOFIMU21_REG_CTRL8_XL 0x17 |
◆ C6DOFIMU21_REG_CTRL9_XL
#define C6DOFIMU21_REG_CTRL9_XL 0x18 |
◆ C6DOFIMU21_REG_D6D_SRC
#define C6DOFIMU21_REG_D6D_SRC 0x1D |
◆ C6DOFIMU21_REG_DEVICE_ID
#define C6DOFIMU21_REG_DEVICE_ID 0x0F |
◆ C6DOFIMU21_REG_DRDY_PULSE_CFG
#define C6DOFIMU21_REG_DRDY_PULSE_CFG 0x0B |
◆ C6DOFIMU21_REG_FIFO_CTRL1
#define C6DOFIMU21_REG_FIFO_CTRL1 0x06 |
6DOF IMU 21 description register.
Specified register for description of 6DOF IMU 21 Click driver.
◆ C6DOFIMU21_REG_FIFO_CTRL2
#define C6DOFIMU21_REG_FIFO_CTRL2 0x07 |
◆ C6DOFIMU21_REG_FIFO_CTRL3
#define C6DOFIMU21_REG_FIFO_CTRL3 0x08 |
◆ C6DOFIMU21_REG_FIFO_CTRL4
#define C6DOFIMU21_REG_FIFO_CTRL4 0x09 |
◆ C6DOFIMU21_REG_FIFO_CTRL5
#define C6DOFIMU21_REG_FIFO_CTRL5 0x0A |
◆ C6DOFIMU21_REG_FIFO_DATA_OUT_H
#define C6DOFIMU21_REG_FIFO_DATA_OUT_H 0x3F |
◆ C6DOFIMU21_REG_FIFO_DATA_OUT_L
#define C6DOFIMU21_REG_FIFO_DATA_OUT_L 0x3E |
◆ C6DOFIMU21_REG_FIFO_STATUS1
#define C6DOFIMU21_REG_FIFO_STATUS1 0x3A |
◆ C6DOFIMU21_REG_FIFO_STATUS2
#define C6DOFIMU21_REG_FIFO_STATUS2 0x3B |
◆ C6DOFIMU21_REG_FIFO_STATUS3
#define C6DOFIMU21_REG_FIFO_STATUS3 0x3C |
◆ C6DOFIMU21_REG_FIFO_STATUS4
#define C6DOFIMU21_REG_FIFO_STATUS4 0x3D |
◆ C6DOFIMU21_REG_FREE_FALL
#define C6DOFIMU21_REG_FREE_FALL 0x5D |
◆ C6DOFIMU21_REG_FUNC_SRC1
#define C6DOFIMU21_REG_FUNC_SRC1 0x53 |
◆ C6DOFIMU21_REG_G_X_OUT_H
#define C6DOFIMU21_REG_G_X_OUT_H 0x23 |
◆ C6DOFIMU21_REG_G_X_OUT_L
#define C6DOFIMU21_REG_G_X_OUT_L 0x22 |
◆ C6DOFIMU21_REG_G_Y_OUT_H
#define C6DOFIMU21_REG_G_Y_OUT_H 0x25 |
◆ C6DOFIMU21_REG_G_Y_OUT_L
#define C6DOFIMU21_REG_G_Y_OUT_L 0x24 |
◆ C6DOFIMU21_REG_G_Z_OUT_H
#define C6DOFIMU21_REG_G_Z_OUT_H 0x27 |
◆ C6DOFIMU21_REG_G_Z_OUT_L
#define C6DOFIMU21_REG_G_Z_OUT_L 0x26 |
◆ C6DOFIMU21_REG_INT0_CTRL
#define C6DOFIMU21_REG_INT0_CTRL 0x0D |
◆ C6DOFIMU21_REG_INT1_CTRL
#define C6DOFIMU21_REG_INT1_CTRL 0x0E |
◆ C6DOFIMU21_REG_INT_DUR2
#define C6DOFIMU21_REG_INT_DUR2 0x5A |
◆ C6DOFIMU21_REG_MASTER_CFG
#define C6DOFIMU21_REG_MASTER_CFG 0x1A |
◆ C6DOFIMU21_REG_MD1_CFG
#define C6DOFIMU21_REG_MD1_CFG 0x5E |
◆ C6DOFIMU21_REG_MD2_CFG
#define C6DOFIMU21_REG_MD2_CFG 0x5F |
◆ C6DOFIMU21_REG_STATUS
#define C6DOFIMU21_REG_STATUS 0x1E |
◆ C6DOFIMU21_REG_T_OUT_H
#define C6DOFIMU21_REG_T_OUT_H 0x21 |
◆ C6DOFIMU21_REG_T_OUT_L
#define C6DOFIMU21_REG_T_OUT_L 0x20 |
◆ C6DOFIMU21_REG_TAP_CFG
#define C6DOFIMU21_REG_TAP_CFG 0x58 |
◆ C6DOFIMU21_REG_TAP_SRC
#define C6DOFIMU21_REG_TAP_SRC 0x1C |
◆ C6DOFIMU21_REG_TAP_THS_6D
#define C6DOFIMU21_REG_TAP_THS_6D 0x59 |
◆ C6DOFIMU21_REG_WAKE_UP_DUR
#define C6DOFIMU21_REG_WAKE_UP_DUR 0x5C |
◆ C6DOFIMU21_REG_WAKE_UP_SRC
#define C6DOFIMU21_REG_WAKE_UP_SRC 0x1B |
◆ C6DOFIMU21_REG_WAKE_UP_THS
#define C6DOFIMU21_REG_WAKE_UP_THS 0x5B |
◆ C6DOFIMU21_REG_X_OFS_USR
#define C6DOFIMU21_REG_X_OFS_USR 0x73 |
◆ C6DOFIMU21_REG_XL_X_OUT_H
#define C6DOFIMU21_REG_XL_X_OUT_H 0x29 |
◆ C6DOFIMU21_REG_XL_X_OUT_L
#define C6DOFIMU21_REG_XL_X_OUT_L 0x28 |
◆ C6DOFIMU21_REG_XL_Y_OUT_H
#define C6DOFIMU21_REG_XL_Y_OUT_H 0x2B |
◆ C6DOFIMU21_REG_XL_Y_OUT_L
#define C6DOFIMU21_REG_XL_Y_OUT_L 0x2A |
◆ C6DOFIMU21_REG_XL_Z_OUT_H
#define C6DOFIMU21_REG_XL_Z_OUT_H 0x2D |
◆ C6DOFIMU21_REG_XL_Z_OUT_L
#define C6DOFIMU21_REG_XL_Z_OUT_L 0x2C |
◆ C6DOFIMU21_REG_Y_OFS_USR
#define C6DOFIMU21_REG_Y_OFS_USR 0x74 |
◆ C6DOFIMU21_REG_Z_OFS_USR
#define C6DOFIMU21_REG_Z_OFS_USR 0x75 |