digiin2  2.1.0.0
Macros
DIGI IN 2 Registers Settings

Settings for registers of DIGI IN 2 Click driver. More...

Macros

#define DIGIIN2_CHANNEL_1_MASK   0x01
 DIGI IN 2 DISTATE register setting. More...
 
#define DIGIIN2_CHANNEL_2_MASK   0x02
 
#define DIGIIN2_CHANNEL_3_MASK   0x04
 
#define DIGIIN2_CHANNEL_4_MASK   0x08
 
#define DIGIIN2_CHANNEL_5_MASK   0x10
 
#define DIGIIN2_CHANNEL_6_MASK   0x20
 
#define DIGIIN2_CHANNEL_7_MASK   0x40
 
#define DIGIIN2_CHANNEL_8_MASK   0x80
 
#define DIGIIN2_CHANNEL_1_SEL   0x00
 DIGI IN 2 Channel selection setting. More...
 
#define DIGIIN2_CHANNEL_2_SEL   0x01
 
#define DIGIIN2_CHANNEL_3_SEL   0x02
 
#define DIGIIN2_CHANNEL_4_SEL   0x03
 
#define DIGIIN2_CHANNEL_5_SEL   0x04
 
#define DIGIIN2_CHANNEL_6_SEL   0x05
 
#define DIGIIN2_CHANNEL_7_SEL   0x06
 
#define DIGIIN2_CHANNEL_8_SEL   0x07
 
#define DIGIIN2_CRC_ERROR_FLAG   0x80
 DIGI IN 2 FAULT1 register setting. More...
 
#define DIGIIN2_POR   0x40
 
#define DIGIIN2_FAULT2   0x20
 
#define DIGIIN2_TERMAL_SHUTDOWN   0x10
 
#define DIGIIN2_TEMPERATURE_ALARM   0x08
 
#define DIGIIN2_V24_UNDERVOLTAGE   0x04
 
#define DIGIIN2_VM_VOLTAGE_LOW   0x02
 
#define DIGIIN2_CRC_ERROR_FLAG_MASK   0x80
 DIGI IN 2 F1MASK register setting. More...
 
#define DIGIIN2_FAULT2_MASK   0x20
 
#define DIGIIN2_TERMAL_SHUTDOWN_MASK   0x10
 
#define DIGIIN2_TEMPERATURE_ALARM_MASK   0x08
 
#define DIGIIN2_V24_UNDERVOLTAGE_MASK   0x04
 
#define DIGIIN2_VM_VOLTAGE_LOW_MASK   0x02
 
#define DIGIIN2_HITHR_HIGH   0x80
 DIGI IN 2 CNFGx register setting. More...
 
#define DIGIIN2_HITHR_LOW   0x00
 
#define DIGIIN2_SINK_MODE   0x00
 
#define DIGIIN2_SOURCE_MODE   0x40
 
#define DIGIIN2_CURR_OFF   0x00
 
#define DIGIIN2_CURR_X1   0x10
 
#define DIGIIN2_CURR_X3   0x20
 
#define DIGIIN2_CURR_TTL_OFF   0x30
 
#define DIGIIN2_GLITCH_FIL_EN   0x08
 
#define DIGIIN2_GLITCH_FIL_DIS   0x00
 
#define DIGIIN2_GLITCH_FIL_DELAY_50_US   0x00
 
#define DIGIIN2_GLITCH_FIL_DELAY_100_US   0x01
 
#define DIGIIN2_GLITCH_FIL_DELAY_400_US   0x02
 
#define DIGIIN2_GLITCH_FIL_DELAY_800_US   0x03
 
#define DIGIIN2_GLITCH_FIL_DELAY_1600_US   0x04
 
#define DIGIIN2_GLITCH_FIL_DELAY_3200_US   0x05
 
#define DIGIIN2_GLITCH_FIL_DELAY_12800_US   0x06
 
#define DIGIIN2_GLITCH_FIL_DELAY_20_MS   0x07
 
#define DIGIIN2_GPO_CFG_LED   0x80
 DIGI IN 2 GLOBLCFG register setting. More...
 
#define DIGIIN2_GPO_CFG_LEDINT   0x00
 
#define DIGIIN2_LEDINT_CFG_GPO   0x00
 
#define DIGIIN2_LEDINT_CFG_VMLOW   0x40
 
#define DIGIIN2_LED9_ON   0x00
 
#define DIGIIN2_LED9_OFF   0x20
 
#define DIGIIN2_FSPICLEAR_READ   0x10
 
#define DIGIIN2_FSPICLEAR_AUTO   0x00
 
#define DIGIIN2_CLR_FILTER_ON   0x08
 
#define DIGIIN2_CLR_FILTER_OFF   0x00
 
#define DIGIIN2_REFDISHTCFG_DIS   0x00
 
#define DIGIIN2_REFDISHTCFG_EN   0x01
 
#define DIGIIN2_LED_1_MASK   0x01
 DIGI IN 2 LED register setting. More...
 
#define DIGIIN2_LED_2_MASK   0x02
 
#define DIGIIN2_LED_3_MASK   0x04
 
#define DIGIIN2_LED_4_MASK   0x08
 
#define DIGIIN2_LED_5_MASK   0x10
 
#define DIGIIN2_LED_6_MASK   0x20
 
#define DIGIIN2_LED_7_MASK   0x40
 
#define DIGIIN2_LED_8_MASK   0x80
 
#define DIGIIN2_VAUV_UNDER_TRESHOLD   0x10
 DIGI IN 2 FAULT2 register setting. More...
 
#define DIGIIN2_SPI8_CLK_ERROR   0x08
 
#define DIGIIN2_OTSHDN2_ERROR   0x04
 
#define DIGIIN2_RFDIO_ERROR   0x02
 
#define DIGIIN2_RFDIS_ERROR   0x01
 
#define DIGIIN2_VAUV_UNDER_TRESHOLD_MASK   0x10
 DIGI IN 2 F2MASK register setting. More...
 
#define DIGIIN2_SPI8_CLK_ERROR_MASK   0x08
 
#define DIGIIN2_OTSHDN2_ERROR_MASK   0x04
 
#define DIGIIN2_RFDIO_ERROR_MASK   0x02
 
#define DIGIIN2_RFDIS_ERROR_MASK   0x01
 
#define DIGIIN2_PIN_STATE_HIGH   0x01
 DIGI IN 2 pin state setting. More...
 
#define DIGIIN2_PIN_STATE_LOW   0x00
 
#define DIGIIN2_CRC_ENABLED   0x01
 DIGI IN 2 CRC Settings setting. More...
 
#define DIGIIN2_CRC_DISABLED   0x00
 
#define DIGIIN2_CHIP_ADDRESS_00   0x00
 DIGI IN 2 chip address setting. More...
 
#define DIGIIN2_CHIP_ADDRESS_01   0x40
 
#define DIGIIN2_CHIP_ADDRESS_10   0x80
 
#define DIGIIN2_CHIP_ADDRESS_11   0xC0
 
#define DIGIIN2_SET_DATA_SAMPLE_EDGE   SET_SPI_DATA_SAMPLE_EDGE
 Data sample selection. More...
 
#define DIGIIN2_SET_DATA_SAMPLE_MIDDLE   SET_SPI_DATA_SAMPLE_MIDDLE
 

Detailed Description

Settings for registers of DIGI IN 2 Click driver.

Macro Definition Documentation

◆ DIGIIN2_CHANNEL_1_MASK

#define DIGIIN2_CHANNEL_1_MASK   0x01

DIGI IN 2 DISTATE register setting.

Specified setting for DISTATE register of DIGI IN 2 Click driver.

◆ DIGIIN2_CHANNEL_1_SEL

#define DIGIIN2_CHANNEL_1_SEL   0x00

DIGI IN 2 Channel selection setting.

Specified setting for Channel selection of DIGI IN 2 Click driver.

◆ DIGIIN2_CHANNEL_2_MASK

#define DIGIIN2_CHANNEL_2_MASK   0x02

◆ DIGIIN2_CHANNEL_2_SEL

#define DIGIIN2_CHANNEL_2_SEL   0x01

◆ DIGIIN2_CHANNEL_3_MASK

#define DIGIIN2_CHANNEL_3_MASK   0x04

◆ DIGIIN2_CHANNEL_3_SEL

#define DIGIIN2_CHANNEL_3_SEL   0x02

◆ DIGIIN2_CHANNEL_4_MASK

#define DIGIIN2_CHANNEL_4_MASK   0x08

◆ DIGIIN2_CHANNEL_4_SEL

#define DIGIIN2_CHANNEL_4_SEL   0x03

◆ DIGIIN2_CHANNEL_5_MASK

#define DIGIIN2_CHANNEL_5_MASK   0x10

◆ DIGIIN2_CHANNEL_5_SEL

#define DIGIIN2_CHANNEL_5_SEL   0x04

◆ DIGIIN2_CHANNEL_6_MASK

#define DIGIIN2_CHANNEL_6_MASK   0x20

◆ DIGIIN2_CHANNEL_6_SEL

#define DIGIIN2_CHANNEL_6_SEL   0x05

◆ DIGIIN2_CHANNEL_7_MASK

#define DIGIIN2_CHANNEL_7_MASK   0x40

◆ DIGIIN2_CHANNEL_7_SEL

#define DIGIIN2_CHANNEL_7_SEL   0x06

◆ DIGIIN2_CHANNEL_8_MASK

#define DIGIIN2_CHANNEL_8_MASK   0x80

◆ DIGIIN2_CHANNEL_8_SEL

#define DIGIIN2_CHANNEL_8_SEL   0x07

◆ DIGIIN2_CHIP_ADDRESS_00

#define DIGIIN2_CHIP_ADDRESS_00   0x00

DIGI IN 2 chip address setting.

Specified setting for chip address of DIGI IN 2 Click driver.

◆ DIGIIN2_CHIP_ADDRESS_01

#define DIGIIN2_CHIP_ADDRESS_01   0x40

◆ DIGIIN2_CHIP_ADDRESS_10

#define DIGIIN2_CHIP_ADDRESS_10   0x80

◆ DIGIIN2_CHIP_ADDRESS_11

#define DIGIIN2_CHIP_ADDRESS_11   0xC0

◆ DIGIIN2_CLR_FILTER_OFF

#define DIGIIN2_CLR_FILTER_OFF   0x00

◆ DIGIIN2_CLR_FILTER_ON

#define DIGIIN2_CLR_FILTER_ON   0x08

◆ DIGIIN2_CRC_DISABLED

#define DIGIIN2_CRC_DISABLED   0x00

◆ DIGIIN2_CRC_ENABLED

#define DIGIIN2_CRC_ENABLED   0x01

DIGI IN 2 CRC Settings setting.

Specified setting for CRC Settings of DIGI IN 2 Click driver.

◆ DIGIIN2_CRC_ERROR_FLAG

#define DIGIIN2_CRC_ERROR_FLAG   0x80

DIGI IN 2 FAULT1 register setting.

Specified setting for FAULT1 register of DIGI IN 2 Click driver.

◆ DIGIIN2_CRC_ERROR_FLAG_MASK

#define DIGIIN2_CRC_ERROR_FLAG_MASK   0x80

DIGI IN 2 F1MASK register setting.

Specified setting for F1MASK register of DIGI IN 2 Click driver.

◆ DIGIIN2_CURR_OFF

#define DIGIIN2_CURR_OFF   0x00

◆ DIGIIN2_CURR_TTL_OFF

#define DIGIIN2_CURR_TTL_OFF   0x30

◆ DIGIIN2_CURR_X1

#define DIGIIN2_CURR_X1   0x10

◆ DIGIIN2_CURR_X3

#define DIGIIN2_CURR_X3   0x20

◆ DIGIIN2_FAULT2

#define DIGIIN2_FAULT2   0x20

◆ DIGIIN2_FAULT2_MASK

#define DIGIIN2_FAULT2_MASK   0x20

◆ DIGIIN2_FSPICLEAR_AUTO

#define DIGIIN2_FSPICLEAR_AUTO   0x00

◆ DIGIIN2_FSPICLEAR_READ

#define DIGIIN2_FSPICLEAR_READ   0x10

◆ DIGIIN2_GLITCH_FIL_DELAY_100_US

#define DIGIIN2_GLITCH_FIL_DELAY_100_US   0x01

◆ DIGIIN2_GLITCH_FIL_DELAY_12800_US

#define DIGIIN2_GLITCH_FIL_DELAY_12800_US   0x06

◆ DIGIIN2_GLITCH_FIL_DELAY_1600_US

#define DIGIIN2_GLITCH_FIL_DELAY_1600_US   0x04

◆ DIGIIN2_GLITCH_FIL_DELAY_20_MS

#define DIGIIN2_GLITCH_FIL_DELAY_20_MS   0x07

◆ DIGIIN2_GLITCH_FIL_DELAY_3200_US

#define DIGIIN2_GLITCH_FIL_DELAY_3200_US   0x05

◆ DIGIIN2_GLITCH_FIL_DELAY_400_US

#define DIGIIN2_GLITCH_FIL_DELAY_400_US   0x02

◆ DIGIIN2_GLITCH_FIL_DELAY_50_US

#define DIGIIN2_GLITCH_FIL_DELAY_50_US   0x00

◆ DIGIIN2_GLITCH_FIL_DELAY_800_US

#define DIGIIN2_GLITCH_FIL_DELAY_800_US   0x03

◆ DIGIIN2_GLITCH_FIL_DIS

#define DIGIIN2_GLITCH_FIL_DIS   0x00

◆ DIGIIN2_GLITCH_FIL_EN

#define DIGIIN2_GLITCH_FIL_EN   0x08

◆ DIGIIN2_GPO_CFG_LED

#define DIGIIN2_GPO_CFG_LED   0x80

DIGI IN 2 GLOBLCFG register setting.

Specified setting for GLOBLCFG register of DIGI IN 2 Click driver.

◆ DIGIIN2_GPO_CFG_LEDINT

#define DIGIIN2_GPO_CFG_LEDINT   0x00

◆ DIGIIN2_HITHR_HIGH

#define DIGIIN2_HITHR_HIGH   0x80

DIGI IN 2 CNFGx register setting.

Specified setting for CNFGx register of DIGI IN 2 Click driver.

◆ DIGIIN2_HITHR_LOW

#define DIGIIN2_HITHR_LOW   0x00

◆ DIGIIN2_LED9_OFF

#define DIGIIN2_LED9_OFF   0x20

◆ DIGIIN2_LED9_ON

#define DIGIIN2_LED9_ON   0x00

◆ DIGIIN2_LED_1_MASK

#define DIGIIN2_LED_1_MASK   0x01

DIGI IN 2 LED register setting.

Specified setting for LED register of DIGI IN 2 Click driver.

◆ DIGIIN2_LED_2_MASK

#define DIGIIN2_LED_2_MASK   0x02

◆ DIGIIN2_LED_3_MASK

#define DIGIIN2_LED_3_MASK   0x04

◆ DIGIIN2_LED_4_MASK

#define DIGIIN2_LED_4_MASK   0x08

◆ DIGIIN2_LED_5_MASK

#define DIGIIN2_LED_5_MASK   0x10

◆ DIGIIN2_LED_6_MASK

#define DIGIIN2_LED_6_MASK   0x20

◆ DIGIIN2_LED_7_MASK

#define DIGIIN2_LED_7_MASK   0x40

◆ DIGIIN2_LED_8_MASK

#define DIGIIN2_LED_8_MASK   0x80

◆ DIGIIN2_LEDINT_CFG_GPO

#define DIGIIN2_LEDINT_CFG_GPO   0x00

◆ DIGIIN2_LEDINT_CFG_VMLOW

#define DIGIIN2_LEDINT_CFG_VMLOW   0x40

◆ DIGIIN2_OTSHDN2_ERROR

#define DIGIIN2_OTSHDN2_ERROR   0x04

◆ DIGIIN2_OTSHDN2_ERROR_MASK

#define DIGIIN2_OTSHDN2_ERROR_MASK   0x04

◆ DIGIIN2_PIN_STATE_HIGH

#define DIGIIN2_PIN_STATE_HIGH   0x01

DIGI IN 2 pin state setting.

Specified setting for pin state of DIGI IN 2 Click driver.

◆ DIGIIN2_PIN_STATE_LOW

#define DIGIIN2_PIN_STATE_LOW   0x00

◆ DIGIIN2_POR

#define DIGIIN2_POR   0x40

◆ DIGIIN2_REFDISHTCFG_DIS

#define DIGIIN2_REFDISHTCFG_DIS   0x00

◆ DIGIIN2_REFDISHTCFG_EN

#define DIGIIN2_REFDISHTCFG_EN   0x01

◆ DIGIIN2_RFDIO_ERROR

#define DIGIIN2_RFDIO_ERROR   0x02

◆ DIGIIN2_RFDIO_ERROR_MASK

#define DIGIIN2_RFDIO_ERROR_MASK   0x02

◆ DIGIIN2_RFDIS_ERROR

#define DIGIIN2_RFDIS_ERROR   0x01

◆ DIGIIN2_RFDIS_ERROR_MASK

#define DIGIIN2_RFDIS_ERROR_MASK   0x01

◆ DIGIIN2_SET_DATA_SAMPLE_EDGE

#define DIGIIN2_SET_DATA_SAMPLE_EDGE   SET_SPI_DATA_SAMPLE_EDGE

Data sample selection.

This macro sets data samples for SPI modules.

Note
Available only on Microchip PIC family devices. This macro will set data sampling for all SPI modules on MCU. Can be overwritten with digiin2_init which will set SET_SPI_DATA_SAMPLE_MIDDLE by default on the mapped mikrobus.

◆ DIGIIN2_SET_DATA_SAMPLE_MIDDLE

#define DIGIIN2_SET_DATA_SAMPLE_MIDDLE   SET_SPI_DATA_SAMPLE_MIDDLE

◆ DIGIIN2_SINK_MODE

#define DIGIIN2_SINK_MODE   0x00

◆ DIGIIN2_SOURCE_MODE

#define DIGIIN2_SOURCE_MODE   0x40

◆ DIGIIN2_SPI8_CLK_ERROR

#define DIGIIN2_SPI8_CLK_ERROR   0x08

◆ DIGIIN2_SPI8_CLK_ERROR_MASK

#define DIGIIN2_SPI8_CLK_ERROR_MASK   0x08

◆ DIGIIN2_TEMPERATURE_ALARM

#define DIGIIN2_TEMPERATURE_ALARM   0x08

◆ DIGIIN2_TEMPERATURE_ALARM_MASK

#define DIGIIN2_TEMPERATURE_ALARM_MASK   0x08

◆ DIGIIN2_TERMAL_SHUTDOWN

#define DIGIIN2_TERMAL_SHUTDOWN   0x10

◆ DIGIIN2_TERMAL_SHUTDOWN_MASK

#define DIGIIN2_TERMAL_SHUTDOWN_MASK   0x10

◆ DIGIIN2_V24_UNDERVOLTAGE

#define DIGIIN2_V24_UNDERVOLTAGE   0x04

◆ DIGIIN2_V24_UNDERVOLTAGE_MASK

#define DIGIIN2_V24_UNDERVOLTAGE_MASK   0x04

◆ DIGIIN2_VAUV_UNDER_TRESHOLD

#define DIGIIN2_VAUV_UNDER_TRESHOLD   0x10

DIGI IN 2 FAULT2 register setting.

Specified setting for FAULT2 register of DIGI IN 2 Click driver.

◆ DIGIIN2_VAUV_UNDER_TRESHOLD_MASK

#define DIGIIN2_VAUV_UNDER_TRESHOLD_MASK   0x10

DIGI IN 2 F2MASK register setting.

Specified setting for F2MASK register of DIGI IN 2 Click driver.

◆ DIGIIN2_VM_VOLTAGE_LOW

#define DIGIIN2_VM_VOLTAGE_LOW   0x02

◆ DIGIIN2_VM_VOLTAGE_LOW_MASK

#define DIGIIN2_VM_VOLTAGE_LOW_MASK   0x02