35#include "mikrosdk_version.h"
38#if mikroSDK_GET_VERSION < 20800ul
39#include "rcu_delays.h"
45#include "drv_digital_out.h"
46#include "drv_digital_in.h"
47#include "drv_spi_master.h"
70#define DIGIIN2_REG_DISTATE 0x00
71#define DIGIIN2_REG_FAULT 0x01
72#define DIGIIN2_REG_F1MASK 0x02
73#define DIGIIN2_REG_CNFG1 0x03
74#define DIGIIN2_REG_CNFG2 0x04
75#define DIGIIN2_REG_CNFG3 0x05
76#define DIGIIN2_REG_CNFG4 0x06
77#define DIGIIN2_REG_CNFG5 0x07
78#define DIGIIN2_REG_CNFG6 0x08
79#define DIGIIN2_REG_CNFG7 0x09
80#define DIGIIN2_REG_CNFG8 0x0A
81#define DIGIIN2_REG_GLOBLCFG 0x0B
82#define DIGIIN2_REG_LED 0x0C
83#define DIGIIN2_REG_FAULT2 0x0D
84#define DIGIIN2_REG_F2MASK 0x0E
85#define DIGIIN2_REG_START_STOP 0x0F
86#define DIGIIN2_REG_CNT1_LSB 0x10
87#define DIGIIN2_REG_CNT1_MSB 0x11
88#define DIGIIN2_REG_CNT2_LSB 0x12
89#define DIGIIN2_REG_CNT2_MSB 0x13
90#define DIGIIN2_REG_CNT3_LSB 0x14
91#define DIGIIN2_REG_CNT3_MSB 0x15
92#define DIGIIN2_REG_CNT4_LSB 0x16
93#define DIGIIN2_REG_CNT4_MSB 0x17
94#define DIGIIN2_REG_CNT5_LSB 0x18
95#define DIGIIN2_REG_CNT5_MSB 0x19
96#define DIGIIN2_REG_CNT6_LSB 0x1A
97#define DIGIIN2_REG_CNT6_MSB 0x1B
98#define DIGIIN2_REG_CNT7_LSB 0x1C
99#define DIGIIN2_REG_CNT7_MSB 0x1D
100#define DIGIIN2_REG_CNT8_LSB 0x1E
101#define DIGIIN2_REG_CNT8_MSB 0x1F
119#define DIGIIN2_CHANNEL_1_MASK 0x01
120#define DIGIIN2_CHANNEL_2_MASK 0x02
121#define DIGIIN2_CHANNEL_3_MASK 0x04
122#define DIGIIN2_CHANNEL_4_MASK 0x08
123#define DIGIIN2_CHANNEL_5_MASK 0x10
124#define DIGIIN2_CHANNEL_6_MASK 0x20
125#define DIGIIN2_CHANNEL_7_MASK 0x40
126#define DIGIIN2_CHANNEL_8_MASK 0x80
132#define DIGIIN2_CHANNEL_1_SEL 0x00
133#define DIGIIN2_CHANNEL_2_SEL 0x01
134#define DIGIIN2_CHANNEL_3_SEL 0x02
135#define DIGIIN2_CHANNEL_4_SEL 0x03
136#define DIGIIN2_CHANNEL_5_SEL 0x04
137#define DIGIIN2_CHANNEL_6_SEL 0x05
138#define DIGIIN2_CHANNEL_7_SEL 0x06
139#define DIGIIN2_CHANNEL_8_SEL 0x07
145#define DIGIIN2_CRC_ERROR_FLAG 0x80
146#define DIGIIN2_POR 0x40
147#define DIGIIN2_FAULT2 0x20
148#define DIGIIN2_TERMAL_SHUTDOWN 0x10
149#define DIGIIN2_TEMPERATURE_ALARM 0x08
150#define DIGIIN2_V24_UNDERVOLTAGE 0x04
151#define DIGIIN2_VM_VOLTAGE_LOW 0x02
157#define DIGIIN2_CRC_ERROR_FLAG_MASK 0x80
158#define DIGIIN2_FAULT2_MASK 0x20
159#define DIGIIN2_TERMAL_SHUTDOWN_MASK 0x10
160#define DIGIIN2_TEMPERATURE_ALARM_MASK 0x08
161#define DIGIIN2_V24_UNDERVOLTAGE_MASK 0x04
162#define DIGIIN2_VM_VOLTAGE_LOW_MASK 0x02
168#define DIGIIN2_HITHR_HIGH 0x80
169#define DIGIIN2_HITHR_LOW 0x00
170#define DIGIIN2_SINK_MODE 0x00
171#define DIGIIN2_SOURCE_MODE 0x40
172#define DIGIIN2_CURR_OFF 0x00
173#define DIGIIN2_CURR_X1 0x10
174#define DIGIIN2_CURR_X3 0x20
175#define DIGIIN2_CURR_TTL_OFF 0x30
176#define DIGIIN2_GLITCH_FIL_EN 0x08
177#define DIGIIN2_GLITCH_FIL_DIS 0x00
178#define DIGIIN2_GLITCH_FIL_DELAY_50_US 0x00
179#define DIGIIN2_GLITCH_FIL_DELAY_100_US 0x01
180#define DIGIIN2_GLITCH_FIL_DELAY_400_US 0x02
181#define DIGIIN2_GLITCH_FIL_DELAY_800_US 0x03
182#define DIGIIN2_GLITCH_FIL_DELAY_1600_US 0x04
183#define DIGIIN2_GLITCH_FIL_DELAY_3200_US 0x05
184#define DIGIIN2_GLITCH_FIL_DELAY_12800_US 0x06
185#define DIGIIN2_GLITCH_FIL_DELAY_20_MS 0x07
191#define DIGIIN2_GPO_CFG_LED 0x80
192#define DIGIIN2_GPO_CFG_LEDINT 0x00
193#define DIGIIN2_LEDINT_CFG_GPO 0x00
194#define DIGIIN2_LEDINT_CFG_VMLOW 0x40
195#define DIGIIN2_LED9_ON 0x00
196#define DIGIIN2_LED9_OFF 0x20
197#define DIGIIN2_FSPICLEAR_READ 0x10
198#define DIGIIN2_FSPICLEAR_AUTO 0x00
199#define DIGIIN2_CLR_FILTER_ON 0x08
200#define DIGIIN2_CLR_FILTER_OFF 0x00
201#define DIGIIN2_REFDISHTCFG_DIS 0x00
202#define DIGIIN2_REFDISHTCFG_EN 0x01
208#define DIGIIN2_LED_1_MASK 0x01
209#define DIGIIN2_LED_2_MASK 0x02
210#define DIGIIN2_LED_3_MASK 0x04
211#define DIGIIN2_LED_4_MASK 0x08
212#define DIGIIN2_LED_5_MASK 0x10
213#define DIGIIN2_LED_6_MASK 0x20
214#define DIGIIN2_LED_7_MASK 0x40
215#define DIGIIN2_LED_8_MASK 0x80
221#define DIGIIN2_VAUV_UNDER_TRESHOLD 0x10
222#define DIGIIN2_SPI8_CLK_ERROR 0x08
223#define DIGIIN2_OTSHDN2_ERROR 0x04
224#define DIGIIN2_RFDIO_ERROR 0x02
225#define DIGIIN2_RFDIS_ERROR 0x01
231#define DIGIIN2_VAUV_UNDER_TRESHOLD_MASK 0x10
232#define DIGIIN2_SPI8_CLK_ERROR_MASK 0x08
233#define DIGIIN2_OTSHDN2_ERROR_MASK 0x04
234#define DIGIIN2_RFDIO_ERROR_MASK 0x02
235#define DIGIIN2_RFDIS_ERROR_MASK 0x01
241#define DIGIIN2_PIN_STATE_HIGH 0x01
242#define DIGIIN2_PIN_STATE_LOW 0x00
248#define DIGIIN2_CRC_ENABLED 0x01
249#define DIGIIN2_CRC_DISABLED 0x00
255#define DIGIIN2_CHIP_ADDRESS_00 0x00
256#define DIGIIN2_CHIP_ADDRESS_01 0x40
257#define DIGIIN2_CHIP_ADDRESS_10 0x80
258#define DIGIIN2_CHIP_ADDRESS_11 0xC0
270#define DIGIIN2_SET_DATA_SAMPLE_EDGE SET_SPI_DATA_SAMPLE_EDGE
271#define DIGIIN2_SET_DATA_SAMPLE_MIDDLE SET_SPI_DATA_SAMPLE_MIDDLE
289#define DIGIIN2_MAP_MIKROBUS( cfg, mikrobus ) \
290 cfg.miso = MIKROBUS( mikrobus, MIKROBUS_MISO ); \
291 cfg.mosi = MIKROBUS( mikrobus, MIKROBUS_MOSI ); \
292 cfg.sck = MIKROBUS( mikrobus, MIKROBUS_SCK ); \
293 cfg.cs = MIKROBUS( mikrobus, MIKROBUS_CS ); \
294 cfg.rdy = MIKROBUS( mikrobus, MIKROBUS_AN ); \
295 cfg.ltc = MIKROBUS( mikrobus, MIKROBUS_PWM ); \
296 cfg.flt = MIKROBUS( mikrobus, MIKROBUS_INT )
digiin2_return_value_t
DIGI IN 2 Click return value data.
Definition: digiin2.h:353
@ DIGIIN2_OK
Definition: digiin2.h:354
@ DIGIIN2_ERROR
Definition: digiin2.h:355
void digiin2_set_dev_address(digiin2_t *ctx, uint8_t device_address)
DIGI IN 2 set device address function.
uint8_t digiin2_get_flt_pin(digiin2_t *ctx)
DIGI IN 2 get FLT pin state function.
err_t digiin2_default_cfg(digiin2_t *ctx)
DIGI IN 2 default configuration function.
err_t digiin2_generic_read(digiin2_t *ctx, uint8_t reg, uint8_t *data_out, uint8_t len)
DIGI IN 2 data reading function.
err_t digiin2_read_ch_counter(digiin2_t *ctx, uint8_t channel_sel, uint16_t *data_out)
DIGI IN 2 channel counter reading function.
void digiin2_cfg_setup(digiin2_cfg_t *cfg)
DIGI IN 2 configuration object setup function.
err_t digiin2_generic_write(digiin2_t *ctx, uint8_t reg, uint8_t *data_in, uint8_t len)
DIGI IN 2 data writing function.
uint8_t digiin2_get_rdy_pin(digiin2_t *ctx)
DIGI IN 2 get RDY pin state function.
err_t digiin2_init(digiin2_t *ctx, digiin2_cfg_t *cfg)
DIGI IN 2 initialization function.
void digiin2_pulse_latch(digiin2_t *ctx)
DIGI IN 2 send latch pulse function.
void digiin2_set_ltc_pin(digiin2_t *ctx, uint8_t pin_state)
DIGI IN 2 set LTC pin function.
err_t digiin2_write_reg(digiin2_t *ctx, uint8_t reg, uint8_t data_in)
DIGI IN 2 register write function.
err_t digiin2_read_reg(digiin2_t *ctx, uint8_t reg, uint8_t *data_out)
DIGI IN 2 register reading function.
This file contains SPI specific macros, functions, etc.
DIGI IN 2 Click configuration object.
Definition: digiin2.h:329
pin_name_t ltc
Definition: digiin2.h:338
spi_master_chip_select_polarity_t cs_polarity
Definition: digiin2.h:344
pin_name_t sck
Definition: digiin2.h:333
spi_master_mode_t spi_mode
Definition: digiin2.h:343
pin_name_t mosi
Definition: digiin2.h:332
uint32_t spi_speed
Definition: digiin2.h:342
pin_name_t flt
Definition: digiin2.h:339
pin_name_t rdy
Definition: digiin2.h:337
pin_name_t miso
Definition: digiin2.h:331
pin_name_t cs
Definition: digiin2.h:334
DIGI IN 2 Click context object.
Definition: digiin2.h:306
uint8_t crc_en
Definition: digiin2.h:320
digital_out_t ltc
Definition: digiin2.h:308
spi_master_t spi
Definition: digiin2.h:315
uint8_t device_address
Definition: digiin2.h:319
digital_in_t flt
Definition: digiin2.h:312
pin_name_t chip_select
Definition: digiin2.h:317
digital_in_t rdy
Definition: digiin2.h:311