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39 #ifdef PREINIT_SUPPORTED
43 #ifdef MikroCCoreVersion
44 #if MikroCCoreVersion >= 1
49 #include "drv_digital_out.h"
50 #include "drv_digital_in.h"
51 #include "drv_spi_master.h"
74 #define DIGIIN2_REG_DISTATE 0x00
75 #define DIGIIN2_REG_FAULT 0x01
76 #define DIGIIN2_REG_F1MASK 0x02
77 #define DIGIIN2_REG_CNFG1 0x03
78 #define DIGIIN2_REG_CNFG2 0x04
79 #define DIGIIN2_REG_CNFG3 0x05
80 #define DIGIIN2_REG_CNFG4 0x06
81 #define DIGIIN2_REG_CNFG5 0x07
82 #define DIGIIN2_REG_CNFG6 0x08
83 #define DIGIIN2_REG_CNFG7 0x09
84 #define DIGIIN2_REG_CNFG8 0x0A
85 #define DIGIIN2_REG_GLOBLCFG 0x0B
86 #define DIGIIN2_REG_LED 0x0C
87 #define DIGIIN2_REG_FAULT2 0x0D
88 #define DIGIIN2_REG_F2MASK 0x0E
89 #define DIGIIN2_REG_START_STOP 0x0F
90 #define DIGIIN2_REG_CNT1_LSB 0x10
91 #define DIGIIN2_REG_CNT1_MSB 0x11
92 #define DIGIIN2_REG_CNT2_LSB 0x12
93 #define DIGIIN2_REG_CNT2_MSB 0x13
94 #define DIGIIN2_REG_CNT3_LSB 0x14
95 #define DIGIIN2_REG_CNT3_MSB 0x15
96 #define DIGIIN2_REG_CNT4_LSB 0x16
97 #define DIGIIN2_REG_CNT4_MSB 0x17
98 #define DIGIIN2_REG_CNT5_LSB 0x18
99 #define DIGIIN2_REG_CNT5_MSB 0x19
100 #define DIGIIN2_REG_CNT6_LSB 0x1A
101 #define DIGIIN2_REG_CNT6_MSB 0x1B
102 #define DIGIIN2_REG_CNT7_LSB 0x1C
103 #define DIGIIN2_REG_CNT7_MSB 0x1D
104 #define DIGIIN2_REG_CNT8_LSB 0x1E
105 #define DIGIIN2_REG_CNT8_MSB 0x1F
123 #define DIGIIN2_CHANNEL_1_MASK 0x01
124 #define DIGIIN2_CHANNEL_2_MASK 0x02
125 #define DIGIIN2_CHANNEL_3_MASK 0x04
126 #define DIGIIN2_CHANNEL_4_MASK 0x08
127 #define DIGIIN2_CHANNEL_5_MASK 0x10
128 #define DIGIIN2_CHANNEL_6_MASK 0x20
129 #define DIGIIN2_CHANNEL_7_MASK 0x40
130 #define DIGIIN2_CHANNEL_8_MASK 0x80
136 #define DIGIIN2_CHANNEL_1_SEL 0x00
137 #define DIGIIN2_CHANNEL_2_SEL 0x01
138 #define DIGIIN2_CHANNEL_3_SEL 0x02
139 #define DIGIIN2_CHANNEL_4_SEL 0x03
140 #define DIGIIN2_CHANNEL_5_SEL 0x04
141 #define DIGIIN2_CHANNEL_6_SEL 0x05
142 #define DIGIIN2_CHANNEL_7_SEL 0x06
143 #define DIGIIN2_CHANNEL_8_SEL 0x07
149 #define DIGIIN2_CRC_ERROR_FLAG 0x80
150 #define DIGIIN2_POR 0x40
151 #define DIGIIN2_FAULT2 0x20
152 #define DIGIIN2_TERMAL_SHUTDOWN 0x10
153 #define DIGIIN2_TEMPERATURE_ALARM 0x08
154 #define DIGIIN2_V24_UNDERVOLTAGE 0x04
155 #define DIGIIN2_VM_VOLTAGE_LOW 0x02
161 #define DIGIIN2_CRC_ERROR_FLAG_MASK 0x80
162 #define DIGIIN2_FAULT2_MASK 0x20
163 #define DIGIIN2_TERMAL_SHUTDOWN_MASK 0x10
164 #define DIGIIN2_TEMPERATURE_ALARM_MASK 0x08
165 #define DIGIIN2_V24_UNDERVOLTAGE_MASK 0x04
166 #define DIGIIN2_VM_VOLTAGE_LOW_MASK 0x02
172 #define DIGIIN2_HITHR_HIGH 0x80
173 #define DIGIIN2_HITHR_LOW 0x00
174 #define DIGIIN2_SINK_MODE 0x00
175 #define DIGIIN2_SOURCE_MODE 0x40
176 #define DIGIIN2_CURR_OFF 0x00
177 #define DIGIIN2_CURR_X1 0x10
178 #define DIGIIN2_CURR_X3 0x20
179 #define DIGIIN2_CURR_TTL_OFF 0x30
180 #define DIGIIN2_GLITCH_FIL_EN 0x08
181 #define DIGIIN2_GLITCH_FIL_DIS 0x00
182 #define DIGIIN2_GLITCH_FIL_DELAY_50_US 0x00
183 #define DIGIIN2_GLITCH_FIL_DELAY_100_US 0x01
184 #define DIGIIN2_GLITCH_FIL_DELAY_400_US 0x02
185 #define DIGIIN2_GLITCH_FIL_DELAY_800_US 0x03
186 #define DIGIIN2_GLITCH_FIL_DELAY_1600_US 0x04
187 #define DIGIIN2_GLITCH_FIL_DELAY_3200_US 0x05
188 #define DIGIIN2_GLITCH_FIL_DELAY_12800_US 0x06
189 #define DIGIIN2_GLITCH_FIL_DELAY_20_MS 0x07
195 #define DIGIIN2_GPO_CFG_LED 0x80
196 #define DIGIIN2_GPO_CFG_LEDINT 0x00
197 #define DIGIIN2_LEDINT_CFG_GPO 0x00
198 #define DIGIIN2_LEDINT_CFG_VMLOW 0x40
199 #define DIGIIN2_LED9_ON 0x00
200 #define DIGIIN2_LED9_OFF 0x20
201 #define DIGIIN2_FSPICLEAR_READ 0x10
202 #define DIGIIN2_FSPICLEAR_AUTO 0x00
203 #define DIGIIN2_CLR_FILTER_ON 0x08
204 #define DIGIIN2_CLR_FILTER_OFF 0x00
205 #define DIGIIN2_REFDISHTCFG_DIS 0x00
206 #define DIGIIN2_REFDISHTCFG_EN 0x01
212 #define DIGIIN2_LED_1_MASK 0x01
213 #define DIGIIN2_LED_2_MASK 0x02
214 #define DIGIIN2_LED_3_MASK 0x04
215 #define DIGIIN2_LED_4_MASK 0x08
216 #define DIGIIN2_LED_5_MASK 0x10
217 #define DIGIIN2_LED_6_MASK 0x20
218 #define DIGIIN2_LED_7_MASK 0x40
219 #define DIGIIN2_LED_8_MASK 0x80
225 #define DIGIIN2_VAUV_UNDER_TRESHOLD 0x10
226 #define DIGIIN2_SPI8_CLK_ERROR 0x08
227 #define DIGIIN2_OTSHDN2_ERROR 0x04
228 #define DIGIIN2_RFDIO_ERROR 0x02
229 #define DIGIIN2_RFDIS_ERROR 0x01
235 #define DIGIIN2_VAUV_UNDER_TRESHOLD_MASK 0x10
236 #define DIGIIN2_SPI8_CLK_ERROR_MASK 0x08
237 #define DIGIIN2_OTSHDN2_ERROR_MASK 0x04
238 #define DIGIIN2_RFDIO_ERROR_MASK 0x02
239 #define DIGIIN2_RFDIS_ERROR_MASK 0x01
245 #define DIGIIN2_PIN_STATE_HIGH 0x01
246 #define DIGIIN2_PIN_STATE_LOW 0x00
252 #define DIGIIN2_CRC_ENABLED 0x01
253 #define DIGIIN2_CRC_DISABLED 0x00
259 #define DIGIIN2_CHIP_ADDRESS_00 0x00
260 #define DIGIIN2_CHIP_ADDRESS_01 0x40
261 #define DIGIIN2_CHIP_ADDRESS_10 0x80
262 #define DIGIIN2_CHIP_ADDRESS_11 0xC0
274 #define DIGIIN2_SET_DATA_SAMPLE_EDGE SET_SPI_DATA_SAMPLE_EDGE
275 #define DIGIIN2_SET_DATA_SAMPLE_MIDDLE SET_SPI_DATA_SAMPLE_MIDDLE
293 #define DIGIIN2_MAP_MIKROBUS( cfg, mikrobus ) \
294 cfg.miso = MIKROBUS( mikrobus, MIKROBUS_MISO ); \
295 cfg.mosi = MIKROBUS( mikrobus, MIKROBUS_MOSI ); \
296 cfg.sck = MIKROBUS( mikrobus, MIKROBUS_SCK ); \
297 cfg.cs = MIKROBUS( mikrobus, MIKROBUS_CS ); \
298 cfg.rdy = MIKROBUS( mikrobus, MIKROBUS_AN ); \
299 cfg.ltc = MIKROBUS( mikrobus, MIKROBUS_PWM ); \
300 cfg.flt = MIKROBUS( mikrobus, MIKROBUS_INT )
pin_name_t sck
Definition: digiin2.h:337
DIGI IN 2 Click configuration object.
Definition: digiin2.h:333
err_t digiin2_generic_read(digiin2_t *ctx, uint8_t reg, uint8_t *data_out, uint8_t len)
DIGI IN 2 data reading function.
pin_name_t miso
Definition: digiin2.h:335
spi_master_chip_select_polarity_t cs_polarity
Definition: digiin2.h:348
err_t digiin2_read_reg(digiin2_t *ctx, uint8_t reg, uint8_t *data_out)
DIGI IN 2 register reading function.
This file contains SPI specific macros, functions, etc.
uint8_t crc_en
Definition: digiin2.h:324
digital_in_t rdy
Definition: digiin2.h:315
void digiin2_set_dev_address(digiin2_t *ctx, uint8_t device_address)
DIGI IN 2 set device address function.
void digiin2_set_ltc_pin(digiin2_t *ctx, uint8_t pin_state)
DIGI IN 2 set LTC pin function.
@ DIGIIN2_OK
Definition: digiin2.h:358
pin_name_t cs
Definition: digiin2.h:338
digital_out_t ltc
Definition: digiin2.h:312
err_t digiin2_generic_write(digiin2_t *ctx, uint8_t reg, uint8_t *data_in, uint8_t len)
DIGI IN 2 data writing function.
pin_name_t chip_select
Definition: digiin2.h:321
digital_in_t flt
Definition: digiin2.h:316
pin_name_t ltc
Definition: digiin2.h:342
digiin2_return_value_t
DIGI IN 2 Click return value data.
Definition: digiin2.h:357
pin_name_t flt
Definition: digiin2.h:343
void digiin2_pulse_latch(digiin2_t *ctx)
DIGI IN 2 send latch pulse function.
uint8_t digiin2_get_flt_pin(digiin2_t *ctx)
DIGI IN 2 get FLT pin state function.
DIGI IN 2 Click context object.
Definition: digiin2.h:310
uint8_t device_address
Definition: digiin2.h:323
pin_name_t mosi
Definition: digiin2.h:336
spi_master_t spi
Definition: digiin2.h:319
err_t digiin2_read_ch_counter(digiin2_t *ctx, uint8_t channel_sel, uint16_t *data_out)
DIGI IN 2 channel counter reading function.
err_t digiin2_init(digiin2_t *ctx, digiin2_cfg_t *cfg)
DIGI IN 2 initialization function.
uint32_t spi_speed
Definition: digiin2.h:346
uint8_t digiin2_get_rdy_pin(digiin2_t *ctx)
DIGI IN 2 get RDY pin state function.
err_t digiin2_default_cfg(digiin2_t *ctx)
DIGI IN 2 default configuration function.
spi_master_mode_t spi_mode
Definition: digiin2.h:347
err_t digiin2_write_reg(digiin2_t *ctx, uint8_t reg, uint8_t data_in)
DIGI IN 2 register write function.
void digiin2_cfg_setup(digiin2_cfg_t *cfg)
DIGI IN 2 configuration object setup function.
@ DIGIIN2_ERROR
Definition: digiin2.h:359
pin_name_t rdy
Definition: digiin2.h:341