digiin2
2.1.0.0
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Settings for registers of DIGI IN 2 Click driver. More...
Settings for registers of DIGI IN 2 Click driver.
#define DIGIIN2_CHANNEL_1_MASK 0x01 |
DIGI IN 2 DISTATE register setting.
Specified setting for DISTATE register of DIGI IN 2 Click driver.
#define DIGIIN2_CHANNEL_1_SEL 0x00 |
DIGI IN 2 Channel selection setting.
Specified setting for Channel selection of DIGI IN 2 Click driver.
#define DIGIIN2_CHANNEL_2_MASK 0x02 |
#define DIGIIN2_CHANNEL_2_SEL 0x01 |
#define DIGIIN2_CHANNEL_3_MASK 0x04 |
#define DIGIIN2_CHANNEL_3_SEL 0x02 |
#define DIGIIN2_CHANNEL_4_MASK 0x08 |
#define DIGIIN2_CHANNEL_4_SEL 0x03 |
#define DIGIIN2_CHANNEL_5_MASK 0x10 |
#define DIGIIN2_CHANNEL_5_SEL 0x04 |
#define DIGIIN2_CHANNEL_6_MASK 0x20 |
#define DIGIIN2_CHANNEL_6_SEL 0x05 |
#define DIGIIN2_CHANNEL_7_MASK 0x40 |
#define DIGIIN2_CHANNEL_7_SEL 0x06 |
#define DIGIIN2_CHANNEL_8_MASK 0x80 |
#define DIGIIN2_CHANNEL_8_SEL 0x07 |
#define DIGIIN2_CHIP_ADDRESS_00 0x00 |
DIGI IN 2 chip address setting.
Specified setting for chip address of DIGI IN 2 Click driver.
#define DIGIIN2_CHIP_ADDRESS_01 0x40 |
#define DIGIIN2_CHIP_ADDRESS_10 0x80 |
#define DIGIIN2_CHIP_ADDRESS_11 0xC0 |
#define DIGIIN2_CLR_FILTER_OFF 0x00 |
#define DIGIIN2_CLR_FILTER_ON 0x08 |
#define DIGIIN2_CRC_DISABLED 0x00 |
#define DIGIIN2_CRC_ENABLED 0x01 |
DIGI IN 2 CRC Settings setting.
Specified setting for CRC Settings of DIGI IN 2 Click driver.
#define DIGIIN2_CRC_ERROR_FLAG 0x80 |
DIGI IN 2 FAULT1 register setting.
Specified setting for FAULT1 register of DIGI IN 2 Click driver.
#define DIGIIN2_CRC_ERROR_FLAG_MASK 0x80 |
DIGI IN 2 F1MASK register setting.
Specified setting for F1MASK register of DIGI IN 2 Click driver.
#define DIGIIN2_CURR_OFF 0x00 |
#define DIGIIN2_CURR_TTL_OFF 0x30 |
#define DIGIIN2_CURR_X1 0x10 |
#define DIGIIN2_CURR_X3 0x20 |
#define DIGIIN2_FAULT2 0x20 |
#define DIGIIN2_FAULT2_MASK 0x20 |
#define DIGIIN2_FSPICLEAR_AUTO 0x00 |
#define DIGIIN2_FSPICLEAR_READ 0x10 |
#define DIGIIN2_GLITCH_FIL_DELAY_100_US 0x01 |
#define DIGIIN2_GLITCH_FIL_DELAY_12800_US 0x06 |
#define DIGIIN2_GLITCH_FIL_DELAY_1600_US 0x04 |
#define DIGIIN2_GLITCH_FIL_DELAY_20_MS 0x07 |
#define DIGIIN2_GLITCH_FIL_DELAY_3200_US 0x05 |
#define DIGIIN2_GLITCH_FIL_DELAY_400_US 0x02 |
#define DIGIIN2_GLITCH_FIL_DELAY_50_US 0x00 |
#define DIGIIN2_GLITCH_FIL_DELAY_800_US 0x03 |
#define DIGIIN2_GLITCH_FIL_DIS 0x00 |
#define DIGIIN2_GLITCH_FIL_EN 0x08 |
#define DIGIIN2_GPO_CFG_LED 0x80 |
DIGI IN 2 GLOBLCFG register setting.
Specified setting for GLOBLCFG register of DIGI IN 2 Click driver.
#define DIGIIN2_GPO_CFG_LEDINT 0x00 |
#define DIGIIN2_HITHR_HIGH 0x80 |
DIGI IN 2 CNFGx register setting.
Specified setting for CNFGx register of DIGI IN 2 Click driver.
#define DIGIIN2_HITHR_LOW 0x00 |
#define DIGIIN2_LED9_OFF 0x20 |
#define DIGIIN2_LED9_ON 0x00 |
#define DIGIIN2_LED_1_MASK 0x01 |
DIGI IN 2 LED register setting.
Specified setting for LED register of DIGI IN 2 Click driver.
#define DIGIIN2_LED_2_MASK 0x02 |
#define DIGIIN2_LED_3_MASK 0x04 |
#define DIGIIN2_LED_4_MASK 0x08 |
#define DIGIIN2_LED_5_MASK 0x10 |
#define DIGIIN2_LED_6_MASK 0x20 |
#define DIGIIN2_LED_7_MASK 0x40 |
#define DIGIIN2_LED_8_MASK 0x80 |
#define DIGIIN2_LEDINT_CFG_GPO 0x00 |
#define DIGIIN2_LEDINT_CFG_VMLOW 0x40 |
#define DIGIIN2_OTSHDN2_ERROR 0x04 |
#define DIGIIN2_OTSHDN2_ERROR_MASK 0x04 |
#define DIGIIN2_PIN_STATE_HIGH 0x01 |
DIGI IN 2 pin state setting.
Specified setting for pin state of DIGI IN 2 Click driver.
#define DIGIIN2_PIN_STATE_LOW 0x00 |
#define DIGIIN2_POR 0x40 |
#define DIGIIN2_REFDISHTCFG_DIS 0x00 |
#define DIGIIN2_REFDISHTCFG_EN 0x01 |
#define DIGIIN2_RFDIO_ERROR 0x02 |
#define DIGIIN2_RFDIO_ERROR_MASK 0x02 |
#define DIGIIN2_RFDIS_ERROR 0x01 |
#define DIGIIN2_RFDIS_ERROR_MASK 0x01 |
#define DIGIIN2_SET_DATA_SAMPLE_EDGE SET_SPI_DATA_SAMPLE_EDGE |
Data sample selection.
This macro sets data samples for SPI modules.
#define DIGIIN2_SET_DATA_SAMPLE_MIDDLE SET_SPI_DATA_SAMPLE_MIDDLE |
#define DIGIIN2_SINK_MODE 0x00 |
#define DIGIIN2_SOURCE_MODE 0x40 |
#define DIGIIN2_SPI8_CLK_ERROR 0x08 |
#define DIGIIN2_SPI8_CLK_ERROR_MASK 0x08 |
#define DIGIIN2_TEMPERATURE_ALARM 0x08 |
#define DIGIIN2_TEMPERATURE_ALARM_MASK 0x08 |
#define DIGIIN2_TERMAL_SHUTDOWN 0x10 |
#define DIGIIN2_TERMAL_SHUTDOWN_MASK 0x10 |
#define DIGIIN2_V24_UNDERVOLTAGE 0x04 |
#define DIGIIN2_V24_UNDERVOLTAGE_MASK 0x04 |
#define DIGIIN2_VAUV_UNDER_TRESHOLD 0x10 |
DIGI IN 2 FAULT2 register setting.
Specified setting for FAULT2 register of DIGI IN 2 Click driver.
#define DIGIIN2_VAUV_UNDER_TRESHOLD_MASK 0x10 |
DIGI IN 2 F2MASK register setting.
Specified setting for F2MASK register of DIGI IN 2 Click driver.
#define DIGIIN2_VM_VOLTAGE_LOW 0x02 |
#define DIGIIN2_VM_VOLTAGE_LOW_MASK 0x02 |