ipsdisplay2
2.1.0.0
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#define IPSDISPLAY2_CMD_CABCCTRL 0xC7 |
#define IPSDISPLAY2_CMD_CASET 0x2A |
#define IPSDISPLAY2_CMD_CMD2EN0 0xDF |
#define IPSDISPLAY2_CMD_CMD2EN1 0x5A |
#define IPSDISPLAY2_CMD_CMD2EN2 0x69 |
#define IPSDISPLAY2_CMD_CMD2EN3 0x02 |
#define IPSDISPLAY2_CMD_COLMOD 0x3A |
#define IPSDISPLAY2_CMD_DGMEN 0xBA |
#define IPSDISPLAY2_CMD_DGMLUTB 0xE3 |
#define IPSDISPLAY2_CMD_DGMLUTR 0xE2 |
#define IPSDISPLAY2_CMD_DISPOFF 0x28 |
#define IPSDISPLAY2_CMD_DISPON 0x29 |
#define IPSDISPLAY2_CMD_DLPOFFSAVE 0xBD |
#define IPSDISPLAY2_CMD_EQCTRL 0xE9 |
#define IPSDISPLAY2_CMD_FRCTR2 0xC6 |
#define IPSDISPLAY2_CMD_FRCTRL1 0xB3 |
#define IPSDISPLAY2_CMD_GAMSET 0x26 |
#define IPSDISPLAY2_CMD_GATECTRL 0xE4 |
#define IPSDISPLAY2_CMD_GCTRL 0xB7 |
#define IPSDISPLAY2_CMD_GTADJ 0xB8 |
#define IPSDISPLAY2_CMD_IDMOFF 0x38 |
#define IPSDISPLAY2_CMD_IDMON 0x39 |
#define IPSDISPLAY2_CMD_IDSET 0xC1 |
#define IPSDISPLAY2_CMD_INVOFF 0x20 |
#define IPSDISPLAY2_CMD_INVON 0x21 |
#define IPSDISPLAY2_CMD_LCMCTRL 0xC0 |
#define IPSDISPLAY2_CMD_MADCTL 0x36 |
#define IPSDISPLAY2_CMD_NOP 0x00 |
IPS Display 2 system function command list 1.
Specified system function command list 1 of IPS Display 2 Click driver.
#define IPSDISPLAY2_CMD_NORON 0x13 |
#define IPSDISPLAY2_CMD_NVGAMCTRL 0xE1 |
#define IPSDISPLAY2_CMD_NVMSET 0xFC |
#define IPSDISPLAY2_CMD_PARCTRL 0xB5 |
#define IPSDISPLAY2_CMD_PORCTRL 0xB2 |
#define IPSDISPLAY2_CMD_POWSAVE 0xBC |
#define IPSDISPLAY2_CMD_PROMACT 0xFE |
#define IPSDISPLAY2_CMD_PROMCTRL 0xEC |
#define IPSDISPLAY2_CMD_PROMEN 0xFA |
#define IPSDISPLAY2_CMD_PTLAR 0x30 |
#define IPSDISPLAY2_CMD_PTLON 0x12 |
#define IPSDISPLAY2_CMD_PVGAMCTRL 0xE0 |
#define IPSDISPLAY2_CMD_PWCTRL1 0xD0 |
#define IPSDISPLAY2_CMD_PWCTRL2 0xE8 |
#define IPSDISPLAY2_CMD_PWMFRSEL 0xCC |
#define IPSDISPLAY2_CMD_RAMCTRL 0xB0 |
IPS Display 2 system function command list 2.
Specified system function command list 2 of IPS Display 2 Click driver.
#define IPSDISPLAY2_CMD_RAMRD 0x2E |
#define IPSDISPLAY2_CMD_RAMRDC 0x3E |
#define IPSDISPLAY2_CMD_RAMWR 0x2C |
#define IPSDISPLAY2_CMD_RAMWRC 0x3C |
#define IPSDISPLAY2_CMD_RASET 0x2B |
#define IPSDISPLAY2_CMD_RDABCSDR 0x68 |
#define IPSDISPLAY2_CMD_RDCABC 0x56 |
#define IPSDISPLAY2_CMD_RDCABCMB 0x5F |
#define IPSDISPLAY2_CMD_RDCTRLD 0x54 |
#define IPSDISPLAY2_CMD_RDDCOLMOD 0x0C |
#define IPSDISPLAY2_CMD_RDDID 0x04 |
#define IPSDISPLAY2_CMD_RDDIM 0x0D |
#define IPSDISPLAY2_CMD_RDDISBV 0x52 |
#define IPSDISPLAY2_CMD_RDDMADCTL 0x0B |
#define IPSDISPLAY2_CMD_RDDPM 0x0A |
#define IPSDISPLAY2_CMD_RDDSDR 0x0F |
#define IPSDISPLAY2_CMD_RDDSM 0x0E |
#define IPSDISPLAY2_CMD_RDDST 0x09 |
#define IPSDISPLAY2_CMD_RDID1 0xDA |
#define IPSDISPLAY2_CMD_RDID2 0xDB |
#define IPSDISPLAY2_CMD_RDID3 0xDC |
#define IPSDISPLAY2_CMD_RDTESCAN 0x45 |
#define IPSDISPLAY2_CMD_REGSEL1 0xC8 |
#define IPSDISPLAY2_CMD_REGSEL2 0xCA |
#define IPSDISPLAY2_CMD_RGBCTRL 0xB1 |
#define IPSDISPLAY2_CMD_SLPIN 0x10 |
#define IPSDISPLAY2_CMD_SLPOUT 0x11 |
#define IPSDISPLAY2_CMD_SPI2EN 0xE7 |
#define IPSDISPLAY2_CMD_SWRESET 0x01 |
#define IPSDISPLAY2_CMD_TEOFF 0x34 |
#define IPSDISPLAY2_CMD_TEON 0x35 |
#define IPSDISPLAY2_CMD_TESCAN 0x44 |
#define IPSDISPLAY2_CMD_VAPVANEN 0xD2 |
#define IPSDISPLAY2_CMD_VCMOFSET 0xC5 |
#define IPSDISPLAY2_CMD_VCOMS 0xBB |
#define IPSDISPLAY2_CMD_VDVSET 0xC4 |
#define IPSDISPLAY2_CMD_VDVVRHEN 0xC2 |
#define IPSDISPLAY2_CMD_VRHS 0xC3 |
#define IPSDISPLAY2_CMD_VSCRDEF 0x33 |
#define IPSDISPLAY2_CMD_VSCRSADD 0x37 |
#define IPSDISPLAY2_CMD_WRCABCMB 0x5E |
#define IPSDISPLAY2_CMD_WRCACE 0x55 |
#define IPSDISPLAY2_CMD_WRCTRLD 0x53 |
#define IPSDISPLAY2_CMD_WRDISBV 0x51 |