ipsdisplay2 2.1.0.0
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ipsdisplay2.h
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1/****************************************************************************
2** Copyright (C) 2020 MikroElektronika d.o.o.
3** Contact: https://www.mikroe.com/contact
4**
5** Permission is hereby granted, free of charge, to any person obtaining a copy
6** of this software and associated documentation files (the "Software"), to deal
7** in the Software without restriction, including without limitation the rights
8** to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
9** copies of the Software, and to permit persons to whom the Software is
10** furnished to do so, subject to the following conditions:
11** The above copyright notice and this permission notice shall be
12** included in all copies or substantial portions of the Software.
13**
14** THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
15** EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
16** OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
17** IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM,
18** DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT
19** OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
20** USE OR OTHER DEALINGS IN THE SOFTWARE.
21****************************************************************************/
22
28#ifndef IPSDISPLAY2_H
29#define IPSDISPLAY2_H
30
31#ifdef __cplusplus
32extern "C"{
33#endif
34
39#ifdef PREINIT_SUPPORTED
40#include "preinit.h"
41#endif
42
43#ifdef MikroCCoreVersion
44 #if MikroCCoreVersion >= 1
45 #include "delays.h"
46 #endif
47#endif
48
49#include "drv_digital_out.h"
50#include "drv_digital_in.h"
51#include "drv_spi_master.h"
52#include "spi_specifics.h"
53
74#define IPSDISPLAY2_CMD_NOP 0x00
75#define IPSDISPLAY2_CMD_SWRESET 0x01
76#define IPSDISPLAY2_CMD_RDDID 0x04
77#define IPSDISPLAY2_CMD_RDDST 0x09
78#define IPSDISPLAY2_CMD_RDDPM 0x0A
79#define IPSDISPLAY2_CMD_RDDMADCTL 0x0B
80#define IPSDISPLAY2_CMD_RDDCOLMOD 0x0C
81#define IPSDISPLAY2_CMD_RDDIM 0x0D
82#define IPSDISPLAY2_CMD_RDDSM 0x0E
83#define IPSDISPLAY2_CMD_RDDSDR 0x0F
84#define IPSDISPLAY2_CMD_SLPIN 0x10
85#define IPSDISPLAY2_CMD_SLPOUT 0x11
86#define IPSDISPLAY2_CMD_PTLON 0x12
87#define IPSDISPLAY2_CMD_NORON 0x13
88#define IPSDISPLAY2_CMD_INVOFF 0x20
89#define IPSDISPLAY2_CMD_INVON 0x21
90#define IPSDISPLAY2_CMD_GAMSET 0x26
91#define IPSDISPLAY2_CMD_DISPOFF 0x28
92#define IPSDISPLAY2_CMD_DISPON 0x29
93#define IPSDISPLAY2_CMD_CASET 0x2A
94#define IPSDISPLAY2_CMD_RASET 0x2B
95#define IPSDISPLAY2_CMD_RAMWR 0x2C
96#define IPSDISPLAY2_CMD_RAMRD 0x2E
97#define IPSDISPLAY2_CMD_PTLAR 0x30
98#define IPSDISPLAY2_CMD_VSCRDEF 0x33
99#define IPSDISPLAY2_CMD_TEOFF 0x34
100#define IPSDISPLAY2_CMD_TEON 0x35
101#define IPSDISPLAY2_CMD_MADCTL 0x36
102#define IPSDISPLAY2_CMD_VSCRSADD 0x37
103#define IPSDISPLAY2_CMD_IDMOFF 0x38
104#define IPSDISPLAY2_CMD_IDMON 0x39
105#define IPSDISPLAY2_CMD_COLMOD 0x3A
106#define IPSDISPLAY2_CMD_RAMWRC 0x3C
107#define IPSDISPLAY2_CMD_RAMRDC 0x3E
108#define IPSDISPLAY2_CMD_TESCAN 0x44
109#define IPSDISPLAY2_CMD_RDTESCAN 0x45
110#define IPSDISPLAY2_CMD_WRDISBV 0x51
111#define IPSDISPLAY2_CMD_RDDISBV 0x52
112#define IPSDISPLAY2_CMD_WRCTRLD 0x53
113#define IPSDISPLAY2_CMD_RDCTRLD 0x54
114#define IPSDISPLAY2_CMD_WRCACE 0x55
115#define IPSDISPLAY2_CMD_RDCABC 0x56
116#define IPSDISPLAY2_CMD_WRCABCMB 0x5E
117#define IPSDISPLAY2_CMD_RDCABCMB 0x5F
118#define IPSDISPLAY2_CMD_RDABCSDR 0x68
119#define IPSDISPLAY2_CMD_RDID1 0xDA
120#define IPSDISPLAY2_CMD_RDID2 0xDB
121#define IPSDISPLAY2_CMD_RDID3 0xDC
122
127#define IPSDISPLAY2_CMD_RAMCTRL 0xB0
128#define IPSDISPLAY2_CMD_RGBCTRL 0xB1
129#define IPSDISPLAY2_CMD_PORCTRL 0xB2
130#define IPSDISPLAY2_CMD_FRCTRL1 0xB3
131#define IPSDISPLAY2_CMD_PARCTRL 0xB5
132#define IPSDISPLAY2_CMD_GCTRL 0xB7
133#define IPSDISPLAY2_CMD_GTADJ 0xB8
134#define IPSDISPLAY2_CMD_DGMEN 0xBA
135#define IPSDISPLAY2_CMD_VCOMS 0xBB
136#define IPSDISPLAY2_CMD_POWSAVE 0xBC
137#define IPSDISPLAY2_CMD_DLPOFFSAVE 0xBD
138#define IPSDISPLAY2_CMD_LCMCTRL 0xC0
139#define IPSDISPLAY2_CMD_IDSET 0xC1
140#define IPSDISPLAY2_CMD_VDVVRHEN 0xC2
141#define IPSDISPLAY2_CMD_VRHS 0xC3
142#define IPSDISPLAY2_CMD_VDVSET 0xC4
143#define IPSDISPLAY2_CMD_VCMOFSET 0xC5
144#define IPSDISPLAY2_CMD_FRCTR2 0xC6
145#define IPSDISPLAY2_CMD_CABCCTRL 0xC7
146#define IPSDISPLAY2_CMD_REGSEL1 0xC8
147#define IPSDISPLAY2_CMD_REGSEL2 0xCA
148#define IPSDISPLAY2_CMD_PWMFRSEL 0xCC
149#define IPSDISPLAY2_CMD_PWCTRL1 0xD0
150#define IPSDISPLAY2_CMD_VAPVANEN 0xD2
151#define IPSDISPLAY2_CMD_CMD2EN0 0xDF
152#define IPSDISPLAY2_CMD_CMD2EN1 0x5A
153#define IPSDISPLAY2_CMD_CMD2EN2 0x69
154#define IPSDISPLAY2_CMD_CMD2EN3 0x02
155#define IPSDISPLAY2_CMD_PVGAMCTRL 0xE0
156#define IPSDISPLAY2_CMD_NVGAMCTRL 0xE1
157#define IPSDISPLAY2_CMD_DGMLUTR 0xE2
158#define IPSDISPLAY2_CMD_DGMLUTB 0xE3
159#define IPSDISPLAY2_CMD_GATECTRL 0xE4
160#define IPSDISPLAY2_CMD_SPI2EN 0xE7
161#define IPSDISPLAY2_CMD_PWCTRL2 0xE8
162#define IPSDISPLAY2_CMD_EQCTRL 0xE9
163#define IPSDISPLAY2_CMD_PROMCTRL 0xEC
164#define IPSDISPLAY2_CMD_PROMEN 0xFA
165#define IPSDISPLAY2_CMD_NVMSET 0xFC
166#define IPSDISPLAY2_CMD_PROMACT 0xFE
167
168 // ipsdisplay2_cmd
169
184#define IPSDISPLAY2_MADCTL_DEFAULT 0x00
185#define IPSDISPLAY2_MADCTL_MY 0x80
186#define IPSDISPLAY2_MADCTL_MX 0x40
187#define IPSDISPLAY2_MADCTL_MV 0x20
188#define IPSDISPLAY2_MADCTL_ML 0x10
189#define IPSDISPLAY2_MADCTL_RGB 0x08
190#define IPSDISPLAY2_MADCTL_MH 0x04
191
196#define IPSDISPLAY2_COLMOD_RGB_65K 0x50
197#define IPSDISPLAY2_COLMOD_RGB_262K 0x60
198#define IPSDISPLAY2_COLMOD_RGB_MASK 0x70
199#define IPSDISPLAY2_COLMOD_CTRL_12BIT_PIXEL 0x03
200#define IPSDISPLAY2_COLMOD_CTRL_16BIT_PIXEL 0x05
201#define IPSDISPLAY2_COLMOD_CTRL_18BIT_PIXEL 0x06
202#define IPSDISPLAY2_COLMOD_CTRL_16M_TRUNCATED 0x07
203#define IPSDISPLAY2_COLMOD_CTRL_MASK 0x07
204
209#define IPSDISPLAY2_PORCTRL_0_BPA_DEFAULT 0x0C
210#define IPSDISPLAY2_PORCTRL_0_BPA_MASK 0x7F
211#define IPSDISPLAY2_PORCTRL_1_FPA_DEFAULT 0x0C
212#define IPSDISPLAY2_PORCTRL_1_FPA_MASK 0x7F
213#define IPSDISPLAY2_PORCTRL_2_PSEN_DISABLE 0x00
214#define IPSDISPLAY2_PORCTRL_2_PSEN_ENABLE 0x01
215#define IPSDISPLAY2_PORCTRL_3_BPB_DEFAULT 0x30
216#define IPSDISPLAY2_PORCTRL_3_BPB_MASK 0xF0
217#define IPSDISPLAY2_PORCTRL_3_FPB_DEFAULT 0x03
218#define IPSDISPLAY2_PORCTRL_3_FPB_MASK 0x0F
219#define IPSDISPLAY2_PORCTRL_4_BPC_DEFAULT 0x30
220#define IPSDISPLAY2_PORCTRL_4_BPC_MASK 0xF0
221#define IPSDISPLAY2_PORCTRL_4_FPC_DEFAULT 0x03
222#define IPSDISPLAY2_PORCTRL_4_FPC_MASK 0x0F
223
228#define IPSDISPLAY2_GCTRL_VGHS_DEFAULT 0x30
229#define IPSDISPLAY2_GCTRL_VGHS_MASK 0x70
230#define IPSDISPLAY2_GCTRL_VGLS_DEFAULT 0x05
231#define IPSDISPLAY2_GCTRL_VGLS_MASK 0x07
232
237#define IPSDISPLAY2_VCOMS_VCOM_DEFAULT 0x3A
238#define IPSDISPLAY2_VCOMS_VCOM_MASK 0x3F
239
244#define IPSDISPLAY2_LCMCTRL_XMY 0x40
245#define IPSDISPLAY2_LCMCTRL_XBGR 0x20
246#define IPSDISPLAY2_LCMCTRL_XINV 0x10
247#define IPSDISPLAY2_LCMCTRL_XMX 0x08
248#define IPSDISPLAY2_LCMCTRL_XMH 0x04
249#define IPSDISPLAY2_LCMCTRL_XMV 0x02
250#define IPSDISPLAY2_LCMCTRL_XGS 0x01
251
256#define IPSDISPLAY2_VDVVRHEN_CMDEN_DISABLE 0x00
257#define IPSDISPLAY2_VDVVRHEN_CMDEN_ENABLE 0x01
258
263#define IPSDISPLAY2_VRHS_DEFAULT 0x19
264#define IPSDISPLAY2_VRHS_MASK 0x3F
265
270#define IPSDISPLAY2_VDVSET_DEFAULT 0x20
271#define IPSDISPLAY2_VDVSET_MASK 0x3F
272
277#define IPSDISPLAY2_FRCTR2_NLA_DEFAULT 0x00
278#define IPSDISPLAY2_FRCTR2_NLA_MASK 0xE0
279#define IPSDISPLAY2_FRCTR2_RTNA_DEFAULT 0x0F
280#define IPSDISPLAY2_FRCTR2_RTNA_MASK 0x1F
281
286#define IPSDISPLAY2_PWCTRL1_0_DEFAULT 0xA4
287#define IPSDISPLAY2_PWCTRL1_1_AVDD_DEFAULT 0x80
288#define IPSDISPLAY2_PWCTRL1_1_AVDD_MASK 0xC0
289#define IPSDISPLAY2_PWCTRL1_1_AVCL_DEFAULT 0x20
290#define IPSDISPLAY2_PWCTRL1_1_AVCL_MASK 0x30
291#define IPSDISPLAY2_PWCTRL1_1_VDS_DEFAULT 0x01
292#define IPSDISPLAY2_PWCTRL1_1_VDS_MASK 0x03
293
298#define IPSDISPLAY2_PVGAMCTRL_0_V63P_DEFAULT 0xD0
299#define IPSDISPLAY2_PVGAMCTRL_0_V63P_MASK 0xF0
300#define IPSDISPLAY2_PVGAMCTRL_0_V0P_DEFAULT 0x00
301#define IPSDISPLAY2_PVGAMCTRL_0_V0P_MASK 0x0F
302#define IPSDISPLAY2_PVGAMCTRL_1_V1P_DEFAULT 0x08
303#define IPSDISPLAY2_PVGAMCTRL_1_V1P_MASK 0x3F
304#define IPSDISPLAY2_PVGAMCTRL_2_V2P_DEFAULT 0x0E
305#define IPSDISPLAY2_PVGAMCTRL_2_V2P_MASK 0x3F
306#define IPSDISPLAY2_PVGAMCTRL_3_V4P_DEFAULT 0x09
307#define IPSDISPLAY2_PVGAMCTRL_3_V4P_MASK 0x1F
308#define IPSDISPLAY2_PVGAMCTRL_4_V6P_DEFAULT 0x09
309#define IPSDISPLAY2_PVGAMCTRL_4_V6P_MASK 0x1F
310#define IPSDISPLAY2_PVGAMCTRL_5_J0P_DEFAULT 0x00
311#define IPSDISPLAY2_PVGAMCTRL_5_J0P_MASK 0x30
312#define IPSDISPLAY2_PVGAMCTRL_5_J13P_DEFAULT 0x05
313#define IPSDISPLAY2_PVGAMCTRL_5_J13P_MASK 0x0F
314#define IPSDISPLAY2_PVGAMCTRL_6_V20P_DEFAULT 0x31
315#define IPSDISPLAY2_PVGAMCTRL_6_V20P_MASK 0x7F
316#define IPSDISPLAY2_PVGAMCTRL_7_V36P_DEFAULT 0x30
317#define IPSDISPLAY2_PVGAMCTRL_7_V36P_MASK 0x70
318#define IPSDISPLAY2_PVGAMCTRL_7_V27P_DEFAULT 0x03
319#define IPSDISPLAY2_PVGAMCTRL_7_V27P_MASK 0x07
320#define IPSDISPLAY2_PVGAMCTRL_8_V43P_DEFAULT 0x48
321#define IPSDISPLAY2_PVGAMCTRL_8_V43P_MASK 0x7F
322#define IPSDISPLAY2_PVGAMCTRL_9_J1P_DEFAULT 0x10
323#define IPSDISPLAY2_PVGAMCTRL_9_11P_MASK 0x30
324#define IPSDISPLAY2_PVGAMCTRL_9_V50P_DEFAULT 0x07
325#define IPSDISPLAY2_PVGAMCTRL_9_V50P_MASK 0x0F
326#define IPSDISPLAY2_PVGAMCTRL_10_V57P_DEFAULT 0x14
327#define IPSDISPLAY2_PVGAMCTRL_10_V57P_MASK 0x1F
328#define IPSDISPLAY2_PVGAMCTRL_11_V59P_DEFAULT 0x15
329#define IPSDISPLAY2_PVGAMCTRL_11_V59P_MASK 0x1F
330#define IPSDISPLAY2_PVGAMCTRL_12_V61P_DEFAULT 0x31
331#define IPSDISPLAY2_PVGAMCTRL_12_V61P_MASK 0x3F
332#define IPSDISPLAY2_PVGAMCTRL_13_V62P_DEFAULT 0x34
333#define IPSDISPLAY2_PVGAMCTRL_13_V62P_MASK 0x3F
334
339#define IPSDISPLAY2_NVGAMCTRL_0_V63N_DEFAULT 0xD0
340#define IPSDISPLAY2_NVGAMCTRL_0_V63N_MASK 0xF0
341#define IPSDISPLAY2_NVGAMCTRL_0_V0N_DEFAULT 0x00
342#define IPSDISPLAY2_NVGAMCTRL_0_V0N_MASK 0x0F
343#define IPSDISPLAY2_NVGAMCTRL_1_V1N_DEFAULT 0x08
344#define IPSDISPLAY2_NVGAMCTRL_1_V1N_MASK 0x3F
345#define IPSDISPLAY2_NVGAMCTRL_2_V2N_DEFAULT 0x0E
346#define IPSDISPLAY2_NVGAMCTRL_2_V2N_MASK 0x3F
347#define IPSDISPLAY2_NVGAMCTRL_3_V4N_DEFAULT 0x09
348#define IPSDISPLAY2_NVGAMCTRL_3_V4N_MASK 0x1F
349#define IPSDISPLAY2_NVGAMCTRL_4_V6N_DEFAULT 0x09
350#define IPSDISPLAY2_NVGAMCTRL_4_V6N_MASK 0x1F
351#define IPSDISPLAY2_NVGAMCTRL_5_J0N_DEFAULT 0x10
352#define IPSDISPLAY2_NVGAMCTRL_5_J0N_MASK 0x30
353#define IPSDISPLAY2_NVGAMCTRL_5_J13N_DEFAULT 0x05
354#define IPSDISPLAY2_NVGAMCTRL_5_J13N_MASK 0x0F
355#define IPSDISPLAY2_NVGAMCTRL_6_V20N_DEFAULT 0x31
356#define IPSDISPLAY2_NVGAMCTRL_6_V20N_MASK 0x7F
357#define IPSDISPLAY2_NVGAMCTRL_7_V36N_DEFAULT 0x30
358#define IPSDISPLAY2_NVGAMCTRL_7_V36N_MASK 0x70
359#define IPSDISPLAY2_NVGAMCTRL_7_V27N_DEFAULT 0x03
360#define IPSDISPLAY2_NVGAMCTRL_7_V27N_MASK 0x07
361#define IPSDISPLAY2_NVGAMCTRL_8_V43N_DEFAULT 0x48
362#define IPSDISPLAY2_NVGAMCTRL_8_V43N_MASK 0x7F
363#define IPSDISPLAY2_NVGAMCTRL_9_J1N_DEFAULT 0x10
364#define IPSDISPLAY2_NVGAMCTRL_9_11N_MASK 0x30
365#define IPSDISPLAY2_NVGAMCTRL_9_V50N_DEFAULT 0x07
366#define IPSDISPLAY2_NVGAMCTRL_9_V50N_MASK 0x0F
367#define IPSDISPLAY2_NVGAMCTRL_10_V57N_DEFAULT 0x14
368#define IPSDISPLAY2_NVGAMCTRL_10_V57N_MASK 0x1F
369#define IPSDISPLAY2_NVGAMCTRL_11_V59N_DEFAULT 0x15
370#define IPSDISPLAY2_NVGAMCTRL_11_V59N_MASK 0x1F
371#define IPSDISPLAY2_NVGAMCTRL_12_V61N_DEFAULT 0x31
372#define IPSDISPLAY2_NVGAMCTRL_12_V61N_MASK 0x3F
373#define IPSDISPLAY2_NVGAMCTRL_13_V62N_DEFAULT 0x34
374#define IPSDISPLAY2_NVGAMCTRL_13_V62N_MASK 0x3F
375
380#define IPSDISPLAY2_RES_WIDTH 240
381#define IPSDISPLAY2_RES_HEIGHT 240
382#define IPSDISPLAY2_NUM_PIXELS ( ( uint16_t ) IPSDISPLAY2_RES_WIDTH * IPSDISPLAY2_RES_HEIGHT )
383
388#define IPSDISPLAY2_POS_WIDTH_MIN 0
389#define IPSDISPLAY2_POS_WIDTH_MAX ( IPSDISPLAY2_RES_WIDTH - 1 )
390#define IPSDISPLAY2_POS_HEIGHT_MIN 0
391#define IPSDISPLAY2_POS_HEIGHT_MAX ( IPSDISPLAY2_RES_HEIGHT - 1 )
392#define IPSDISPLAY2_POS_OFFSET_LEFT 0
393#define IPSDISPLAY2_POS_OFFSET_RIGHT 0
394#define IPSDISPLAY2_POS_OFFSET_UP 0
395#define IPSDISPLAY2_POS_OFFSET_DOWN 80
396
401#define IPSDISPLAY2_FONT_WIDTH 6
402#define IPSDISPLAY2_FONT_HEIGHT 12
403#define IPSDISPLAY2_FONT_TEXT_SPACE 1
404#define IPSDISPLAY2_FONT_ASCII_OFFSET 32
405#define IPSDISPLAY2_FONT_WIDTH_MSB 0x80
406
411#define IPSDISPLAY2_ROTATION_VERTICAL_0 0
412#define IPSDISPLAY2_ROTATION_VERTICAL_180 1
413#define IPSDISPLAY2_ROTATION_HORIZONTAL_0 2
414#define IPSDISPLAY2_ROTATION_HORIZONTAL_180 3
415
420#define IPSDISPLAY2_COLOR_BLACK 0x0000
421#define IPSDISPLAY2_COLOR_WHITE 0xFFFF
422#define IPSDISPLAY2_COLOR_RED 0xF800
423#define IPSDISPLAY2_COLOR_LIME 0x07E0
424#define IPSDISPLAY2_COLOR_BLUE 0x001F
425#define IPSDISPLAY2_COLOR_YELLOW 0xFFE0
426#define IPSDISPLAY2_COLOR_CYAN 0x07FF
427#define IPSDISPLAY2_COLOR_MAGENTA 0xF81F
428#define IPSDISPLAY2_COLOR_SILVER 0xBDF7
429#define IPSDISPLAY2_COLOR_GRAY 0x8410
430#define IPSDISPLAY2_COLOR_MAROON 0x8000
431#define IPSDISPLAY2_COLOR_OLIVE 0x8400
432#define IPSDISPLAY2_COLOR_GREEN 0x0400
433#define IPSDISPLAY2_COLOR_PURPLE 0x8010
434#define IPSDISPLAY2_COLOR_TEAL 0x0410
435#define IPSDISPLAY2_COLOR_NAVY 0x0010
436
445#define IPSDISPLAY2_SET_DATA_SAMPLE_EDGE SET_SPI_DATA_SAMPLE_EDGE
446#define IPSDISPLAY2_SET_DATA_SAMPLE_MIDDLE SET_SPI_DATA_SAMPLE_MIDDLE
447
448 // ipsdisplay2_set
449
464#define IPSDISPLAY2_MAP_MIKROBUS( cfg, mikrobus ) \
465 cfg.miso = MIKROBUS( mikrobus, MIKROBUS_MISO ); \
466 cfg.mosi = MIKROBUS( mikrobus, MIKROBUS_MOSI ); \
467 cfg.sck = MIKROBUS( mikrobus, MIKROBUS_SCK ); \
468 cfg.cs = MIKROBUS( mikrobus, MIKROBUS_CS ); \
469 cfg.rst = MIKROBUS( mikrobus, MIKROBUS_RST ); \
470 cfg.bck = MIKROBUS( mikrobus, MIKROBUS_AN ); \
471 cfg.dc = MIKROBUS( mikrobus, MIKROBUS_INT )
472
473 // ipsdisplay2_map
474 // ipsdisplay2
475
480typedef struct
481{
482 // Output pins
483 digital_out_t rst;
484 digital_out_t dc;
485 digital_out_t cs;
486 digital_out_t bck;
488 // Modules
489 spi_master_t spi;
491 uint8_t rotation;
494
499typedef struct
500{
501 // Communication gpio pins
502 pin_name_t miso;
503 pin_name_t mosi;
504 pin_name_t sck;
505 pin_name_t cs;
507 // Additional gpio pins
508 pin_name_t rst;
509 pin_name_t dc;
510 pin_name_t bck;
512 // static variable
513 uint32_t spi_speed;
514 spi_master_mode_t spi_mode;
517
522typedef struct
523{
524 uint16_t x;
525 uint16_t y;
528
539
556
571
585
597err_t ipsdisplay2_write_cmd ( ipsdisplay2_t *ctx, uint8_t cmd );
598
613err_t ipsdisplay2_write_cmd_par ( ipsdisplay2_t *ctx, uint8_t cmd, uint8_t *data_in, uint8_t len );
614
627err_t ipsdisplay2_write_data ( ipsdisplay2_t *ctx, uint16_t *data_in, uint16_t len );
628
638
648
658
668
678
688
698
713err_t ipsdisplay2_set_rotation ( ipsdisplay2_t *ctx, uint8_t rotation );
714
730
742err_t ipsdisplay2_fill_screen ( ipsdisplay2_t *ctx, uint16_t color );
743
759err_t ipsdisplay2_write_char ( ipsdisplay2_t *ctx, ipsdisplay2_point_t start_pt, uint8_t data_in, uint16_t color );
760
776err_t ipsdisplay2_write_string ( ipsdisplay2_t *ctx, ipsdisplay2_point_t start_pt, uint8_t *data_in, uint16_t color );
777
791err_t ipsdisplay2_draw_pixel ( ipsdisplay2_t *ctx, ipsdisplay2_point_t start_pt, uint16_t color );
792
809 ipsdisplay2_point_t end_pt, uint16_t color );
810
827 ipsdisplay2_point_t end_pt, uint16_t color );
828
842err_t ipsdisplay2_draw_circle ( ipsdisplay2_t *ctx, ipsdisplay2_point_t center_pt, uint8_t radius, uint16_t color );
843
859err_t ipsdisplay2_draw_picture ( ipsdisplay2_t *ctx, uint8_t rotation, const uint16_t *image );
860
861#ifdef __cplusplus
862}
863#endif
864#endif // IPSDISPLAY2_H
865
866 // ipsdisplay2
867
868// ------------------------------------------------------------------------ END
void ipsdisplay2_disable_device(ipsdisplay2_t *ctx)
IPS Display 2 disable device function.
err_t ipsdisplay2_draw_circle(ipsdisplay2_t *ctx, ipsdisplay2_point_t center_pt, uint8_t radius, uint16_t color)
IPS Display 2 draw circle function.
void ipsdisplay2_enter_data_mode(ipsdisplay2_t *ctx)
IPS Display 2 enter data mode function.
void ipsdisplay2_disable_backlight(ipsdisplay2_t *ctx)
IPS Display 2 disable backlight function.
err_t ipsdisplay2_set_pos(ipsdisplay2_t *ctx, ipsdisplay2_point_t start_pt, ipsdisplay2_point_t end_pt)
IPS Display 2 set pos function.
err_t ipsdisplay2_set_rotation(ipsdisplay2_t *ctx, uint8_t rotation)
IPS Display 2 set rotation function.
err_t ipsdisplay2_draw_pixel(ipsdisplay2_t *ctx, ipsdisplay2_point_t start_pt, uint16_t color)
IPS Display 2 draw pixel function.
err_t ipsdisplay2_draw_picture(ipsdisplay2_t *ctx, uint8_t rotation, const uint16_t *image)
IPS Display 2 draw picture function.
err_t ipsdisplay2_draw_rectangle(ipsdisplay2_t *ctx, ipsdisplay2_point_t start_pt, ipsdisplay2_point_t end_pt, uint16_t color)
IPS Display 2 draw rectangle function.
void ipsdisplay2_cfg_setup(ipsdisplay2_cfg_t *cfg)
IPS Display 2 configuration object setup function.
err_t ipsdisplay2_write_string(ipsdisplay2_t *ctx, ipsdisplay2_point_t start_pt, uint8_t *data_in, uint16_t color)
IPS Display 2 write string function.
void ipsdisplay2_reset_device(ipsdisplay2_t *ctx)
IPS Display 2 reset device function.
void ipsdisplay2_enable_device(ipsdisplay2_t *ctx)
IPS Display 2 enable device function.
err_t ipsdisplay2_write_cmd(ipsdisplay2_t *ctx, uint8_t cmd)
IPS Display 2 write cmd function.
err_t ipsdisplay2_fill_screen(ipsdisplay2_t *ctx, uint16_t color)
IPS Display 2 fill screen function.
void ipsdisplay2_enable_backlight(ipsdisplay2_t *ctx)
IPS Display 2 enable backlight function.
err_t ipsdisplay2_write_cmd_par(ipsdisplay2_t *ctx, uint8_t cmd, uint8_t *data_in, uint8_t len)
IPS Display 2 write cmd par function.
err_t ipsdisplay2_default_cfg(ipsdisplay2_t *ctx)
IPS Display 2 default configuration function.
void ipsdisplay2_enter_cmd_mode(ipsdisplay2_t *ctx)
IPS Display 2 enter cmd mode function.
err_t ipsdisplay2_write_char(ipsdisplay2_t *ctx, ipsdisplay2_point_t start_pt, uint8_t data_in, uint16_t color)
IPS Display 2 write char function.
err_t ipsdisplay2_write_data(ipsdisplay2_t *ctx, uint16_t *data_in, uint16_t len)
IPS Display 2 write data function.
err_t ipsdisplay2_draw_line(ipsdisplay2_t *ctx, ipsdisplay2_point_t start_pt, ipsdisplay2_point_t end_pt, uint16_t color)
IPS Display 2 draw line function.
err_t ipsdisplay2_init(ipsdisplay2_t *ctx, ipsdisplay2_cfg_t *cfg)
IPS Display 2 initialization function.
ipsdisplay2_return_value_t
IPS Display 2 Click return value data.
Definition ipsdisplay2.h:534
@ IPSDISPLAY2_ERROR
Definition ipsdisplay2.h:536
@ IPSDISPLAY2_OK
Definition ipsdisplay2.h:535
This file contains SPI specific macros, functions, etc.
IPS Display 2 Click configuration object.
Definition ipsdisplay2.h:500
pin_name_t sck
Definition ipsdisplay2.h:504
spi_master_mode_t spi_mode
Definition ipsdisplay2.h:514
pin_name_t dc
Definition ipsdisplay2.h:509
pin_name_t mosi
Definition ipsdisplay2.h:503
uint32_t spi_speed
Definition ipsdisplay2.h:513
pin_name_t miso
Definition ipsdisplay2.h:502
pin_name_t rst
Definition ipsdisplay2.h:508
pin_name_t cs
Definition ipsdisplay2.h:505
pin_name_t bck
Definition ipsdisplay2.h:510
IPS Display 2 Click point coordinates object.
Definition ipsdisplay2.h:523
uint16_t x
Definition ipsdisplay2.h:524
uint16_t y
Definition ipsdisplay2.h:525
IPS Display 2 Click context object.
Definition ipsdisplay2.h:481
digital_out_t cs
Definition ipsdisplay2.h:485
spi_master_t spi
Definition ipsdisplay2.h:489
digital_out_t bck
Definition ipsdisplay2.h:486
uint8_t rotation
Definition ipsdisplay2.h:491
digital_out_t dc
Definition ipsdisplay2.h:484
digital_out_t rst
Definition ipsdisplay2.h:483