isoadc7  2.1.0.0
isoadc7.h
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22 
28 #ifndef ISOADC7_H
29 #define ISOADC7_H
30 
31 #ifdef __cplusplus
32 extern "C"{
33 #endif
34 
39 #ifdef PREINIT_SUPPORTED
40 #include "preinit.h"
41 #endif
42 
43 #ifdef MikroCCoreVersion
44  #if MikroCCoreVersion >= 1
45  #include "delays.h"
46  #endif
47 #endif
48 
49 #include "drv_digital_out.h"
50 #include "drv_digital_in.h"
51 #include "drv_spi_master.h"
52 #include "spi_specifics.h"
53 
74 #define ISOADC7_CMD_NULL 0x0000
75 #define ISOADC7_CMD_RESET 0x0011
76 #define ISOADC7_CMD_STANDBY 0x0022
77 #define ISOADC7_CMD_WAKEUP 0x0033
78 #define ISOADC7_CMD_LOCK 0x0555
79 #define ISOADC7_CMD_UNLOCK 0x0655
80 #define ISOADC7_CMD_RREG 0xA000
81 #define ISOADC7_CMD_WREG 0x6000
82 
87 #define ISOADC7_RSP_RESET 0xFF23
88 #define ISOADC7_RSP_STANDBY 0x0022
89 #define ISOADC7_RSP_WAKEUP 0x0033
90 #define ISOADC7_RSP_LOCK 0x0555
91 #define ISOADC7_RSP_UNLOCK 0x0655
92 #define ISOADC7_RSP_RREG 0xE000
93 #define ISOADC7_RSP_WREG 0x4000
94 
99 #define ISOADC7_REG_ID 0x00
100 #define ISOADC7_REG_STATUS 0x01
101 #define ISOADC7_REG_MODE 0x02
102 #define ISOADC7_REG_CLOCK 0x03
103 #define ISOADC7_REG_GAIN 0x04
104 #define ISOADC7_REG_CFG 0x06
105 #define ISOADC7_REG_CH0_CFG 0x09
106 #define ISOADC7_REG_CH0_OCAL_MSB 0x0A
107 #define ISOADC7_REG_CH0_OCAL_LSB 0x0B
108 #define ISOADC7_REG_CH0_GCAL_MSB 0x0C
109 #define ISOADC7_REG_CH0_GCAL_LSB 0x0D
110 #define ISOADC7_REG_CH1_CFG 0x0E
111 #define ISOADC7_REG_CH1_OCAL_MSB 0x0F
112 #define ISOADC7_REG_CH1_OCAL_LSB 0x10
113 #define ISOADC7_REG_CH1_GCAL_MSB 0x11
114 #define ISOADC7_REG_CH1_GCAL_LSB 0x12
115 #define ISOADC7_REG_CH2_CFG 0x13
116 #define ISOADC7_REG_CH2_OCAL_MSB 0x14
117 #define ISOADC7_REG_CH2_OCAL_LSB 0x15
118 #define ISOADC7_REG_CH2_GCAL_MSB 0x16
119 #define ISOADC7_REG_CH2_GCAL_LSB 0x17
120 #define ISOADC7_REG_DCDC_CTRL 0x31
121 #define ISOADC7_REG_REGMAP_CRC 0x3E
122  // isoadc7_reg
124 
139 #define ISOADC7_DEVICE_ID 0x2300
140 #define ISOADC7_DEVICE_ID_MASK 0xFF00
141 
146 #define ISOADC7_STATUS_LOCK 0x8000
147 #define ISOADC7_STATUS_F_RESYNC 0x4000
148 #define ISOADC7_STATUS_REG_MAP 0x2000
149 #define ISOADC7_STATUS_CRC_ERR 0x1000
150 #define ISOADC7_STATUS_CRC_TYPE_CCITT 0x0000
151 #define ISOADC7_STATUS_CRC_TYPE_ANSI 0x0800
152 #define ISOADC7_STATUS_CRC_TYPE_MASK 0x0800
153 #define ISOADC7_STATUS_RESET 0x0400
154 #define ISOADC7_STATUS_WLENGTH_16BIT 0x0000
155 #define ISOADC7_STATUS_WLENGTH_24BIT 0x0100
156 #define ISOADC7_STATUS_WLENGTH_32BIT_ZERO 0x0200
157 #define ISOADC7_STATUS_WLENGTH_32BIT_MSB 0x0300
158 #define ISOADC7_STATUS_WLENGTH_MASK 0x0300
159 #define ISOADC7_STATUS_FUSE_FAIL 0x0080
160 #define ISOADC7_STATUS_SEC_FAIL 0x0040
161 #define ISOADC7_STATUS_DRDY2 0x0004
162 #define ISOADC7_STATUS_DRDY1 0x0002
163 #define ISOADC7_STATUS_DRDY0 0x0001
164 
169 #define ISOADC7_MODE_REG_CRC_EN 0x2000
170 #define ISOADC7_MODE_RX_CRC_EN 0x1000
171 #define ISOADC7_MODE_CRC_TYPE_CCITT 0x0000
172 #define ISOADC7_MODE_CRC_TYPE_ANSI 0x0800
173 #define ISOADC7_MODE_CRC_TYPE_MASK 0x0800
174 #define ISOADC7_MODE_RESET 0x0400
175 #define ISOADC7_MODE_WLENGTH_16BIT 0x0000
176 #define ISOADC7_MODE_WLENGTH_24BIT 0x0100
177 #define ISOADC7_MODE_WLENGTH_32BIT_ZERO 0x0200
178 #define ISOADC7_MODE_WLENGTH_32BIT_MSB 0x0300
179 #define ISOADC7_MODE_WLENGTH_MASK 0x0300
180 #define ISOADC7_MODE_TIMEOUT_ENABLE 0x0010
181 #define ISOADC7_MODE_DRDY_SEL_MOST_LAGGING 0x0000
182 #define ISOADC7_MODE_DRDY_SEL_LOGIC_OR 0x0004
183 #define ISOADC7_MODE_DRDY_SEL_MOST_LEADING 0x0008
184 #define ISOADC7_MODE_DRDY_SEL_MASK 0x000C
185 #define ISOADC7_MODE_DRDY_HIZ 0x0002
186 #define ISOADC7_MODE_DRDY_FMT 0x0001
187 
192 #define ISOADC7_CLOCK_CH2_EN 0x0400
193 #define ISOADC7_CLOCK_CH1_EN 0x0200
194 #define ISOADC7_CLOCK_CH0_EN 0x0100
195 #define ISOADC7_CLOCK_CLK_DIV_2 0x0000
196 #define ISOADC7_CLOCK_CLK_DIV_4 0x0040
197 #define ISOADC7_CLOCK_CLK_DIV_8 0x0080
198 #define ISOADC7_CLOCK_CLK_DIV_12 0x00C0
199 #define ISOADC7_CLOCK_CLK_DIV_MASK 0x00C0
200 #define ISOADC7_CLOCK_TURBO_EN 0x0020
201 #define ISOADC7_CLOCK_OSR_128 0x0000
202 #define ISOADC7_CLOCK_OSR_256 0x0004
203 #define ISOADC7_CLOCK_OSR_512 0x0008
204 #define ISOADC7_CLOCK_OSR_1024 0x000C
205 #define ISOADC7_CLOCK_OSR_2048 0x0010
206 #define ISOADC7_CLOCK_OSR_4096 0x0014
207 #define ISOADC7_CLOCK_OSR_8192 0x0018
208 #define ISOADC7_CLOCK_OSR_16384 0x001C
209 #define ISOADC7_CLOCK_OSR_MASK 0x001C
210 #define ISOADC7_CLOCK_PWR_LOW 0x0001
211 #define ISOADC7_CLOCK_PWR_HIGH 0x0002
212 #define ISOADC7_CLOCK_PWR_MASK 0x0003
213 
218 #define ISOADC7_CFG_GPO_EN 0x4000
219 #define ISOADC7_CFG_GPO_DAT_ONE 0x2000
220 #define ISOADC7_CFG_GC_DLY_2 0x0000
221 #define ISOADC7_CFG_GC_DLY_4 0x0200
222 #define ISOADC7_CFG_GC_DLY_8 0x0400
223 #define ISOADC7_CFG_GC_DLY_16 0x0600
224 #define ISOADC7_CFG_GC_DLY_32 0x0800
225 #define ISOADC7_CFG_GC_DLY_64 0x0A00
226 #define ISOADC7_CFG_GC_DLY_128 0x0C00
227 #define ISOADC7_CFG_GC_DLY_256 0x0E00
228 #define ISOADC7_CFG_GC_DLY_512 0x1000
229 #define ISOADC7_CFG_GC_DLY_1024 0x1200
230 #define ISOADC7_CFG_GC_DLY_2048 0x1400
231 #define ISOADC7_CFG_GC_DLY_4096 0x1600
232 #define ISOADC7_CFG_GC_DLY_8192 0x1800
233 #define ISOADC7_CFG_GC_DLY_16384 0x1A00
234 #define ISOADC7_CFG_GC_DLY_32768 0x1C00
235 #define ISOADC7_CFG_GC_DLY_65536 0x1E00
236 #define ISOADC7_CFG_GC_DLY_MASK 0x1E00
237 #define ISOADC7_CFG_GC_EN 0x0100
238 
243 #define ISOADC7_CH0_CFG_PHASE_MASK 0xFFC0
244 #define ISOADC7_CH0_CFG_MUX_AIN0P_AIN0N 0x0000
245 #define ISOADC7_CH0_CFG_MUX_AIN0_DISCON 0x0001
246 #define ISOADC7_CH0_CFG_MUX_DC_DIAG 0x0002
247 #define ISOADC7_CH0_CFG_MUX_AC_DIAG 0x0003
248 #define ISOADC7_CH0_CFG_MUX_MASK 0x0003
249 
254 #define ISOADC7_CH1_CFG_PHASE_MASK 0xFFC0
255 #define ISOADC7_CH1_CFG_MUX_AIN1P_AIN12N 0x0000
256 #define ISOADC7_CH1_CFG_MUX_AIN1_DISCON 0x0001
257 #define ISOADC7_CH1_CFG_MUX_DC_DIAG 0x0002
258 #define ISOADC7_CH1_CFG_MUX_AC_DIAG 0x0003
259 #define ISOADC7_CH1_CFG_MUX_MASK 0x0003
260 
265 #define ISOADC7_CH2_CFG_PHASE_MASK 0xFFC0
266 #define ISOADC7_CH2_CFG_TS_SEL_INT 0x0000
267 #define ISOADC7_CH2_CFG_TS_SEL_EXT 0x0020
268 #define ISOADC7_CH2_CFG_TS_SEL_MASK 0x0020
269 #define ISOADC7_CH2_CFG_TS_EN 0x0010
270 #define ISOADC7_CH2_CFG_TS_CHOP_INV 0x0004
271 #define ISOADC7_CH2_CFG_MUX_AIN2P_AIN12N 0x0000
272 #define ISOADC7_CH2_CFG_MUX_AIN2_DISCON 0x0001
273 #define ISOADC7_CH2_CFG_MUX_DC_DIAG 0x0002
274 #define ISOADC7_CH2_CFG_MUX_AC_DIAG 0x0003
275 #define ISOADC7_CH2_CFG_MUX_MASK 0x0003
276 
281 #define ISOADC7_DCDC_CTRL_FREQ_3_78_TO_4_10 0x0000
282 #define ISOADC7_DCDC_CTRL_FREQ_3_52_TO_3_84 0x0100
283 #define ISOADC7_DCDC_CTRL_FREQ_3_30_TO_3_59 0x0200
284 #define ISOADC7_DCDC_CTRL_FREQ_3_09_TO_3_36 0x0300
285 #define ISOADC7_DCDC_CTRL_FREQ_2_89_TO_3_15 0x0400
286 #define ISOADC7_DCDC_CTRL_FREQ_2_71_TO_2_95 0x0500
287 #define ISOADC7_DCDC_CTRL_FREQ_2_53_TO_2_76 0x0600
288 #define ISOADC7_DCDC_CTRL_FREQ_2_37_TO_2_59 0x0700
289 #define ISOADC7_DCDC_CTRL_FREQ_2_22_TO_2_42 0x0800
290 #define ISOADC7_DCDC_CTRL_FREQ_2_08_TO_2_27 0x0900
291 #define ISOADC7_DCDC_CTRL_FREQ_1_95_TO_2_12 0x0A00
292 #define ISOADC7_DCDC_CTRL_FREQ_1_82_TO_1_99 0x0B00
293 #define ISOADC7_DCDC_CTRL_FREQ_1_71_TO_1_86 0x0C00
294 #define ISOADC7_DCDC_CTRL_FREQ_1_60_TO_1_74 0x0D00
295 #define ISOADC7_DCDC_CTRL_FREQ_1_50_TO_1_63 0x0E00
296 #define ISOADC7_DCDC_CTRL_FREQ_1_40_TO_1_53 0x0F00
297 #define ISOADC7_DCDC_CTRL_DCDC_EN 0x0001
298 
303 #define ISOADC7_GAIN_1 0x00
304 #define ISOADC7_GAIN_2 0x01
305 #define ISOADC7_GAIN_4 0x02
306 #define ISOADC7_GAIN_8 0x03
307 #define ISOADC7_GAIN_16 0x04
308 #define ISOADC7_GAIN_32 0x05
309 #define ISOADC7_GAIN_64 0x06
310 #define ISOADC7_GAIN_128 0x07
311 
316 #define ISOADC7_INTERNAL_VREF_MV 1200.0f
317 
326 #define ISOADC7_SET_DATA_SAMPLE_EDGE SET_SPI_DATA_SAMPLE_EDGE
327 #define ISOADC7_SET_DATA_SAMPLE_MIDDLE SET_SPI_DATA_SAMPLE_MIDDLE
328  // isoadc7_set
330 
345 #define ISOADC7_MAP_MIKROBUS( cfg, mikrobus ) \
346  cfg.miso = MIKROBUS( mikrobus, MIKROBUS_MISO ); \
347  cfg.mosi = MIKROBUS( mikrobus, MIKROBUS_MOSI ); \
348  cfg.sck = MIKROBUS( mikrobus, MIKROBUS_SCK ); \
349  cfg.cs = MIKROBUS( mikrobus, MIKROBUS_CS ); \
350  cfg.rst = MIKROBUS( mikrobus, MIKROBUS_RST ); \
351  cfg.xen = MIKROBUS( mikrobus, MIKROBUS_PWM ); \
352  cfg.drdy = MIKROBUS( mikrobus, MIKROBUS_INT )
353  // isoadc7_map // isoadc7
356 
361 typedef struct
362 {
363  uint16_t status;
364  int32_t ch0_data;
365  int32_t ch1_data;
366  int32_t ch2_data;
369 
374 typedef struct
375 {
376  // Output pins
377  digital_out_t rst;
378  digital_out_t xen;
380  // Input pins
381  digital_in_t drdy;
383  // Modules
384  spi_master_t spi;
386  pin_name_t chip_select;
388  uint8_t word_size;
389  float fsr_ch0;
390  float fsr_ch1;
391  float fsr_ch2;
393 } isoadc7_t;
394 
399 typedef struct
400 {
401  // Communication gpio pins
402  pin_name_t miso;
403  pin_name_t mosi;
404  pin_name_t sck;
405  pin_name_t cs;
407  // Additional gpio pins
408  pin_name_t rst;
409  pin_name_t xen;
410  pin_name_t drdy;
412  // static variable
413  uint32_t spi_speed;
414  spi_master_mode_t spi_mode;
415  spi_master_chip_select_polarity_t cs_polarity;
417 } isoadc7_cfg_t;
418 
423 typedef enum
424 {
426  ISOADC7_ERROR = -1
427 
429 
446 
460 err_t isoadc7_init ( isoadc7_t *ctx, isoadc7_cfg_t *cfg );
461 
475 
488 err_t isoadc7_write_reg ( isoadc7_t *ctx, uint8_t reg, uint16_t data_in );
489 
504 err_t isoadc7_write_regs ( isoadc7_t *ctx, uint8_t reg, uint16_t *data_in, uint8_t len );
505 
518 err_t isoadc7_read_reg ( isoadc7_t *ctx, uint8_t reg, uint16_t *data_out );
519 
534 err_t isoadc7_read_regs ( isoadc7_t *ctx, uint8_t reg, uint16_t *data_out, uint8_t len );
535 
546 err_t isoadc7_standby ( isoadc7_t *ctx );
547 
558 err_t isoadc7_wakeup ( isoadc7_t *ctx );
559 
570 err_t isoadc7_lock ( isoadc7_t *ctx );
571 
582 err_t isoadc7_unlock ( isoadc7_t *ctx );
583 
595 
605 
615 void isoadc7_set_rst_pin ( isoadc7_t *ctx, uint8_t state );
616 
626 
636 
646 
658 
670 err_t isoadc7_set_word_size ( isoadc7_t *ctx, uint8_t word_size );
671 
685 err_t isoadc7_set_gain ( isoadc7_t *ctx, uint8_t gain_ch0, uint8_t gain_ch1, uint8_t gain_ch2 );
686 
699 err_t isoadc7_read_data ( isoadc7_t *ctx, isoadc7_data_t *data_out );
700 
714 err_t isoadc7_read_voltage ( isoadc7_t *ctx, float *ch0, float *ch1, float *ch2 );
715 
716 #ifdef __cplusplus
717 }
718 #endif
719 #endif // ISOADC7_H
720  // isoadc7
722 
723 // ------------------------------------------------------------------------ END
isoadc7_cfg_t::mosi
pin_name_t mosi
Definition: isoadc7.h:403
isoadc7_t::spi
spi_master_t spi
Definition: isoadc7.h:384
isoadc7_init
err_t isoadc7_init(isoadc7_t *ctx, isoadc7_cfg_t *cfg)
ISO ADC 7 initialization function.
isoadc7_t::word_size
uint8_t word_size
Definition: isoadc7.h:388
isoadc7_cfg_t::miso
pin_name_t miso
Definition: isoadc7.h:402
isoadc7_data_t::ch0_data
int32_t ch0_data
Definition: isoadc7.h:364
spi_specifics.h
This file contains SPI specific macros, functions, etc.
isoadc7_enable_osc
void isoadc7_enable_osc(isoadc7_t *ctx)
ISO ADC 7 enable osc function.
isoadc7_write_reg
err_t isoadc7_write_reg(isoadc7_t *ctx, uint8_t reg, uint16_t data_in)
ISO ADC 7 write reg function.
isoadc7_write_regs
err_t isoadc7_write_regs(isoadc7_t *ctx, uint8_t reg, uint16_t *data_in, uint8_t len)
ISO ADC 7 write regs function.
isoadc7_t::fsr_ch1
float fsr_ch1
Definition: isoadc7.h:390
isoadc7_wakeup
err_t isoadc7_wakeup(isoadc7_t *ctx)
ISO ADC 7 wakeup function.
isoadc7_data_t
ISO ADC 7 Click data object.
Definition: isoadc7.h:362
isoadc7_t
ISO ADC 7 Click context object.
Definition: isoadc7.h:375
isoadc7_data_t::status
uint16_t status
Definition: isoadc7.h:363
isoadc7_set_word_size
err_t isoadc7_set_word_size(isoadc7_t *ctx, uint8_t word_size)
ISO ADC 7 set word size function.
isoadc7_cfg_t::cs
pin_name_t cs
Definition: isoadc7.h:405
isoadc7_default_cfg
err_t isoadc7_default_cfg(isoadc7_t *ctx)
ISO ADC 7 default configuration function.
ISOADC7_ERROR
@ ISOADC7_ERROR
Definition: isoadc7.h:426
isoadc7_t::xen
digital_out_t xen
Definition: isoadc7.h:378
ISOADC7_OK
@ ISOADC7_OK
Definition: isoadc7.h:425
isoadc7_lock
err_t isoadc7_lock(isoadc7_t *ctx)
ISO ADC 7 lock function.
isoadc7_read_reg
err_t isoadc7_read_reg(isoadc7_t *ctx, uint8_t reg, uint16_t *data_out)
ISO ADC 7 read reg function.
isoadc7_cfg_t::sck
pin_name_t sck
Definition: isoadc7.h:404
isoadc7_unlock
err_t isoadc7_unlock(isoadc7_t *ctx)
ISO ADC 7 unlock function.
isoadc7_disable_osc
void isoadc7_disable_osc(isoadc7_t *ctx)
ISO ADC 7 disable osc function.
isoadc7_read_data
err_t isoadc7_read_data(isoadc7_t *ctx, isoadc7_data_t *data_out)
ISO ADC 7 read data function.
isoadc7_set_gain
err_t isoadc7_set_gain(isoadc7_t *ctx, uint8_t gain_ch0, uint8_t gain_ch1, uint8_t gain_ch2)
ISO ADC 7 set gain function.
isoadc7_cfg_t
ISO ADC 7 Click configuration object.
Definition: isoadc7.h:400
isoadc7_cfg_t::spi_mode
spi_master_mode_t spi_mode
Definition: isoadc7.h:414
isoadc7_t::rst
digital_out_t rst
Definition: isoadc7.h:377
isoadc7_cfg_t::drdy
pin_name_t drdy
Definition: isoadc7.h:410
isoadc7_data_t::ch1_data
int32_t ch1_data
Definition: isoadc7.h:365
isoadc7_get_drdy_pin
uint8_t isoadc7_get_drdy_pin(isoadc7_t *ctx)
ISO ADC 7 get DRDY pin function.
isoadc7_t::drdy
digital_in_t drdy
Definition: isoadc7.h:381
isoadc7_read_regs
err_t isoadc7_read_regs(isoadc7_t *ctx, uint8_t reg, uint16_t *data_out, uint8_t len)
ISO ADC 7 read regs function.
isoadc7_cfg_setup
void isoadc7_cfg_setup(isoadc7_cfg_t *cfg)
ISO ADC 7 configuration object setup function.
isoadc7_set_rst_pin
void isoadc7_set_rst_pin(isoadc7_t *ctx, uint8_t state)
ISO ADC 7 set RST pin function.
isoadc7_sw_reset
err_t isoadc7_sw_reset(isoadc7_t *ctx)
ISO ADC 7 sw reset function.
isoadc7_cfg_t::rst
pin_name_t rst
Definition: isoadc7.h:408
isoadc7_data_t::ch2_data
int32_t ch2_data
Definition: isoadc7.h:366
isoadc7_t::chip_select
pin_name_t chip_select
Definition: isoadc7.h:386
isoadc7_check_id
err_t isoadc7_check_id(isoadc7_t *ctx)
ISO ADC 7 check ID function.
isoadc7_cfg_t::xen
pin_name_t xen
Definition: isoadc7.h:409
isoadc7_cfg_t::spi_speed
uint32_t spi_speed
Definition: isoadc7.h:413
isoadc7_t::fsr_ch2
float fsr_ch2
Definition: isoadc7.h:391
isoadc7_return_value_t
isoadc7_return_value_t
ISO ADC 7 Click return value data.
Definition: isoadc7.h:424
isoadc7_standby
err_t isoadc7_standby(isoadc7_t *ctx)
ISO ADC 7 standby function.
isoadc7_reset_device
void isoadc7_reset_device(isoadc7_t *ctx)
ISO ADC 7 reset device function.
isoadc7_t::fsr_ch0
float fsr_ch0
Definition: isoadc7.h:389
isoadc7_cfg_t::cs_polarity
spi_master_chip_select_polarity_t cs_polarity
Definition: isoadc7.h:415
isoadc7_read_voltage
err_t isoadc7_read_voltage(isoadc7_t *ctx, float *ch0, float *ch1, float *ch2)
ISO ADC 7 read voltage function.