hwmonitor3
2.1.0.0
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List of registers of HW Monitor 3 Click driver. More...
List of registers of HW Monitor 3 Click driver.
#define HWMONITOR3_REG_AMSK_ENS 0xA4 |
#define HWMONITOR3_REG_AMSK_EXS 0xA3 |
#define HWMONITOR3_REG_AMSK_OFF 0xA2 |
#define HWMONITOR3_REG_AMSK_ON 0xA1 |
#define HWMONITOR3_REG_BANK_SEL 0xF0 |
#define HWMONITOR3_REG_DEV_CFG 0xFA |
#define HWMONITOR3_REG_FC_LF_1 0x25 |
#define HWMONITOR3_REG_FC_LF_2 0x35 |
#define HWMONITOR3_REG_FC_LF_3 0x45 |
#define HWMONITOR3_REG_FC_LF_4 0x55 |
#define HWMONITOR3_REG_FC_LF_5 0x65 |
#define HWMONITOR3_REG_FC_LF_6 0x75 |
#define HWMONITOR3_REG_FLT_HF_1 0x24 |
#define HWMONITOR3_REG_FLT_HF_2 0x34 |
#define HWMONITOR3_REG_FLT_HF_3 0x44 |
#define HWMONITOR3_REG_FLT_HF_4 0x54 |
#define HWMONITOR3_REG_FLT_HF_5 0x64 |
#define HWMONITOR3_REG_FLT_HF_6 0x74 |
#define HWMONITOR3_REG_I2CADDR 0xF9 |
#define HWMONITOR3_REG_IEN_CONTROL 0x1B |
#define HWMONITOR3_REG_IEN_OVHF 0x15 |
#define HWMONITOR3_REG_IEN_OVLF 0x16 |
#define HWMONITOR3_REG_IEN_SEQ_ENS 0x1A |
#define HWMONITOR3_REG_IEN_SEQ_EXS 0x19 |
#define HWMONITOR3_REG_IEN_SEQ_OFF 0x18 |
#define HWMONITOR3_REG_IEN_SEQ_ON 0x17 |
#define HWMONITOR3_REG_IEN_TEST 0x1C |
#define HWMONITOR3_REG_IEN_UVHF 0x13 |
#define HWMONITOR3_REG_IEN_UVLF 0x14 |
#define HWMONITOR3_REG_INT_CONTROL 0x22 |
#define HWMONITOR3_REG_INT_MONITOR 0x11 |
#define HWMONITOR3_REG_INT_OVHF 0x16 |
#define HWMONITOR3_REG_INT_OVLF 0x18 |
#define HWMONITOR3_REG_INT_SEQ_ENS 0x20 |
#define HWMONITOR3_REG_INT_SEQ_EXS 0x1E |
#define HWMONITOR3_REG_INT_SEQ_OFF 0x1C |
#define HWMONITOR3_REG_INT_SEQ_ON 0x1A |
#define HWMONITOR3_REG_INT_SRC 0x10 |
HW Monitor 3 registers list bank 0 register.
Specified register for registers list bank 0 of HW Monitor 3 Click driver.
#define HWMONITOR3_REG_INT_TEST 0x23 |
#define HWMONITOR3_REG_INT_UVHF 0x12 |
#define HWMONITOR3_REG_INT_UVLF 0x14 |
#define HWMONITOR3_REG_INT_VENDOR 0x24 |
#define HWMONITOR3_REG_MON_CH_EN 0x1E |
#define HWMONITOR3_REG_MON_LVL_1 0x40 |
#define HWMONITOR3_REG_MON_LVL_2 0x41 |
#define HWMONITOR3_REG_MON_LVL_3 0x42 |
#define HWMONITOR3_REG_MON_LVL_4 0x43 |
#define HWMONITOR3_REG_MON_LVL_5 0x44 |
#define HWMONITOR3_REG_MON_LVL_6 0x45 |
#define HWMONITOR3_REG_OFF_STAT 0x32 |
#define HWMONITOR3_REG_OV_HF_1 0x21 |
#define HWMONITOR3_REG_OV_HF_2 0x31 |
#define HWMONITOR3_REG_OV_HF_3 0x41 |
#define HWMONITOR3_REG_OV_HF_4 0x51 |
#define HWMONITOR3_REG_OV_HF_5 0x61 |
#define HWMONITOR3_REG_OV_HF_6 0x71 |
#define HWMONITOR3_REG_OV_LF_1 0x23 |
#define HWMONITOR3_REG_OV_LF_2 0x33 |
#define HWMONITOR3_REG_OV_LF_3 0x43 |
#define HWMONITOR3_REG_OV_LF_4 0x53 |
#define HWMONITOR3_REG_OV_LF_5 0x63 |
#define HWMONITOR3_REG_OV_LF_6 0x73 |
#define HWMONITOR3_REG_PROT1 0xF1 |
#define HWMONITOR3_REG_PROT2 0xF2 |
#define HWMONITOR3_REG_PROT_MON2 0xF3 |
#define HWMONITOR3_REG_SEQ_DN_THLD 0xA9 |
#define HWMONITOR3_REG_SEQ_DN_THLD 0xA9 |
#define HWMONITOR3_REG_SEQ_ENS_EXP_1 0xE0 |
#define HWMONITOR3_REG_SEQ_ENS_EXP_2 0xE1 |
#define HWMONITOR3_REG_SEQ_ENS_EXP_3 0xE2 |
#define HWMONITOR3_REG_SEQ_ENS_EXP_4 0xE3 |
#define HWMONITOR3_REG_SEQ_ENS_EXP_5 0xE4 |
#define HWMONITOR3_REG_SEQ_ENS_EXP_6 0xE5 |
#define HWMONITOR3_REG_SEQ_ENS_LOG_1 0x80 |
#define HWMONITOR3_REG_SEQ_ENS_LOG_2 0x81 |
#define HWMONITOR3_REG_SEQ_ENS_LOG_3 0x82 |
#define HWMONITOR3_REG_SEQ_ENS_LOG_4 0x83 |
#define HWMONITOR3_REG_SEQ_ENS_LOG_5 0x84 |
#define HWMONITOR3_REG_SEQ_ENS_LOG_6 0x85 |
#define HWMONITOR3_REG_SEQ_EXS_EXP_1 0xD0 |
#define HWMONITOR3_REG_SEQ_EXS_EXP_2 0xD1 |
#define HWMONITOR3_REG_SEQ_EXS_EXP_3 0xD2 |
#define HWMONITOR3_REG_SEQ_EXS_EXP_4 0xD3 |
#define HWMONITOR3_REG_SEQ_EXS_EXP_5 0xD4 |
#define HWMONITOR3_REG_SEQ_EXS_EXP_6 0xD5 |
#define HWMONITOR3_REG_SEQ_EXS_LOG_1 0x70 |
#define HWMONITOR3_REG_SEQ_EXS_LOG_2 0x71 |
#define HWMONITOR3_REG_SEQ_EXS_LOG_3 0x72 |
#define HWMONITOR3_REG_SEQ_EXS_LOG_4 0x73 |
#define HWMONITOR3_REG_SEQ_EXS_LOG_5 0x74 |
#define HWMONITOR3_REG_SEQ_EXS_LOG_6 0x75 |
#define HWMONITOR3_REG_SEQ_OFF_EXP_1 0xC0 |
#define HWMONITOR3_REG_SEQ_OFF_EXP_2 0xC1 |
#define HWMONITOR3_REG_SEQ_OFF_EXP_3 0xC2 |
#define HWMONITOR3_REG_SEQ_OFF_EXP_4 0xC3 |
#define HWMONITOR3_REG_SEQ_OFF_EXP_5 0xC4 |
#define HWMONITOR3_REG_SEQ_OFF_EXP_6 0xC5 |
#define HWMONITOR3_REG_SEQ_OFF_LOG_1 0x60 |
#define HWMONITOR3_REG_SEQ_OFF_LOG_2 0x61 |
#define HWMONITOR3_REG_SEQ_OFF_LOG_3 0x62 |
#define HWMONITOR3_REG_SEQ_OFF_LOG_4 0x63 |
#define HWMONITOR3_REG_SEQ_OFF_LOG_5 0x64 |
#define HWMONITOR3_REG_SEQ_OFF_LOG_6 0x65 |
#define HWMONITOR3_REG_SEQ_ON_EXP_1 0xB0 |
#define HWMONITOR3_REG_SEQ_ON_EXP_2 0xB1 |
#define HWMONITOR3_REG_SEQ_ON_EXP_3 0xB2 |
#define HWMONITOR3_REG_SEQ_ON_EXP_4 0xB3 |
#define HWMONITOR3_REG_SEQ_ON_EXP_5 0xB4 |
#define HWMONITOR3_REG_SEQ_ON_EXP_6 0xB5 |
#define HWMONITOR3_REG_SEQ_ON_LOG_1 0x50 |
#define HWMONITOR3_REG_SEQ_ON_LOG_2 0x51 |
#define HWMONITOR3_REG_SEQ_ON_LOG_3 0x52 |
#define HWMONITOR3_REG_SEQ_ON_LOG_4 0x53 |
#define HWMONITOR3_REG_SEQ_ON_LOG_5 0x54 |
#define HWMONITOR3_REG_SEQ_ON_LOG_6 0x55 |
#define HWMONITOR3_REG_SEQ_ORD_STAT 0x36 |
#define HWMONITOR3_REG_SEQ_OW_STAT 0x35 |
#define HWMONITOR3_REG_SEQ_REC_CTL 0xA0 |
#define HWMONITOR3_REG_SEQ_REC_STAT 0x34 |
#define HWMONITOR3_REG_SEQ_SYNC 0xA7 |
#define HWMONITOR3_REG_SEQ_TIME_LSB_1 0x91 |
#define HWMONITOR3_REG_SEQ_TIME_LSB_2 0x93 |
#define HWMONITOR3_REG_SEQ_TIME_LSB_3 0x95 |
#define HWMONITOR3_REG_SEQ_TIME_LSB_4 0x97 |
#define HWMONITOR3_REG_SEQ_TIME_LSB_5 0x99 |
#define HWMONITOR3_REG_SEQ_TIME_LSB_6 0x9B |
#define HWMONITOR3_REG_SEQ_TIME_MSB_1 0x90 |
#define HWMONITOR3_REG_SEQ_TIME_MSB_2 0x92 |
#define HWMONITOR3_REG_SEQ_TIME_MSB_3 0x94 |
#define HWMONITOR3_REG_SEQ_TIME_MSB_4 0x96 |
#define HWMONITOR3_REG_SEQ_TIME_MSB_5 0x98 |
#define HWMONITOR3_REG_SEQ_TIME_MSB_6 0x9A |
#define HWMONITOR3_REG_SEQ_TOUT_LSB 0xA6 |
#define HWMONITOR3_REG_SEQ_TOUT_MSB 0xA5 |
#define HWMONITOR3_REG_SEQ_UP_THLD 0xA8 |
#define HWMONITOR3_REG_TEST_CFG 0x12 |
#define HWMONITOR3_REG_TEST_INFO 0x31 |
#define HWMONITOR3_REG_TI_CONTROL 0x9F |
#define HWMONITOR3_REG_UV_HF_1 0x20 |
#define HWMONITOR3_REG_UV_HF_2 0x30 |
#define HWMONITOR3_REG_UV_HF_3 0x40 |
#define HWMONITOR3_REG_UV_HF_4 0x50 |
#define HWMONITOR3_REG_UV_HF_5 0x60 |
#define HWMONITOR3_REG_UV_HF_6 0x70 |
#define HWMONITOR3_REG_UV_LF_1 0x22 |
#define HWMONITOR3_REG_UV_LF_2 0x32 |
#define HWMONITOR3_REG_UV_LF_3 0x42 |
#define HWMONITOR3_REG_UV_LF_4 0x52 |
#define HWMONITOR3_REG_UV_LF_5 0x62 |
#define HWMONITOR3_REG_UV_LF_6 0x72 |
#define HWMONITOR3_REG_VMON_CTL 0x10 |
HW Monitor 3 registers list bank 1 register.
Specified register for registers list bank 1 of HW Monitor 3 Click driver.
#define HWMONITOR3_REG_VMON_MISC 0x11 |
#define HWMONITOR3_REG_VMON_STAT 0x30 |
#define HWMONITOR3_REG_VRANGE_MULT 0x1F |