lr11915mhz  2.1.0.0
lr11915mhz.h
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22 
28 #ifndef LR11915MHZ_H
29 #define LR11915MHZ_H
30 
31 #ifdef __cplusplus
32 extern "C"{
33 #endif
34 
39 #ifdef PREINIT_SUPPORTED
40 #include "preinit.h"
41 #endif
42 
43 #ifdef MikroCCoreVersion
44  #if MikroCCoreVersion >= 1
45  #include "delays.h"
46  #endif
47 #endif
48 
49 #include "drv_digital_out.h"
50 #include "drv_digital_in.h"
51 #include "drv_uart.h"
52 
73 #define LR11915MHZ_CMD_AT "AT"
74 #define LR11915MHZ_CMD_FACTORY_RESET "AT&F"
75 #define LR11915MHZ_CMD_SAVE_SETTINGS "AT&W"
76 #define LR11915MHZ_CMD_WARM_RESET "ATZ"
77 #define LR11915MHZ_CMD_GET_INFO "ATI"
78 #define LR11915MHZ_CMD_PARAM_ACCESS_STR "AT%S"
79 #define LR11915MHZ_CMD_PARAM_ACCESS_NUM "ATS"
80 #define LR11915MHZ_CMD_I2C_READ "AT+I2R"
81 #define LR11915MHZ_CMD_I2C_WRITE "AT+I2W"
82 #define LR11915MHZ_CMD_NET_DROP "AT+DROP"
83 #define LR11915MHZ_CMD_NET_JOIN "AT+JOIN"
84 #define LR11915MHZ_CMD_NET_CHECK_LINK "AT+LINKC"
85 #define LR11915MHZ_CMD_NET_SEND_DATA "AT+SEND"
86 #define LR11915MHZ_CMD_NET_GET_TIME "AT+TIME"
87 #define LR11915MHZ_CMD_GROUP_CREATE "AT+MCGA"
88 #define LR11915MHZ_CMD_GROUP_REMOVE "AT+MCGR"
89 #define LR11915MHZ_CMD_GROUP_START "AT+MCGS"
90 #define LR11915MHZ_CMD_GROUP_END "AT+MCGE"
91 #define LR11915MHZ_CMD_GROUP_LIST "AT+MCGL"
92 #define LR11915MHZ_CMD_P2P_END_SESSION "AT+P2PE"
93 #define LR11915MHZ_CMD_P2P_START_SESSION "AT+P2PS"
94 #define LR11915MHZ_CMD_P2P_SEND_DATA "AT+P2PT"
95 #define LR11915MHZ_CMD_SIO_CONFIG "AT+SIOC"
96 #define LR11915MHZ_CMD_SIO_READ "AT+SIOR"
97 #define LR11915MHZ_CMD_SIO_WRITE "AT+SIOW"
98 #define LR11915MHZ_CMD_SPI_READ "AT+SPR"
99 #define LR11915MHZ_CMD_SPI_WRITE "AT+SPW"
100 
105 #define LR11915MHZ_PARAM_DEVICE_TYPE "0"
106 #define LR11915MHZ_PARAM_APP_FW_VERSION "3"
107 #define LR11915MHZ_PARAM_APP_STATE "42"
108 #define LR11915MHZ_PARAM_MIN_BAUD_RATE "1002"
109 #define LR11915MHZ_PARAM_MAX_BAUD_RATE "1003"
110 #define LR11915MHZ_PARAM_RESET_REASON "2000"
111 #define LR11915MHZ_PARAM_RESET_CAUSE "2001"
112 #define LR11915MHZ_PARAM_TX_POWER "2008"
113 #define LR11915MHZ_PARAM_RADIO_ACTIVITY "2016"
114 #define LR11915MHZ_PARAM_BANDWIDTH "3000"
115 #define LR11915MHZ_PARAM_CONNECTION_STATUS "3001"
116 #define LR11915MHZ_PARAM_DEVICE_ADDRESS "3002"
117 #define LR11915MHZ_PARAM_BOOTLOADER_VERSION "3003"
118 #define LR11915MHZ_PARAM_MODULATION_TYPE "3004"
119 #define LR11915MHZ_PARAM_MODULE_TYPE "3005"
120 #define LR11915MHZ_PARAM_PACKETS_RXED "3006"
121 #define LR11915MHZ_PARAM_PACKETS_TXED "3007"
122 #define LR11915MHZ_PARAM_RSSI "3008"
123 #define LR11915MHZ_PARAM_SNR "3009"
124 #define LR11915MHZ_PARAM_SPREADING_FACTOR "3010"
125 #define LR11915MHZ_PARAM_P2P_BEACON_TOA "4000"
126 #define LR11915MHZ_PARAM_P2P_BEACON_SETTLE_TIME "4001"
127 #define LR11915MHZ_PARAM_P2P_SLOT_TOA "4002"
128 #define LR11915MHZ_PARAM_P2P_SLOT_PACKET_SIZE "4003"
129 #define LR11915MHZ_PARAM_P2P_SLOT_DELAY "4004"
130 #define LR11915MHZ_PARAM_P2P_MIN_WINDOW_LENGTH "4005"
131 #define LR11915MHZ_PARAM_P2P_MAX_SLOTS_PER_WINDOW "4006"
132 
137 #define LR11915MHZ_PARAM_ID_DEVICE_NAME "0"
138 #define LR11915MHZ_PARAM_ID_APP_KEY "500"
139 #define LR11915MHZ_PARAM_ID_DEV_EUI "501"
140 #define LR11915MHZ_PARAM_ID_JOIN_EUI "502"
141 #define LR11915MHZ_PARAM_ID_ABP_P2P_ADDRESS "635"
142 #define LR11915MHZ_PARAM_ID_ABP_P2P_NET_KEY "636"
143 #define LR11915MHZ_PARAM_ID_ABP_P2P_APP_KEY "637"
144 
149 #define LR11915MHZ_PARAM_ID_START_FLAGS "100"
150 #define LR11915MHZ_PARAM_ID_SIO_NET "117"
151 #define LR11915MHZ_PARAM_ID_UART_IDLE_TIME "213"
152 #define LR11915MHZ_PARAM_ID_CORE_VOLTAGE "217"
153 #define LR11915MHZ_PARAM_ID_UART_BAUD_RATE "302"
154 #define LR11915MHZ_PARAM_ID_ADR_ENABLED "600"
155 #define LR11915MHZ_PARAM_ID_BEACON_FREQ "601"
156 #define LR11915MHZ_PARAM_ID_ACTIVATION_MODE "602"
157 #define LR11915MHZ_PARAM_ID_DEVICE_CLASS "603"
158 #define LR11915MHZ_PARAM_ID_CONFIRMED_PACKETS "604"
159 #define LR11915MHZ_PARAM_ID_CONFIRMED_RETRY_COUNT "605"
160 #define LR11915MHZ_PARAM_ID_JOIN_DELAY "606"
161 #define LR11915MHZ_PARAM_ID_JOIN_JITTER "607"
162 #define LR11915MHZ_PARAM_ID_PING_SLOT_PERIODICITY "609"
163 #define LR11915MHZ_PARAM_ID_REGION "611"
164 #define LR11915MHZ_PARAM_ID_REQUEST_COUNT "612"
165 #define LR11915MHZ_PARAM_ID_RX1_DELAY "613"
166 #define LR11915MHZ_PARAM_ID_SUB_BAND "617"
167 #define LR11915MHZ_PARAM_ID_APP_PORT "629"
168 #define LR11915MHZ_PARAM_ID_CLASS_C_SCAN_TIME "633"
169 #define LR11915MHZ_PARAM_ID_P2P_DEVICE_ADDRESS "700"
170 #define LR11915MHZ_PARAM_ID_P2P_NET_SIZE "701"
171 #define LR11915MHZ_PARAM_ID_P2P_WINDOW_LENGTH "702"
172 #define LR11915MHZ_PARAM_ID_P2P_DATA_RATE "703"
173 #define LR11915MHZ_PARAM_ID_P2P_LISTEN_DURATION "704"
174 #define LR11915MHZ_PARAM_ID_P2P_LISTEN_INTERVAL "705"
175 #define LR11915MHZ_PARAM_ID_P2P_BEACON_DATA_RATE "706"
176 #define LR11915MHZ_PARAM_ID_P2P_PACKET_SIZE "707"
177 #define LR11915MHZ_PARAM_ID_P2P_TX_POWER "708"
178 #define LR11915MHZ_PARAM_ID_PUBLIC_MODE "709"
179 #define LR11915MHZ_PARAM_ID_SLOTS_PER_WINDOW "710"
180 
185 #define LR11915MHZ_RSP_OK "OK"
186 #define LR11915MHZ_RSP_ERROR "ERROR"
187 
192 #define LR11915MHZ_EVT_CLASS "CLASS "
193 #define LR11915MHZ_EVT_JOIN "JOIN ["
194 #define LR11915MHZ_EVT_LINK_CHECK "LC S:"
195 #define LR11915MHZ_EVT_RX_LNS "RX: W:"
196 #define LR11915MHZ_EVT_RX_P2P "RX: [P2P] S:"
197 #define LR11915MHZ_EVT_TIME "TIME ["
198 #define LR11915MHZ_EVT_TX "TX ["
199 #define LR11915MHZ_EVT_WAKE "WAKE"
200 
206 #define LR11915MHZ_TX_DRV_BUFFER_SIZE 200
207 #define LR11915MHZ_RX_DRV_BUFFER_SIZE 600
208  // lr11915mhz_cmd
210 
225 #define LR11915MHZ_MAP_MIKROBUS( cfg, mikrobus ) \
226  cfg.tx_pin = MIKROBUS( mikrobus, MIKROBUS_TX ); \
227  cfg.rx_pin = MIKROBUS( mikrobus, MIKROBUS_RX ); \
228  cfg.rst = MIKROBUS( mikrobus, MIKROBUS_RST ); \
229  cfg.cts = MIKROBUS( mikrobus, MIKROBUS_CS ); \
230  cfg.rts = MIKROBUS( mikrobus, MIKROBUS_INT );
231  // lr11915mhz_map // lr11915mhz
234 
239 typedef struct
240 {
241  // Output pins
242  digital_out_t rst;
243  digital_out_t cts;
245  // Input pins
246  digital_in_t rts;
248  // Modules
249  uart_t uart;
251  // Buffers
252  uint8_t uart_rx_buffer[ LR11915MHZ_RX_DRV_BUFFER_SIZE ];
253  uint8_t uart_tx_buffer[ LR11915MHZ_TX_DRV_BUFFER_SIZE ];
254  uint8_t cmd_buffer[ LR11915MHZ_TX_DRV_BUFFER_SIZE ];
256 } lr11915mhz_t;
257 
262 typedef struct
263 {
264  // Communication gpio pins
265  pin_name_t rx_pin;
266  pin_name_t tx_pin;
268  // Additional gpio pins
269  pin_name_t rst;
270  pin_name_t cts;
271  pin_name_t rts;
273  // Static variable
274  uint32_t baud_rate;
276  uart_data_bits_t data_bit;
277  uart_parity_t parity_bit;
278  uart_stop_bits_t stop_bit;
281 
286 typedef enum
287 {
292 
294 
311 
326 
339 err_t lr11915mhz_generic_write ( lr11915mhz_t *ctx, uint8_t *data_in, uint16_t len );
340 
353 err_t lr11915mhz_generic_read ( lr11915mhz_t *ctx, uint8_t *data_out, uint16_t len );
354 
364 void lr11915mhz_set_rst_pin ( lr11915mhz_t *ctx, uint8_t state );
365 
375 
385 void lr11915mhz_set_cts_pin ( lr11915mhz_t *ctx, uint8_t state );
386 
396 
407 void lr11915mhz_cmd_run ( lr11915mhz_t *ctx, uint8_t *cmd, uint8_t *param );
408 
420 void lr11915mhz_cmd_set ( lr11915mhz_t *ctx, uint8_t *cmd, uint8_t *param_id, uint8_t *value );
421 
432 void lr11915mhz_cmd_get ( lr11915mhz_t *ctx, uint8_t *cmd, uint8_t *param_id );
433 
444 void lr11915mhz_cmd_help ( lr11915mhz_t *ctx, uint8_t *cmd, uint8_t *param_id );
445 
446 #ifdef __cplusplus
447 }
448 #endif
449 #endif // LR11915MHZ_H
450  // lr11915mhz
452 
453 // ------------------------------------------------------------------------ END
lr11915mhz_cfg_t::cts
pin_name_t cts
Definition: lr11915mhz.h:270
lr11915mhz_cfg_t::parity_bit
uart_parity_t parity_bit
Definition: lr11915mhz.h:277
LR11915MHZ_OK
@ LR11915MHZ_OK
Definition: lr11915mhz.h:288
lr11915mhz_generic_write
err_t lr11915mhz_generic_write(lr11915mhz_t *ctx, uint8_t *data_in, uint16_t len)
LR 11 915MHz data writing function.
lr11915mhz_return_value_t
lr11915mhz_return_value_t
LR 11 915MHz Click return value data.
Definition: lr11915mhz.h:287
lr11915mhz_cfg_t
LR 11 915MHz Click configuration object.
Definition: lr11915mhz.h:263
lr11915mhz_cmd_help
void lr11915mhz_cmd_help(lr11915mhz_t *ctx, uint8_t *cmd, uint8_t *param_id)
LR 11 915MHz cmd help function.
LR11915MHZ_ERROR_TIMEOUT
@ LR11915MHZ_ERROR_TIMEOUT
Definition: lr11915mhz.h:290
lr11915mhz_cfg_t::rst
pin_name_t rst
Definition: lr11915mhz.h:269
lr11915mhz_t
LR 11 915MHz Click context object.
Definition: lr11915mhz.h:240
lr11915mhz_cmd_get
void lr11915mhz_cmd_get(lr11915mhz_t *ctx, uint8_t *cmd, uint8_t *param_id)
LR 11 915MHz cmd get function.
lr11915mhz_cfg_setup
void lr11915mhz_cfg_setup(lr11915mhz_cfg_t *cfg)
LR 11 915MHz configuration object setup function.
lr11915mhz_set_rst_pin
void lr11915mhz_set_rst_pin(lr11915mhz_t *ctx, uint8_t state)
LR 11 915MHz set RST pin function.
lr11915mhz_init
err_t lr11915mhz_init(lr11915mhz_t *ctx, lr11915mhz_cfg_t *cfg)
LR 11 915MHz initialization function.
lr11915mhz_cfg_t::stop_bit
uart_stop_bits_t stop_bit
Definition: lr11915mhz.h:278
lr11915mhz_get_rts_pin
uint8_t lr11915mhz_get_rts_pin(lr11915mhz_t *ctx)
LR 11 915MHz get RTS pin function.
lr11915mhz_generic_read
err_t lr11915mhz_generic_read(lr11915mhz_t *ctx, uint8_t *data_out, uint16_t len)
LR 11 915MHz data reading function.
lr11915mhz_cmd_run
void lr11915mhz_cmd_run(lr11915mhz_t *ctx, uint8_t *cmd, uint8_t *param)
LR 11 915MHz cmd run function.
lr11915mhz_cfg_t::baud_rate
uint32_t baud_rate
Definition: lr11915mhz.h:274
lr11915mhz_cfg_t::rx_pin
pin_name_t rx_pin
Definition: lr11915mhz.h:265
LR11915MHZ_TX_DRV_BUFFER_SIZE
#define LR11915MHZ_TX_DRV_BUFFER_SIZE
LR 11 915MHz driver buffer size.
Definition: lr11915mhz.h:206
lr11915mhz_cfg_t::uart_blocking
bool uart_blocking
Definition: lr11915mhz.h:275
lr11915mhz_cmd_set
void lr11915mhz_cmd_set(lr11915mhz_t *ctx, uint8_t *cmd, uint8_t *param_id, uint8_t *value)
LR 11 915MHz cmd set function.
lr11915mhz_t::uart
uart_t uart
Definition: lr11915mhz.h:249
lr11915mhz_cfg_t::tx_pin
pin_name_t tx_pin
Definition: lr11915mhz.h:266
lr11915mhz_cfg_t::rts
pin_name_t rts
Definition: lr11915mhz.h:271
LR11915MHZ_ERROR
@ LR11915MHZ_ERROR
Definition: lr11915mhz.h:289
LR11915MHZ_RX_DRV_BUFFER_SIZE
#define LR11915MHZ_RX_DRV_BUFFER_SIZE
Definition: lr11915mhz.h:207
lr11915mhz_t::cts
digital_out_t cts
Definition: lr11915mhz.h:243
lr11915mhz_t::rts
digital_in_t rts
Definition: lr11915mhz.h:246
lr11915mhz_cfg_t::data_bit
uart_data_bits_t data_bit
Definition: lr11915mhz.h:276
LR11915MHZ_ERROR_CMD
@ LR11915MHZ_ERROR_CMD
Definition: lr11915mhz.h:291
lr11915mhz_t::rst
digital_out_t rst
Definition: lr11915mhz.h:242
lr11915mhz_set_cts_pin
void lr11915mhz_set_cts_pin(lr11915mhz_t *ctx, uint8_t state)
LR 11 915MHz set CTS pin function.
lr11915mhz_reset_device
void lr11915mhz_reset_device(lr11915mhz_t *ctx)
LR 11 915MHz reset device function.