piezoaccel250g
2.1.0.0
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Settings for registers of Piezo Accel 2 50g Click driver. More...
Settings for registers of Piezo Accel 2 50g Click driver.
#define PIEZOACCEL250G_CMD_DEV_ADDR 0x01 |
Piezo Accel 2 50g device address setting.
Specified setting for device address of Piezo Accel 2 50g Click driver.
#define PIEZOACCEL250G_CMD_TYPE_FAST_CMD 0x00 |
Piezo Accel 2 50g command type setting.
Specified setting for command byte of Piezo Accel 2 50g Click driver.
#define PIEZOACCEL250G_CMD_TYPE_INC_REG_READ 0x03 |
#define PIEZOACCEL250G_CMD_TYPE_INC_REG_WRITE 0x02 |
#define PIEZOACCEL250G_CMD_TYPE_STATIC_REG_READ 0x01 |
#define PIEZOACCEL250G_CONFIG0_ADC_MODE_CONVERSION 0x03 |
#define PIEZOACCEL250G_CONFIG0_ADC_MODE_MASK 0x03 |
#define PIEZOACCEL250G_CONFIG0_ADC_MODE_SHUTDOWN 0x00 |
#define PIEZOACCEL250G_CONFIG0_ADC_MODE_STANDBY 0x02 |
#define PIEZOACCEL250G_CONFIG0_CLK_SEL_EXT 0x00 |
#define PIEZOACCEL250G_CONFIG0_CLK_SEL_INT 0x20 |
#define PIEZOACCEL250G_CONFIG0_CLK_SEL_INT_CLKOUT 0x30 |
#define PIEZOACCEL250G_CONFIG0_CLK_SEL_MASK 0x30 |
#define PIEZOACCEL250G_CONFIG0_CS_SEL_0_9_UA 0x04 |
#define PIEZOACCEL250G_CONFIG0_CS_SEL_15_UA 0x0C |
#define PIEZOACCEL250G_CONFIG0_CS_SEL_3_7_UA 0x08 |
#define PIEZOACCEL250G_CONFIG0_CS_SEL_MASK 0x0C |
#define PIEZOACCEL250G_CONFIG0_CS_SEL_NO_IN_CURR 0x00 |
#define PIEZOACCEL250G_CONFIG0_EXIT_PART_SHUTDOWN 0x40 |
#define PIEZOACCEL250G_CONFIG0_VREF_SEL_EXT 0x00 |
#define PIEZOACCEL250G_CONFIG0_VREF_SEL_INT_2_4_V 0x80 |
Piezo Accel 2 50g CONFIG0 register setting.
Specified setting for CONFIG0 register of Piezo Accel 2 50g Click driver.
#define PIEZOACCEL250G_CONFIG0_VREF_SEL_MASK 0x80 |
#define PIEZOACCEL250G_CONFIG1_OSR_1024 0x14 |
#define PIEZOACCEL250G_CONFIG1_OSR_128 0x08 |
#define PIEZOACCEL250G_CONFIG1_OSR_16384 0x24 |
#define PIEZOACCEL250G_CONFIG1_OSR_2048 0x18 |
#define PIEZOACCEL250G_CONFIG1_OSR_20480 0x28 |
#define PIEZOACCEL250G_CONFIG1_OSR_24576 0x2C |
#define PIEZOACCEL250G_CONFIG1_OSR_256 0x0C |
#define PIEZOACCEL250G_CONFIG1_OSR_32 0x00 |
#define PIEZOACCEL250G_CONFIG1_OSR_4096 0x1C |
#define PIEZOACCEL250G_CONFIG1_OSR_40960 0x30 |
#define PIEZOACCEL250G_CONFIG1_OSR_49152 0x34 |
#define PIEZOACCEL250G_CONFIG1_OSR_512 0x10 |
#define PIEZOACCEL250G_CONFIG1_OSR_64 0x04 |
#define PIEZOACCEL250G_CONFIG1_OSR_8192 0x20 |
#define PIEZOACCEL250G_CONFIG1_OSR_81920 0x38 |
#define PIEZOACCEL250G_CONFIG1_OSR_98304 0x3C |
#define PIEZOACCEL250G_CONFIG1_OSR_MASK 0x3C |
#define PIEZOACCEL250G_CONFIG1_PRE_DIV_1 0x00 |
#define PIEZOACCEL250G_CONFIG1_PRE_DIV_2 0x40 |
#define PIEZOACCEL250G_CONFIG1_PRE_DIV_4 0x80 |
#define PIEZOACCEL250G_CONFIG1_PRE_DIV_8 0xC0 |
Piezo Accel 2 50g CONFIG1 register setting.
Specified setting for CONFIG1 register of Piezo Accel 2 50g Click driver.
#define PIEZOACCEL250G_CONFIG1_PRE_MASK 0xC0 |
#define PIEZOACCEL250G_CONFIG2_AZ_MUX_EN 0x04 |
#define PIEZOACCEL250G_CONFIG2_AZ_REF_EN 0x02 |
#define PIEZOACCEL250G_CONFIG2_BOOST_MASK 0xC0 |
#define PIEZOACCEL250G_CONFIG2_BOOST_X0_5 0x00 |
#define PIEZOACCEL250G_CONFIG2_BOOST_X0_66 0x40 |
#define PIEZOACCEL250G_CONFIG2_BOOST_X1 0x80 |
#define PIEZOACCEL250G_CONFIG2_BOOST_X2 0xC0 |
Piezo Accel 2 50g CONFIG2 register setting.
Specified setting for CONFIG2 register of Piezo Accel 2 50g Click driver.
#define PIEZOACCEL250G_CONFIG2_GAIN_MASK 0x38 |
#define PIEZOACCEL250G_CONFIG2_GAIN_X1 0x08 |
#define PIEZOACCEL250G_CONFIG2_GAIN_X16 0x28 |
#define PIEZOACCEL250G_CONFIG2_GAIN_X1_PER_3 0x00 |
#define PIEZOACCEL250G_CONFIG2_GAIN_X2 0x10 |
#define PIEZOACCEL250G_CONFIG2_GAIN_X32 0x30 |
#define PIEZOACCEL250G_CONFIG2_GAIN_X4 0x18 |
#define PIEZOACCEL250G_CONFIG2_GAIN_X64 0x38 |
#define PIEZOACCEL250G_CONFIG2_GAIN_X8 0x20 |
#define PIEZOACCEL250G_CONFIG2_RESERVED 0x01 |
#define PIEZOACCEL250G_CONFIG3_CONV_MODE_CONT 0xC0 |
Piezo Accel 2 50g CONFIG3 register setting.
Specified setting for CONFIG3 register of Piezo Accel 2 50g Click driver.
#define PIEZOACCEL250G_CONFIG3_CONV_MODE_MASK 0xC0 |
#define PIEZOACCEL250G_CONFIG3_CONV_MODE_ONES_SHD 0x00 |
#define PIEZOACCEL250G_CONFIG3_CONV_MODE_ONES_STB 0x80 |
#define PIEZOACCEL250G_CONFIG3_CRC_FMT_16B 0x00 |
#define PIEZOACCEL250G_CONFIG3_CRC_FMT_32B 0x08 |
#define PIEZOACCEL250G_CONFIG3_CRC_FMT_MASK 0x08 |
#define PIEZOACCEL250G_CONFIG3_DATA_FMT_24B 0x00 |
#define PIEZOACCEL250G_CONFIG3_DATA_FMT_32B_L 0x10 |
#define PIEZOACCEL250G_CONFIG3_DATA_FMT_32B_R 0x20 |
#define PIEZOACCEL250G_CONFIG3_DATA_FMT_32B_R_CHID 0x30 |
#define PIEZOACCEL250G_CONFIG3_DATA_FMT_MASK 0x30 |
#define PIEZOACCEL250G_CONFIG3_EN_CRCCOM 0x04 |
#define PIEZOACCEL250G_CONFIG3_EN_GAINCAL 0x01 |
#define PIEZOACCEL250G_CONFIG3_EN_OFFCAL 0x02 |
#define PIEZOACCEL250G_DATA_READY_TIMEOUT_MS 1000 |
Piezo Accel 2 50g data ready timeout setting.
Specified setting for data ready timeout of Piezo Accel 2 50g Click driver.
#define PIEZOACCEL250G_IRQ_CRCCFG_STATUS 0x20 |
#define PIEZOACCEL250G_IRQ_DR_STATUS 0x40 |
Piezo Accel 2 50g IRQ register setting.
Specified setting for IRQ register of Piezo Accel 2 50g Click driver.
#define PIEZOACCEL250G_IRQ_EN_FAST_CMD 0x02 |
#define PIEZOACCEL250G_IRQ_EN_STP 0x01 |
#define PIEZOACCEL250G_IRQ_MODE0_INACT_HIGH 0x04 |
#define PIEZOACCEL250G_IRQ_MODE0_INACT_HIGH_Z 0x00 |
#define PIEZOACCEL250G_IRQ_MODE0_MASK 0x04 |
#define PIEZOACCEL250G_IRQ_MODE1_IRQOUT 0x00 |
#define PIEZOACCEL250G_IRQ_MODE1_MASK 0x08 |
#define PIEZOACCEL250G_IRQ_MODE1_MDAT 0x08 |
#define PIEZOACCEL250G_IRQ_POR_STATUS 0x10 |
#define PIEZOACCEL250G_LOCK_BYTE 0x00 |
Piezo Accel 2 50g lock setting.
Specified setting for lock of Piezo Accel 2 50g Click driver.
#define PIEZOACCEL250G_SCAN_CH_AVDD 0x002000ul |
#define PIEZOACCEL250G_SCAN_CH_DIFF_CH0_CH1 0x000100ul |
#define PIEZOACCEL250G_SCAN_CH_DIFF_CH2_CH3 0x000200ul |
#define PIEZOACCEL250G_SCAN_CH_OFFSET 0x008000ul |
#define PIEZOACCEL250G_SCAN_CH_SINGLE_ENDED_CH0 0x000001ul |
#define PIEZOACCEL250G_SCAN_CH_SINGLE_ENDED_CH1 0x000002ul |
#define PIEZOACCEL250G_SCAN_CH_SINGLE_ENDED_CH2 0x000004ul |
#define PIEZOACCEL250G_SCAN_CH_SINGLE_ENDED_CH3 0x000008ul |
#define PIEZOACCEL250G_SCAN_CH_TEMP 0x001000ul |
#define PIEZOACCEL250G_SCAN_CH_VCM 0x004000ul |
#define PIEZOACCEL250G_SCAN_DLY_128_DMCL 0xA00000ul |
#define PIEZOACCEL250G_SCAN_DLY_16_DMCLK 0x400000ul |
#define PIEZOACCEL250G_SCAN_DLY_256_DMCLK 0xC00000ul |
#define PIEZOACCEL250G_SCAN_DLY_32_DMCLK 0x600000ul |
#define PIEZOACCEL250G_SCAN_DLY_512_DMCLK 0xE00000ul |
Piezo Accel 2 50g SCAN register setting.
Specified setting for SCAN register of Piezo Accel 2 50g Click driver.
#define PIEZOACCEL250G_SCAN_DLY_64_DMCLK 0x800000ul |
#define PIEZOACCEL250G_SCAN_DLY_8_DMCLK 0x200000ul |
#define PIEZOACCEL250G_SCAN_DLY_MASK 0xE00000ul |
#define PIEZOACCEL250G_SCAN_DLY_NO_DELAY 0x000000ul |
#define PIEZOACCEL250G_SET_DATA_SAMPLE_EDGE SET_SPI_DATA_SAMPLE_EDGE |
Data sample selection.
This macro sets data samples for SPI modules.
#define PIEZOACCEL250G_SET_DATA_SAMPLE_MIDDLE SET_SPI_DATA_SAMPLE_MIDDLE |
#define PIEZOACCEL250G_STATUS_CRCCFG_FLAG 0x02 |
#define PIEZOACCEL250G_STATUS_DEV_ADDR_FLAG 0x08 |
#define PIEZOACCEL250G_STATUS_DEV_ADDR_MASK 0x30 |
Piezo Accel 2 50g status byte setting.
Specified setting for status byte of Piezo Accel 2 50g Click driver.
#define PIEZOACCEL250G_STATUS_DR_FLAG 0x04 |
#define PIEZOACCEL250G_STATUS_POR_FLAG 0x01 |
#define PIEZOACCEL250G_UNLOCK_BYTE 0xA5 |