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Henk Kiela
hkiela

posted on 2013/08/01 07:20:13 AM CEST

Internal MCU modules

Pascal Sample code for quadrature encoders with STM32F407GT

I have tried a lot to get any of the four possible 16 quad encoder counters (Tim2 -5) running, with no success. Can anyone have a suggestion? See my sample code below.

// --------------- Init encoder
Procedure EncoderInit;
Begin
//Configure peripheral clocks


//Configure pins
GPIO_Config(@GPIOC_BASE, _GPIO_PINMASK_6 or _GPIO_PINMASK_7,
_GPIO_CFG_MODE_INPUT or _GPIO_CFG_PULL_UP or _GPIO_CFG_MODE_ALT_FUNCTION or _GPIO_CFG_SPEED_100MHZ); // Pin ChA and chB config
// GPIO_Config(@GPIOC_BASE, _GPIO_PINMASK_6 or _GPIO_PINMASK_7,
// _GPIO_CFG_MODE_INPUT or _GPIO_CFG_PULL_UP or _GPIO_CFG_SPEED_100MHZ); // Pin ChA and chB config

CEN_TIM3_CR1_bit:=0; // Disable timer
CEN_TIM4_CR1_bit:=0; // Disable timer

AFRL60_GPIOC_AFRL_bit:=0; //GPIOc_AFRH alternate function AF2 for PC6
AFRL61_GPIOC_AFRL_bit:=1;
AFRL62_GPIOC_AFRL_bit:=0;
AFRL63_GPIOC_AFRL_bit:=0;

AFRL70_GPIOC_AFRL_bit:=0; //GPIOc_AFRH alternate function AF2 for PC7
AFRL71_GPIOC_AFRL_bit:=1;
AFRL72_GPIOC_AFRL_bit:=0;
AFRL73_GPIOC_AFRL_bit:=0;

TIM3_ARR:=3000;
TIM4_ARR:=3000;

CC1S0_TIM3_CCMR1O_bit:=1; // Tim3_CCMR1 input mapping T1 map
CC1S1_TIM3_CCMR1O_bit:=0;

CC2S0_TIM3_CCMR1O_bit:=1; // Tim3_CCMR1 input mapping T2 map
CC2S1_TIM3_CCMR1O_bit:=0;

//Configure Timer
CC1P_TIM3_CCER_bit:=0; // Tim3_CCER Input polarity
CC2P_TIM3_CCER_bit:=0;

//Debounce filter

//Setup quadrature encoder and enable timer
// TIM3_SMCR
// Main Configuration of Timer 3: Tim3_SMCR.SMS -> Encoder Mode 3 (val 011)
SMS0_TIM3_SMCR_bit:=1; // Count on edge ch1
SMS1_TIM3_SMCR_bit:=1; // and channel 2
SMS2_TIM3_SMCR_bit:=0;
// SMS2_TIM3_SMCR_bit:=0;
ETF0_TIM3_SMCR_bit:=1;
ETF1_TIM3_SMCR_bit:=1;
ETF2_TIM3_SMCR_bit:=1;
ETF3_TIM3_SMCR_bit:=1;

// CC2P= ‘0’, CC2NP = ‘0’, IC2F =’0000’ (TIMx_CCER register, TI2FP2 noninverted, TI2FP2=TI2)

//Tim3_SMCR.TS -> TI1FP1 (val 101)
//Tim3_CR1.URS -> Counter over-/underflow, UG BIT, Slave mode controller (val 0)
//Tim3.ARR -> 1000
//Timer 3 Channel 1 Configuration: Tim3_CCR1 -> 0
//Tim3_CCMR1.CC1S -> CC1 configured as input, IC1 mapped on TI1 (val 01)
//Tim3_CCER.CC1P -> non-inverted (val 0)
//Timer 3 Channel 2 Configuration: Tim3_CCR2 -> 0
//Tim3_CCMR1.CC2S -> CC2 configured as input, IC2 mapped on TI2 (val 01)
//Tim3_CCER.CC2P -> non-inverted (val 0)

CEN_TIM3_CR1_bit:=1; // Enable timer
End; // Encoderinit

Function Getcount: word;
var a: integer;
begin
CEN_TIM3_CR1_bit:=0; // Enable timer
TIM3_CNT:=222;
CEN_TIM3_CR1_bit:=1; // Enable timer
GetCount:=TIM3_CNT;
// a:=__System_CLOCK_IN_KHZ;
// Getcount:=a;
end;

USER Comments

Henk Kiela
hkiela

posted on 2013/08/06 10:23:20 AM CEST

I solved it myself. Its been a study in theSTM documentation. And DO NOT USE the Mikroe commands! Just do the full init on registers directly. Somehow Mikroe has probable not worked through all STM details.

Here is the code for tim3 and tim4 quadrature encoders:
// --------------- Init quadrature encoder in Tim3 and Tim4
Procedure EncoderInit;
Begin
//Setup quadrature encoder and enable timer
// Do not use the Mikroe functions but use register commands instead!!!

// Tim3 init on PC6 and PC7 for channel A and B (AF2)
//Configure peripheral clocks
GPIOCEN_bit:=1; // enable clock on port C

// Alternate function enable
MODER60_GPIOC_MODER_bit:=0; // Set alternate functions in Port mode register for PC6 and PC7
MODER61_GPIOC_MODER_bit:=1;
MODER70_GPIOC_MODER_bit:=0;
MODER71_GPIOC_MODER_bit:=1;

AFRL60_GPIOC_AFRL_bit:=0; //GPIOc_AFRH alternate function AF2 for PC6 tim 3 Ch A
AFRL61_GPIOC_AFRL_bit:=1;
AFRL62_GPIOC_AFRL_bit:=0;
AFRL63_GPIOC_AFRL_bit:=0;

AFRL70_GPIOC_AFRL_bit:=0; //GPIOc_AFRH alternate function AF2 for PC7 Tim3 Ch B
AFRL71_GPIOC_AFRL_bit:=1;
AFRL72_GPIOC_AFRL_bit:=0;
AFRL73_GPIOC_AFRL_bit:=0;

//RCC_AHB1Periph_GPIOA
CEN_TIM3_CR1_bit:=0; // Disable timer

TIM3_ARR:=$ffff; // Pre load timer reload register
TIM4_ARR:=$ffff;

CC1S0_TIM3_CCMR1O_bit:=1; // Tim3_CCMR1 input mapping T1 map
CC1S1_TIM3_CCMR1O_bit:=0;

CC2S0_TIM3_CCMR1O_bit:=1; // Tim3_CCMR1 input mapping T2 map
CC2S1_TIM3_CCMR1O_bit:=0;

//Configure Timer
CC1P_TIM3_CCER_bit:=0; // Tim3_CCER Input polarity
CC2P_TIM3_CCER_bit:=0;
TIM3EN_bit:=1; // Enable clock on Tim 3 in RCC_APB1ENR

// Main Configuration of Timer 3: Tim3_SMCR.SMS -> Encoder Mode 3 (val 011)
SMS0_TIM3_SMCR_bit:=1; // Count on edge ch1, slave mode selection quadrature
SMS1_TIM3_SMCR_bit:=1; // and channel 2, counting up/down
SMS2_TIM3_SMCR_bit:=0;

//Debounce filter
// SMS2_TIM3_SMCR_bit:=0; Digital filter bits in SMCR on internal clock div 8
ETF0_TIM3_SMCR_bit:=1;
ETF1_TIM3_SMCR_bit:=1;
ETF2_TIM3_SMCR_bit:=0;
ETF3_TIM3_SMCR_bit:=0;

CEN_TIM3_CR1_bit:=1; // Enable timer


// Tim4 init on PB6 and PB7 for channel A and B (AF2)
//Configure peripheral clocks
GPIOBEN_bit:=1; // enable clock on port C

// Alternate function enable
MODER60_GPIOB_MODER_bit:=0; // Set alternate functions in Port mode register for PB6 and PB7
MODER61_GPIOB_MODER_bit:=1;
MODER70_GPIOB_MODER_bit:=0;
MODER71_GPIOB_MODER_bit:=1;

AFRL60_GPIOB_AFRL_bit:=0; //GPIOb_AFRH alternate function AF2 for PB6 tim4 Ch A
AFRL61_GPIOB_AFRL_bit:=1;
AFRL62_GPIOB_AFRL_bit:=0;
AFRL63_GPIOB_AFRL_bit:=0;

AFRL70_GPIOB_AFRL_bit:=0; //GPIOb_AFRH alternate function AF2 for PB7 Tim4 Ch B
AFRL71_GPIOB_AFRL_bit:=1;
AFRL72_GPIOB_AFRL_bit:=0;
AFRL73_GPIOB_AFRL_bit:=0;

//RCC_AHB1Periph_GPIOA
CEN_TIM4_CR1_bit:=0; // Disable timer 4

TIM3_ARR:=$ffff; // Pre load timer 4 reload register
TIM4_ARR:=$ffff;

CC1S0_TIM4_CCMR1O_bit:=1; // Tim4_CCMR1 input mapping T1 map
CC1S1_TIM4_CCMR1O_bit:=0;

CC2S0_TIM4_CCMR1O_bit:=1; // Tim4_CCMR1 input mapping T2 map
CC2S1_TIM4_CCMR1O_bit:=0;

//Configure Timer
CC1P_TIM4_CCER_bit:=0; // Tim4_CCER Input polarity
CC2P_TIM4_CCER_bit:=0;
TIM4EN_bit:=1; // Enable clock on Tim 4 in RCC_APB1ENR

// Main Configuration of Timer 4: Tim4_SMCR.SMS -> Encoder Mode 4 (val 011)
SMS0_TIM4_SMCR_bit:=1; // Count on edge ch1, slave mode selection quadrature
SMS1_TIM4_SMCR_bit:=1; // and channel 2, counting up/down
SMS2_TIM4_SMCR_bit:=0;

//Debounce filter
// SMS2_TIM4_SMCR_bit:=0; Digital filter bits in SMCR on internal clock div 8
ETF0_TIM4_SMCR_bit:=1;
ETF1_TIM4_SMCR_bit:=1;
ETF2_TIM4_SMCR_bit:=0;
ETF3_TIM4_SMCR_bit:=0;

CEN_TIM4_CR1_bit:=1; // Enable timer

End; // Encoderinit

Function Getcount1: word; // get encoder count connected to PC6 and PC7
begin
GetCount1:=TIM3_CNT;
end; // GetCount encoder 1

Function Getcount2: word; // get encoder count connected to PB6 and PB7
begin
GetCount2:=TIM4_CNT;
end; // GetCount encoder 2

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